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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Cc: Peter Kardos <kardos.peter.sk@gmail.com>
Subject: [PATCH] ARM: vector_table: Fix creation of second level page table
Date: Wed, 24 Aug 2016 14:23:10 +0200	[thread overview]
Message-ID: <1472041390-19259-1-git-send-email-s.hauer@pengutronix.de> (raw)

The second level page tables can only start at a 1MiB section boundary,
so instead of calling arm_create_pte() with the high vector address
(which is 0xffff0000, not 1MiB aligned) we have to call it with
0xfff00000 to correctly create a second level page table. The vectors
themselves worked as expected with the old value, but the memory around
it did not do a 1:1 mapping anymore. This breaks SoCs which have
peripherals in that area, for example Atmel SoCs like the AT91RM9200.

Fixes: f6b77fe9: ARM: Rework vector table setup

Reported-by: Peter Kardos <kardos.peter.sk@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/mmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index a31bce4..2b70866 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -307,7 +307,7 @@ static void create_vector_table(unsigned long adr)
 		vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
 		pr_debug("Creating vector table, virt = 0x%p, phys = 0x%08lx\n",
 			 vectors, adr);
-		exc = arm_create_pte(adr);
+		exc = arm_create_pte(adr & ~(SZ_1M - 1));
 		idx = (adr & (SZ_1M - 1)) >> PAGE_SHIFT;
 		exc[idx] = (u32)vectors | PTE_TYPE_SMALL | pte_flags_cached;
 	}
-- 
2.8.1


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             reply	other threads:[~2016-08-24 12:23 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-24 12:23 Sascha Hauer [this message]
2016-08-24 16:07 ` Andrey Smirnov
2016-08-25  6:37   ` Sascha Hauer
2016-08-25 20:50 ` Peter Kardos

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