From: Stefan Riedmueller <s.riedmueller@phytec.de>
To: barebox@lists.infradead.org
Subject: [PATCH 1/2] ARM: dts: imx6qdl: phycore: Set phy-reset-duration for fec
Date: Tue, 2 Jul 2019 15:03:49 +0200 [thread overview]
Message-ID: <1562072630-54127-1-git-send-email-s.riedmueller@phytec.de> (raw)
The voltage of the ethernet phy needs to be stable before de-asserting
the reset pin. Thus set the phy-reset-duration to 10 ms.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
---
arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
index 8fde27bd0c17..1d39368165db 100644
--- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi
@@ -110,6 +110,7 @@
phy-handle = <ðphy>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>; /* in msecs */
status = "disabled";
mdio {
--
2.7.4
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next reply other threads:[~2019-07-02 13:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-02 13:03 Stefan Riedmueller [this message]
2019-07-02 13:03 ` [PATCH 2/2] ARM: dts: imx6ul: phycore: Reduce eth drive strength Stefan Riedmueller
2019-07-04 6:53 ` [PATCH 1/2] ARM: dts: imx6qdl: phycore: Set phy-reset-duration for fec Sascha Hauer
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