From: Rouven Czerwinski <r.czerwinski@pengutronix.de>
To: Sascha Hauer <sha@pengutronix.de>
Cc: barebox@lists.infradead.org, Rouven Czerwinski <rouven@czerwinskis.de>
Subject: Re: [PATCH next v2] arm: rockchip: add support for CM3 on IO board
Date: Tue, 04 Apr 2023 14:28:40 +0200 [thread overview]
Message-ID: <156da0c77eb2c3e02501777a577934759bfafb16.camel@pengutronix.de> (raw)
In-Reply-To: <20230403071105.GQ19113@pengutronix.de>
Hi Sascha,
On Mon, 2023-04-03 at 09:11 +0200, Sascha Hauer wrote:
> On Thu, Mar 30, 2023 at 06:11:01PM +0200, Rouven Czerwinski wrote:
> > From: Rouven Czerwinski <rouven@czerwinskis.de>
> >
> > Working:
> > - RKBIN DDR training (rk3566_ddr_1056MHz_v1.13.bin)
> > - RKBIN TF-A (v1.34) from RKBIN
> > - Environment storage
> > - DHCP, ping and link detection
> >
> > Signed-off-by: Rouven Czerwinski <rouven@czerwinskis.de>
> > ---
> > v2:
> > - rebase on next and adjust to RK356x changes
> > - update rockchip boards documentation
> >
> > + memory@a00000 {
> > + device_type = "memory";
> > + reg = <0x0 0x00a00000 0x0 0x7f600000>;
> > + };
>
> Now that we have a driver reading back the memory settings from the
> controller this shouldn't be needed anymore. I dropped the memory node
> while applying, please check if it works.
It does, thanks!
Best regards,
Rouven Czerwinski
prev parent reply other threads:[~2023-04-04 12:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-30 16:11 Rouven Czerwinski
2023-04-03 7:11 ` Sascha Hauer
2023-04-04 12:28 ` Rouven Czerwinski [this message]
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