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Fri, 27 Sep 2024 12:40:34 +0200 Received: from localhost ([::1] helo=dude02.red.stw.pengutronix.de) by dude02.red.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1su8Op-000Q9b-0Z; Fri, 27 Sep 2024 12:40:34 +0200 From: Sascha Hauer To: Barebox List , Sascha Hauer In-Reply-To: <20240926113320.3780408-1-s.hauer@pengutronix.de> References: <20240926113320.3780408-1-s.hauer@pengutronix.de> Message-Id: <172743363473.100528.5958821855328519019.b4-ty@pengutronix.de> Date: Fri, 27 Sep 2024 12:40:34 +0200 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Mailer: b4 0.12.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240927_114035_795999_144BF7EB X-CRM114-Status: GOOD ( 20.43 ) X-BeenThere: barebox@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "barebox" X-SA-Exim-Connect-IP: 2607:7c80:54:3::133 X-SA-Exim-Mail-From: barebox-bounces+lore=pengutronix.de@lists.infradead.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on metis.whiteo.stw.pengutronix.de X-Spam-Level: X-Spam-Status: No, score=-4.0 required=4.0 tests=AWL,BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.2 Subject: Re: [PATCH] clk: imx: improve precision of AV PLL to 1 Hz X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.whiteo.stw.pengutronix.de) On Thu, 26 Sep 2024 13:33:20 +0200, Sascha Hauer wrote: > Adoption of Linux commit: > > | commit c5a8045a553e32529ffb6bfb33fcad4d38aec2c7 > | Author: Emil Lundmark > | Date: Wed Oct 12 12:31:41 2016 +0200 > | > | clk: imx: improve precision of AV PLL to 1 Hz > | > | The audio and video PLLs are designed to have a precision of 1 Hz if some > | conditions are met. The current implementation only allows a precision that > | depends on the rate of the parent clock. E.g., if the parent clock is 24 > | MHz, the precision will be 24 Hz; or more generally the precision will be > | > | p / 10^6 Hz > | > | where p is the parent clock rate. This comes down to how the register > | values for the PLL's fractional loop divider are chosen. > | > | The clock rate calculation for the PLL is > | > | PLL output frequency = Fref * (DIV_SELECT + NUM / DENOM) > | > | or with a shorter notation > | > | r = p * (d + a / b) > | > | In addition to all variables being integers, we also have the following > | conditions: > | > | 27 <= d <= 54 > | > | -2^29 <= a <= 2^29-1 > | 0 < b <= 2^30-1 > | |a| < b > | > | Here, d, a and b are register values for the fractional loop divider. We > | want to chose d, a and b such that f(p, r) = p, i.e. f is our round_rate > | function. Currently, d and b are chosen as > | > | d = r / p > | b = 10^6 > | > | hence we get the poor precision. And a is defined in terms of r, d, p and > | b: > | > | a = (r - d * p) * b / p > | > | I propose that if p <= 2^30-1 (i.e., the max value for b), we chose b as > | > | b = p > | > | We can do this since > | > | |a| < b > | > | |(r - d * p) * b / p| < b > | > | |r - d * p| < p > | > | Which have two solutions, one of them is when p < 0, so we can skip that > | one. The other is when p > 0 and > | > | p * (d - 1) < r < p * (d + 1) > | > | Substitute d = r / p: > | > | (r - p) < r < (r + p) <=> p > 0 > | > | So, as long as p > 0, we can chose b = p. This is a good choise for b since > | > | a = (r - d * p) * b / p > | = (r - d * p) * p / p > | = r - d * p > | > | r = p * (d + a / b) > | = p * d + p * a / b > | = p * d + p * a / p > | = p * d + a > | > | and if d = r / p: > | > | a = r - d * p > | = r - r / p * p > | = 0 > | > | r = p * d + a > | = p * d + 0 > | = p * r / p > | = r > | > | I reckon this is the intention by the design of the clock rate formula. > | > | Signed-off-by: Emil Lundmark > | Reviewed-by: Fabio Estevam > | Acked-by: Shawn Guo > | Signed-off-by: Stephen Boyd > > [...] Applied, thanks! [1/1] clk: imx: improve precision of AV PLL to 1 Hz https://git.pengutronix.de/cgit/barebox/commit/?id=af3d99396a8b (link may not be stable) Best regards, -- Sascha Hauer