* [PATCH] fixup! video: give struct fb_videomode::pixclock a strong picoseconds_t type
@ 2025-06-02 13:56 Ahmad Fatoum
2025-06-03 7:54 ` Sascha Hauer
0 siblings, 1 reply; 2+ messages in thread
From: Ahmad Fatoum @ 2025-06-02 13:56 UTC (permalink / raw)
To: barebox; +Cc: Ahmad Fatoum
The EDID code has a number of VESA timings, which includes a pixclock,
but was missed as it did initialization of picosecond values directly
without reference to the helper macros.
Add braces to fix this.
Signed-off-by: Ahmad Fatoum <a.fatoum@barebox.org>
---
drivers/video/edid.c | 68 ++++++++++++++++++++++----------------------
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/video/edid.c b/drivers/video/edid.c
index 21e13de73acd..4491dec547c4 100644
--- a/drivers/video/edid.c
+++ b/drivers/video/edid.c
@@ -443,125 +443,125 @@ static void calc_mode_timings(int xres, int yres, int refresh,
const struct fb_videomode vesa_modes[] = {
/* 0 640x350-85 VESA */
- { NULL, 85, 640, 350, 31746, 96, 32, 60, 32, 64, 3,
+ { NULL, 85, 640, 350, {31746}, 96, 32, 60, 32, 64, 3,
FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED, 0},
/* 1 640x400-85 VESA */
- { NULL, 85, 640, 400, 31746, 96, 32, 41, 01, 64, 3,
+ { NULL, 85, 640, 400, {31746}, 96, 32, 41, 01, 64, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
/* 2 720x400-85 VESA */
- { NULL, 85, 721, 400, 28169, 108, 36, 42, 01, 72, 3,
+ { NULL, 85, 721, 400, {28169}, 108, 36, 42, 01, 72, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
/* 3 640x480-60 VESA */
- { NULL, 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2,
+ { NULL, 60, 640, 480, {39682}, 48, 16, 33, 10, 96, 2,
0, FB_VMODE_NONINTERLACED, 0 },
/* 4 640x480-72 VESA */
- { NULL, 72, 640, 480, 31746, 128, 24, 29, 9, 40, 2,
+ { NULL, 72, 640, 480, {31746}, 128, 24, 29, 9, 40, 2,
0, FB_VMODE_NONINTERLACED, 0 },
/* 5 640x480-75 VESA */
- { NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
+ { NULL, 75, 640, 480, {31746}, 120, 16, 16, 01, 64, 3,
0, FB_VMODE_NONINTERLACED, 0 },
/* 6 640x480-85 VESA */
- { NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
+ { NULL, 85, 640, 480, {27777}, 80, 56, 25, 01, 56, 3,
0, FB_VMODE_NONINTERLACED, 0 },
/* 7 800x600-56 VESA */
- { NULL, 56, 800, 600, 27777, 128, 24, 22, 01, 72, 2,
+ { NULL, 56, 800, 600, {27777}, 128, 24, 22, 01, 72, 2,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 8 800x600-60 VESA */
- { NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
+ { NULL, 60, 800, 600, {25000}, 88, 40, 23, 01, 128, 4,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 9 800x600-72 VESA */
- { NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6,
+ { NULL, 72, 800, 600, {20000}, 64, 56, 23, 37, 120, 6,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 10 800x600-75 VESA */
- { NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
+ { NULL, 75, 800, 600, {20202}, 160, 16, 21, 01, 80, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 11 800x600-85 VESA */
- { NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
+ { NULL, 85, 800, 600, {17761}, 152, 32, 27, 01, 64, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 12 1024x768i-43 VESA */
- { NULL, 43, 1024, 768, 22271, 56, 8, 41, 0, 176, 8,
+ { NULL, 43, 1024, 768, {22271}, 56, 8, 41, 0, 176, 8,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_INTERLACED, 0 },
/* 13 1024x768-60 VESA */
- { NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
+ { NULL, 60, 1024, 768, {15384}, 160, 24, 29, 3, 136, 6,
0, FB_VMODE_NONINTERLACED, 0 },
/* 14 1024x768-70 VESA */
- { NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6,
+ { NULL, 70, 1024, 768, {13333}, 144, 24, 29, 3, 136, 6,
0, FB_VMODE_NONINTERLACED, 0 },
/* 15 1024x768-75 VESA */
- { NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
+ { NULL, 75, 1024, 768, {12690}, 176, 16, 28, 1, 96, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 16 1024x768-85 VESA */
- { NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
+ { NULL, 85, 1024, 768, {10582}, 208, 48, 36, 1, 96, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 17 1152x864-75 VESA */
- { NULL, 75, 1152, 864, 9259, 256, 64, 32, 1, 128, 3,
+ { NULL, 75, 1152, 864, {9259}, 256, 64, 32, 1, 128, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 18 1280x960-60 VESA */
- { NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
+ { NULL, 60, 1280, 960, {9259}, 312, 96, 36, 1, 112, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 19 1280x960-85 VESA */
- { NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
+ { NULL, 85, 1280, 960, {6734}, 224, 64, 47, 1, 160, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 20 1280x1024-60 VESA */
- { NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
+ { NULL, 60, 1280, 1024, {9259}, 248, 48, 38, 1, 112, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 21 1280x1024-75 VESA */
- { NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
+ { NULL, 75, 1280, 1024, {7407}, 248, 16, 38, 1, 144, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 22 1280x1024-85 VESA */
- { NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
+ { NULL, 85, 1280, 1024, {6349}, 224, 64, 44, 1, 160, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 23 1600x1200-60 VESA */
- { NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
+ { NULL, 60, 1600, 1200, {6172}, 304, 64, 46, 1, 192, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 24 1600x1200-65 VESA */
- { NULL, 65, 1600, 1200, 5698, 304, 64, 46, 1, 192, 3,
+ { NULL, 65, 1600, 1200, {5698}, 304, 64, 46, 1, 192, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 25 1600x1200-70 VESA */
- { NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3,
+ { NULL, 70, 1600, 1200, {5291}, 304, 64, 46, 1, 192, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 26 1600x1200-75 VESA */
- { NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
+ { NULL, 75, 1600, 1200, {4938}, 304, 64, 46, 1, 192, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 27 1600x1200-85 VESA */
- { NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
+ { NULL, 85, 1600, 1200, {4357}, 304, 64, 46, 1, 192, 3,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0 },
/* 28 1792x1344-60 VESA */
- { NULL, 60, 1792, 1344, 4882, 328, 128, 46, 1, 200, 3,
+ { NULL, 60, 1792, 1344, {4882}, 328, 128, 46, 1, 200, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
/* 29 1792x1344-75 VESA */
- { NULL, 75, 1792, 1344, 3831, 352, 96, 69, 1, 216, 3,
+ { NULL, 75, 1792, 1344, {3831}, 352, 96, 69, 1, 216, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
/* 30 1856x1392-60 VESA */
- { NULL, 60, 1856, 1392, 4580, 352, 96, 43, 1, 224, 3,
+ { NULL, 60, 1856, 1392, {4580}, 352, 96, 43, 1, 224, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
/* 31 1856x1392-75 VESA */
- { NULL, 75, 1856, 1392, 3472, 352, 128, 104, 1, 224, 3,
+ { NULL, 75, 1856, 1392, {3472}, 352, 128, 104, 1, 224, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
/* 32 1920x1440-60 VESA */
- { NULL, 60, 1920, 1440, 4273, 344, 128, 56, 1, 200, 3,
+ { NULL, 60, 1920, 1440, {4273}, 344, 128, 56, 1, 200, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
/* 33 1920x1440-75 VESA */
- { NULL, 75, 1920, 1440, 3367, 352, 144, 56, 1, 224, 3,
+ { NULL, 75, 1920, 1440, {3367}, 352, 144, 56, 1, 224, 3,
FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0 },
};
--
2.39.5
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] fixup! video: give struct fb_videomode::pixclock a strong picoseconds_t type
2025-06-02 13:56 [PATCH] fixup! video: give struct fb_videomode::pixclock a strong picoseconds_t type Ahmad Fatoum
@ 2025-06-03 7:54 ` Sascha Hauer
0 siblings, 0 replies; 2+ messages in thread
From: Sascha Hauer @ 2025-06-03 7:54 UTC (permalink / raw)
To: barebox, Ahmad Fatoum
On Mon, 02 Jun 2025 15:56:34 +0200, Ahmad Fatoum wrote:
> The EDID code has a number of VESA timings, which includes a pixclock,
> but was missed as it did initialization of picosecond values directly
> without reference to the helper macros.
>
> Add braces to fix this.
>
>
> [...]
Applied, thanks!
[1/1] fixup! video: give struct fb_videomode::pixclock a strong picoseconds_t type
https://git.pengutronix.de/cgit/barebox/commit/?id=3258ee703b67 (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
^ permalink raw reply [flat|nested] 2+ messages in thread
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