From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org,
Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: Bruno Knittel <bruno.knittel@bruker.com>
Subject: Re: [PATCH 0/2] ARM: socfpga: arria10: earlier debug output
Date: Mon, 17 Nov 2025 09:37:39 +0100 [thread overview]
Message-ID: <176336865951.1294414.950972613413884572.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20251114-v2025-11-0-topic-socfpga-arria10-v1-0-e091cddacea5@pengutronix.de>
On Fri, 14 Nov 2025 08:23:14 +0100, Steffen Trumtrar wrote:
> The UART is a dedicated peripheral on Arria10 and therefore can be used
> without the FPGA bitstream loaded. Move the lowlevel UART init to an
> earlier stage to get debugging output for the DDR and FPGA setup .
>
> Tested on the Reflex Achilles.
>
>
> [...]
Applied, thanks!
[1/2] ARM: socfpga: arria10-reset-manager: release UART0
https://git.pengutronix.de/cgit/barebox/commit/?id=0ecec7397757 (link may not be stable)
[2/2] ARM: socfpga: arria10-init: setup uart earlier
https://git.pengutronix.de/cgit/barebox/commit/?id=5378bef5c19e (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
prev parent reply other threads:[~2025-11-17 8:38 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-14 7:23 Steffen Trumtrar
2025-11-14 7:23 ` [PATCH 1/2] ARM: socfpga: arria10-reset-manager: release UART0 Steffen Trumtrar
2025-11-14 7:23 ` [PATCH 2/2] ARM: socfpga: arria10-init: setup uart earlier Steffen Trumtrar
2025-11-17 8:37 ` Sascha Hauer [this message]
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