From: Sascha Hauer <s.hauer@pengutronix.de>
To: barebox@lists.infradead.org, Marco Felsch <m.felsch@pengutronix.de>
Subject: Re: [PATCH] ARM: mach-imx: tzasc: keep default region 0 secure settings for i.MX8M
Date: Mon, 23 Feb 2026 12:33:11 +0100 [thread overview]
Message-ID: <177184639185.226900.11820213467666885517.b4-ty@pengutronix.de> (raw)
In-Reply-To: <20250901103039.914774-1-m.felsch@pengutronix.de>
On Mon, 01 Sep 2025 12:29:37 +0200, Marco Felsch wrote:
> The TZC-380 region 0 is the TZC default (fallback) region. This region
> is used if access to a certain DRAM address was done which isn't
> configured by any other region (see [1] for more information). Region 0
> covers the complete AXI space from 0x0 to AXI-bus width. The access is
> secure-only after reset.
>
> The TZC-380 is not memory alias aware (see [1] for more information) and
> due to the DDR controller, the i.MX8M allows memory alias access.
>
> [...]
Applied, thanks!
[1/1] ARM: mach-imx: tzasc: keep default region 0 secure settings for i.MX8M
https://git.pengutronix.de/cgit/barebox/commit/?id=32b6d7acca5e (link may not be stable)
Best regards,
--
Sascha Hauer <s.hauer@pengutronix.de>
prev parent reply other threads:[~2026-02-23 11:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-01 10:29 Marco Felsch
2025-09-03 7:54 ` Sascha Hauer
2025-09-03 12:41 ` Marco Felsch
2025-09-04 6:44 ` Sascha Hauer
2025-10-17 9:52 ` Marco Felsch
2026-02-04 14:50 ` Marco Felsch
2026-02-23 11:33 ` Sascha Hauer [this message]
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