Re: [PATCH 0/6] mci: rockchip-dwcmshc: add HS200 support

[Sascha Hauer <s.hauer@pengutronix.de>]

On Thu, 07 May 2026 09:02:46 +0200, Sascha Hauer wrote:
> At least on RK3588 the dwcmshc core doesn't have an internal clock
> divider, we fully rely on the clock tree to configure the MMC clock.
> By default the clock comes from the 24MHz oscillator. For higher MMC
> clocks we have to reparent to a PLL clock, but if we do this once the
> 6bit divider iss not enough to scale down to the 400kHz MMC
> initialization clock. This means we must dynamically reparent the clock.
> This series adds support for finding the best divider/mux combination
> for composite clocks.
> 
> [...]

Applied, thanks!

[1/6] mci: sdhci: rockchip: set hidspd before re-enabling the clock
      https://git.pengutronix.de/cgit/barebox/commit/?id=8cc8bf143173 (link may not be stable)
[2/6] mci: sdhci: rockchip: disable clock while setting DLL
      https://git.pengutronix.de/cgit/barebox/commit/?id=4a0eafdd2baf (link may not be stable)
[3/6] mci: sdhci: rockchip: Wait for transfer complete interrupt with MMC_RSP_BUSY cmd
      https://git.pengutronix.de/cgit/barebox/commit/?id=682257a3ad37 (link may not be stable)
[4/6] mci: sdhci: rockchip: Update pre-change delay for rockchip platform
      https://git.pengutronix.de/cgit/barebox/commit/?id=0d405731e2bd (link may not be stable)
[5/6] clk: composite: pick best parent for round_rate / set_rate
      https://git.pengutronix.de/cgit/barebox/commit/?id=5fc97d72534a (link may not be stable)
[6/6] mci: sdhci: rockchip: officially support HS200
      https://git.pengutronix.de/cgit/barebox/commit/?id=5d192c4794c0 (link may not be stable)

Best regards,
-- 
Sascha Hauer <s.hauer@pengutronix.de>