* [PATCH 01/11] i.MX27: merge iomux pim definitions from kernel
2010-06-24 9:39 assorted patches Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 02/11] imxfb: Add board specific hook to enable display Sascha Hauer
` (10 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
The Kernel pin definitions are more complete and up to date. Being
here we also use seperate files for the iomuxer like the other
i.MX SoCs already do.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/include/mach/imx21-regs.h | 33 ----
arch/arm/mach-imx/include/mach/imx27-regs.h | 93 -----------
arch/arm/mach-imx/include/mach/iomux-mx21.h | 121 ++++++++++++++
arch/arm/mach-imx/include/mach/iomux-mx27.h | 204 ++++++++++++++++++++++++
arch/arm/mach-imx/include/mach/iomux-mx2x.h | 230 +++++++++++++++++++++++++++
board/eukrea_cpuimx27/eukrea_cpuimx27.c | 3 +-
board/imx21ads/imx21ads.c | 1 +
board/imx27ads/imx27ads.c | 3 +-
board/pcm038/pcm038.c | 3 +-
board/phycard-i.MX27/pca100.c | 3 +-
10 files changed, 564 insertions(+), 130 deletions(-)
create mode 100644 arch/arm/mach-imx/include/mach/iomux-mx21.h
create mode 100644 arch/arm/mach-imx/include/mach/iomux-mx27.h
create mode 100644 arch/arm/mach-imx/include/mach/iomux-mx2x.h
diff --git a/arch/arm/mach-imx/include/mach/imx21-regs.h b/arch/arm/mach-imx/include/mach/imx21-regs.h
index 3d21749..6d64b81 100644
--- a/arch/arm/mach-imx/include/mach/imx21-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx21-regs.h
@@ -115,39 +115,6 @@
#define CCSR_32K_SR (1 << 15)
-#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
-#define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
-#define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
-#define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
-#define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
-#define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
-#define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
-#define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
-#define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
-#define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
-#define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
-#define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
-#define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
-#define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
-#define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
-#define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
-#define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
-#define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
-#define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
-#define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
-#define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
-#define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
-#define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
-#define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
-#define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
-#define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
-#define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
-
-#define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 12)
-#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13)
-#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14)
-#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15)
-
/*
* Definitions for the clocksource driver
*/
diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h
index 4e22612..d804a9d 100644
--- a/arch/arm/mach-imx/include/mach/imx27-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx27-regs.h
@@ -232,99 +232,6 @@
#define ESDMISC_MA10_SHARE (1 << 6)
#define ESDMISC_SDRAM_RDY (1 << 6)
-#define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0)
-#define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1)
-#define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2)
-#define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3)
-#define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4)
-#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
-#define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
-#define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
-#define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
-#define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
-#define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
-#define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
-#define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
-#define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
-#define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
-#define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
-#define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
-#define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
-#define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
-#define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
-#define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
-#define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
-#define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
-#define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
-#define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
-#define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
-#define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
-#define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
-#define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
-#define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
-#define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
-#define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
-#define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 0)
-#define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 1)
-#define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 2)
-#define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 3)
-#define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 4)
-#define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 5)
-#define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 6)
-#define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 7)
-#define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_IN | GPIO_AF | 8)
-#define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 9)
-#define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 10)
-#define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 11)
-#define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 12)
-#define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 13)
-#define PD14_AOUT_FEC_CLR (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 14)
-#define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 15)
-#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 16)
-#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17)
-#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18)
-#define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19)
-#define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20)
-#define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21)
-#define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22)
-#define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23)
-#define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24)
-#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25)
-#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26)
-#define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26)
-#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27)
-#define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28)
-#define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29)
-#define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_IN | GPIO_PF | 30)
-#define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_OUT | GPIO_PF | 31)
-#define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_OUT | GPIO_AIN | 23)
-#define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3)
-#define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 4)
-#define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6)
-#define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 7)
-#define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 8)
-#define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 9)
-#define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 10)
-#define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 11)
-#define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 12)
-#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13)
-#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14)
-#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15)
-#define PC5_PF_I2C2_DATA (GPIO_PORTC | GPIO_OUT | GPIO_PF | 5)
-#define PC6_PF_I2C2_CLK (GPIO_PORTC | GPIO_OUT | GPIO_PF | 6)
-#define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7)
-#define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8)
-#define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
-#define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10)
-#define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
-#define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12)
-#define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13)
-#define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0)
-#define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1)
-#define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2)
-#define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24)
-#define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25)
-
/*
* Definitions for the clocksource driver
*/
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx21.h b/arch/arm/mach-imx/include/mach/iomux-mx21.h
new file mode 100644
index 0000000..c7218bc
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/iomux-mx21.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX21_H__
+#define __MACH_IOMUX_MX21_H__
+
+#include <mach/iomux-mx2x.h>
+
+/* Primary GPIO pin functions */
+
+#define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22)
+#define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25)
+#define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5)
+#define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6)
+#define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7)
+#define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8)
+#define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9)
+#define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10)
+#define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11)
+#define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12)
+#define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13)
+#define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16)
+#define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17)
+#define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18)
+#define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19)
+#define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0)
+#define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1)
+#define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2)
+#define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1)
+#define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3)
+#define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7)
+#define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8)
+#define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9)
+#define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10)
+#define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11)
+#define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12)
+#define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13)
+#define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14)
+#define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16)
+
+/* Alternate GPIO pin functions */
+
+#define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5)
+#define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6)
+#define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7)
+#define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8)
+#define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9)
+#define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10)
+#define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11)
+#define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12)
+#define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13)
+#define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14)
+#define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15)
+#define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16)
+#define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17)
+#define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18)
+#define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19)
+#define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20)
+#define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21)
+#define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22)
+#define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23)
+#define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29)
+#define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30)
+
+/* AIN GPIO pin functions */
+
+#define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
+#define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
+#define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
+#define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
+#define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
+#define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
+#define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
+#define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
+#define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
+#define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
+#define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
+#define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
+
+/* BIN GPIO pin functions */
+
+#define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
+#define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
+
+/* CIN GPIO pin functions */
+
+#define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
+
+/* AOUT GPIO pin functions */
+
+#define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
+#define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
+#define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
+#define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
+#define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
+#define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
+#define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
+#define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
+#define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
+#define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
+#define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
+#define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
+#define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
+#define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
+#define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
+
+#endif /* ifndef __MACH_IOMUX_MX21_H__ */
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx27.h b/arch/arm/mach-imx/include/mach/iomux-mx27.h
new file mode 100644
index 0000000..993b141
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/iomux-mx27.h
@@ -0,0 +1,204 @@
+/*
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX27_H__
+#define __MACH_IOMUX_MX27_H__
+
+#include <mach/iomux-mx2x.h>
+
+/* Primary GPIO pin functions */
+
+#define PA0_PF_USBH2_CLK (GPIO_PORTA | GPIO_PF | 0)
+#define PA1_PF_USBH2_DIR (GPIO_PORTA | GPIO_PF | 1)
+#define PA2_PF_USBH2_DATA7 (GPIO_PORTA | GPIO_PF | 2)
+#define PA3_PF_USBH2_NXT (GPIO_PORTA | GPIO_PF | 3)
+#define PA4_PF_USBH2_STP (GPIO_PORTA | GPIO_PF | 4)
+#define PB22_PF_USBH1_SUSP (GPIO_PORTB | GPIO_PF | 22)
+#define PB25_PF_USBH1_RCV (GPIO_PORTB | GPIO_PF | 25)
+#define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_PF | GPIO_IN | 5)
+#define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_PF | GPIO_IN | 6)
+#define PC7_PF_USBOTG_DATA5 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 7)
+#define PC8_PF_USBOTG_DATA6 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 8)
+#define PC9_PF_USBOTG_DATA0 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 9)
+#define PC10_PF_USBOTG_DATA2 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 10)
+#define PC11_PF_USBOTG_DATA1 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 11)
+#define PC12_PF_USBOTG_DATA4 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 12)
+#define PC13_PF_USBOTG_DATA3 (GPIO_PORTC | GPIO_PF | GPIO_OUT | 13)
+#define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 16)
+#define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 17)
+#define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 18)
+#define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 19)
+#define PD0_PF_SD3_CMD (GPIO_PORTD | GPIO_PF | 0)
+#define PD1_PF_SD3_CLK (GPIO_PORTD | GPIO_PF | 1)
+#define PD2_PF_ATA_DATA0 (GPIO_PORTD | GPIO_PF | 2)
+#define PD3_PF_ATA_DATA1 (GPIO_PORTD | GPIO_PF | 3)
+#define PD4_PF_ATA_DATA2 (GPIO_PORTD | GPIO_PF | 4)
+#define PD5_PF_ATA_DATA3 (GPIO_PORTD | GPIO_PF | 5)
+#define PD6_PF_ATA_DATA4 (GPIO_PORTD | GPIO_PF | 6)
+#define PD7_PF_ATA_DATA5 (GPIO_PORTD | GPIO_PF | 7)
+#define PD8_PF_ATA_DATA6 (GPIO_PORTD | GPIO_PF | 8)
+#define PD9_PF_ATA_DATA7 (GPIO_PORTD | GPIO_PF | 9)
+#define PD10_PF_ATA_DATA8 (GPIO_PORTD | GPIO_PF | 10)
+#define PD11_PF_ATA_DATA9 (GPIO_PORTD | GPIO_PF | 11)
+#define PD12_PF_ATA_DATA10 (GPIO_PORTD | GPIO_PF | 12)
+#define PD13_PF_ATA_DATA11 (GPIO_PORTD | GPIO_PF | 13)
+#define PD14_PF_ATA_DATA12 (GPIO_PORTD | GPIO_PF | 14)
+#define PD15_PF_ATA_DATA13 (GPIO_PORTD | GPIO_PF | 15)
+#define PD16_PF_ATA_DATA14 (GPIO_PORTD | GPIO_PF | 16)
+#define PE0_PF_USBOTG_NXT (GPIO_PORTE | GPIO_PF | GPIO_OUT | 0)
+#define PE1_PF_USBOTG_STP (GPIO_PORTE | GPIO_PF | GPIO_OUT | 1)
+#define PE2_PF_USBOTG_DIR (GPIO_PORTE | GPIO_PF | GPIO_OUT | 2)
+#define PE24_PF_USBOTG_CLK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 24)
+#define PE25_PF_USBOTG_DATA7 (GPIO_PORTE | GPIO_PF | GPIO_OUT | 25)
+#define PF1_PF_NFCLE (GPIO_PORTF | GPIO_PF | 1)
+#define PF3_PF_NFCE (GPIO_PORTF | GPIO_PF | 3)
+#define PF7_PF_PC_POE (GPIO_PORTF | GPIO_PF | 7)
+#define PF8_PF_PC_RW (GPIO_PORTF | GPIO_PF | 8)
+#define PF9_PF_PC_IOIS16 (GPIO_PORTF | GPIO_PF | 9)
+#define PF10_PF_PC_RST (GPIO_PORTF | GPIO_PF | 10)
+#define PF11_PF_PC_BVD2 (GPIO_PORTF | GPIO_PF | 11)
+#define PF12_PF_PC_BVD1 (GPIO_PORTF | GPIO_PF | 12)
+#define PF13_PF_PC_VS2 (GPIO_PORTF | GPIO_PF | 13)
+#define PF14_PF_PC_VS1 (GPIO_PORTF | GPIO_PF | 14)
+#define PF16_PF_PC_PWRON (GPIO_PORTF | GPIO_PF | 16)
+#define PF17_PF_PC_READY (GPIO_PORTF | GPIO_PF | 17)
+#define PF18_PF_PC_WAIT (GPIO_PORTF | GPIO_PF | 18)
+#define PF19_PF_PC_CD2 (GPIO_PORTF | GPIO_PF | 19)
+#define PF20_PF_PC_CD1 (GPIO_PORTF | GPIO_PF | 20)
+#define PF23_PF_ATA_DATA15 (GPIO_PORTF | GPIO_PF | 23)
+
+/* Alternate GPIO pin functions */
+
+#define PB4_AF_MSHC_DATA0 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 4)
+#define PB5_AF_MSHC_DATA1 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 5)
+#define PB6_AF_MSHC_DATA2 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 6)
+#define PB7_AF_MSHC_DATA4 (GPIO_PORTB | GPIO_AF | GPIO_OUT | 7)
+#define PB8_AF_MSHC_BS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 8)
+#define PB9_AF_MSHC_SCLK (GPIO_PORTB | GPIO_AF | GPIO_OUT | 9)
+#define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 10)
+#define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 11)
+#define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 12)
+#define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 13)
+#define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 18)
+#define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 19)
+#define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 20)
+#define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 21)
+#define PC8_AF_FEC_MDIO (GPIO_PORTC | GPIO_AF | GPIO_IN | 8)
+#define PC24_AF_GPT5_TOUT (GPIO_PORTC | GPIO_AF | 24)
+#define PC25_AF_GPT5_TIN (GPIO_PORTC | GPIO_AF | 25)
+#define PC26_AF_GPT4_TOUT (GPIO_PORTC | GPIO_AF | 26)
+#define PC27_AF_GPT4_TIN (GPIO_PORTC | GPIO_AF | 27)
+#define PD1_AF_ETMTRACE_PKT15 (GPIO_PORTD | GPIO_AF | 1)
+#define PD6_AF_ETMTRACE_PKT14 (GPIO_PORTD | GPIO_AF | 6)
+#define PD7_AF_ETMTRACE_PKT13 (GPIO_PORTD | GPIO_AF | 7)
+#define PD9_AF_ETMTRACE_PKT12 (GPIO_PORTD | GPIO_AF | 9)
+#define PD2_AF_SD3_D0 (GPIO_PORTD | GPIO_AF | 2)
+#define PD3_AF_SD3_D1 (GPIO_PORTD | GPIO_AF | 3)
+#define PD4_AF_SD3_D2 (GPIO_PORTD | GPIO_AF | 4)
+#define PD5_AF_SD3_D3 (GPIO_PORTD | GPIO_AF | 5)
+#define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_AF | GPIO_IN | 8)
+#define PD10_AF_ETMTRACE_PKT11 (GPIO_PORTD | GPIO_AF | 10)
+#define PD11_AF_ETMTRACE_PKT10 (GPIO_PORTD | GPIO_AF | 11)
+#define PD12_AF_ETMTRACE_PKT9 (GPIO_PORTD | GPIO_AF | 12)
+#define PD13_AF_ETMTRACE_PKT8 (GPIO_PORTD | GPIO_AF | 13)
+#define PD14_AF_ETMTRACE_PKT7 (GPIO_PORTD | GPIO_AF | 14)
+#define PD15_AF_ETMTRACE_PKT6 (GPIO_PORTD | GPIO_AF | 15)
+#define PD16_AF_ETMTRACE_PKT5 (GPIO_PORTD | GPIO_AF | 16)
+#define PF1_AF_ETMTRACE_PKT0 (GPIO_PORTF | GPIO_AF | 1)
+#define PF3_AF_ETMTRACE_PKT2 (GPIO_PORTF | GPIO_AF | 3)
+#define PF5_AF_ETMPIPESTAT11 (GPIO_PORTF | GPIO_AF | 5)
+#define PF7_AF_ATA_BUFFER_EN (GPIO_PORTF | GPIO_AF | 7)
+#define PF8_AF_ATA_IORDY (GPIO_PORTF | GPIO_AF | 8)
+#define PF9_AF_ATA_INTRQ (GPIO_PORTF | GPIO_AF | 9)
+#define PF10_AF_ATA_RESET (GPIO_PORTF | GPIO_AF | 10)
+#define PF11_AF_ATA_DMACK (GPIO_PORTF | GPIO_AF | 11)
+#define PF12_AF_ATA_DMAREQ (GPIO_PORTF | GPIO_AF | 12)
+#define PF13_AF_ATA_DA0 (GPIO_PORTF | GPIO_AF | 13)
+#define PF14_AF_ATA_DA1 (GPIO_PORTF | GPIO_AF | 14)
+#define PF15_AF_ETMTRACE_SYNC (GPIO_PORTF | GPIO_AF | 15)
+#define PF16_AF_ATA_DA2 (GPIO_PORTF | GPIO_AF | 16)
+#define PF17_AF_ATA_CS0 (GPIO_PORTF | GPIO_AF | 17)
+#define PF18_AF_ATA_CS1 (GPIO_PORTF | GPIO_AF | 18)
+#define PF19_AF_ATA_DIOW (GPIO_PORTF | GPIO_AF | 19)
+#define PF20_AF_ATA_DIOR (GPIO_PORTF | GPIO_AF | 20)
+#define PF22_AF_ETMTRACE_CLK (GPIO_PORTF | GPIO_AF | 22)
+#define PF23_AF_ETMTRACE_PKT4 (GPIO_PORTF | GPIO_AF | 23)
+
+/* AIN GPIO pin functions */
+
+#define PC14_AIN_SSI1_MCLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
+#define PC15_AIN_GPT6_TOUT (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 15)
+#define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 0)
+#define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 1)
+#define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 2)
+#define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 3)
+#define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 9)
+#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 16)
+#define PD27_AIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 27)
+#define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 23)
+
+/* BIN GPIO pin functions */
+
+#define PC14_BIN_SSI2_MCLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
+
+/* CIN GPIO pin functions */
+
+#define PD2_CIN_SLCDC1_DAT0 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 2)
+#define PD3_CIN_SLCDC1_DAT1 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 3)
+#define PD4_CIN_SLCDC1_DAT2 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 4)
+#define PD5_CIN_SLCDC1_DAT3 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 5)
+#define PD6_CIN_SLCDC1_DAT4 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 6)
+#define PD7_CIN_SLCDC1_DAT5 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 7)
+#define PD8_CIN_SLCDC1_DAT6 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 8)
+#define PD9_CIN_SLCDC1_DAT7 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 9)
+#define PD10_CIN_SLCDC1_DAT8 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 10)
+#define PD11_CIN_SLCDC1_DAT9 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 11)
+#define PD12_CIN_SLCDC1_DAT10 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 12)
+#define PD13_CIN_SLCDC1_DAT11 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 13)
+#define PD14_CIN_SLCDC1_DAT12 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 14)
+#define PD15_CIN_SLCDC1_DAT13 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 15)
+#define PD16_CIN_SLCDC1_DAT14 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 16)
+#define PD23_CIN_SLCDC1_DAT15 (GPIO_PORTD | GPIO_CIN | GPIO_OUT | 23)
+#define PF27_CIN_EXT_DMA_GRANT (GPIO_PORTF | GPIO_CIN | GPIO_OUT | 27)
+/* LCDC_TESTx on PBxx omitted, because it's not clear what they do */
+
+/* AOUT GPIO pin functions */
+
+#define PC14_AOUT_GPT6_TIN (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 14)
+#define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 4)
+#define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 5)
+#define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 6)
+#define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 7)
+#define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 10)
+#define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 11)
+#define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 12)
+#define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 13)
+#define PD14_AOUT_FEC_RX_CLK (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 14)
+#define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 15)
+
+/* BOUT GPIO pin functions */
+
+#define PC17_BOUT_PC_IOIS16 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 17)
+#define PC18_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 18)
+#define PC19_BOUT_PC_BVD1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 19)
+#define PC28_BOUT_PC_BVD2 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 28)
+#define PC29_BOUT_PC_VS1 (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 29)
+#define PC30_BOUT_PC_READY (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 30)
+#define PC31_BOUT_PC_WAIT (GPIO_PORTC | GPIO_BOUT | GPIO_IN | 31)
+
+#endif /* __MACH_IOMUX_MX27_H__ */
diff --git a/arch/arm/mach-imx/include/mach/iomux-mx2x.h b/arch/arm/mach-imx/include/mach/iomux-mx2x.h
new file mode 100644
index 0000000..c4f116d
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/iomux-mx2x.h
@@ -0,0 +1,230 @@
+/*
+ * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
+ * Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+#ifndef __MACH_IOMUX_MX2x_H__
+#define __MACH_IOMUX_MX2x_H__
+
+/* Primary GPIO pin functions */
+
+#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_PF | GPIO_OUT | 5)
+#define PA6_PF_LD0 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 6)
+#define PA7_PF_LD1 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 7)
+#define PA8_PF_LD2 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 8)
+#define PA9_PF_LD3 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 9)
+#define PA10_PF_LD4 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 10)
+#define PA11_PF_LD5 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 11)
+#define PA12_PF_LD6 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 12)
+#define PA13_PF_LD7 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 13)
+#define PA14_PF_LD8 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 14)
+#define PA15_PF_LD9 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 15)
+#define PA16_PF_LD10 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 16)
+#define PA17_PF_LD11 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 17)
+#define PA18_PF_LD12 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 18)
+#define PA19_PF_LD13 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 19)
+#define PA20_PF_LD14 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 20)
+#define PA21_PF_LD15 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 21)
+#define PA22_PF_LD16 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 22)
+#define PA23_PF_LD17 (GPIO_PORTA | GPIO_PF | GPIO_OUT | 23)
+#define PA24_PF_REV (GPIO_PORTA | GPIO_PF | GPIO_OUT | 24)
+#define PA25_PF_CLS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 25)
+#define PA26_PF_PS (GPIO_PORTA | GPIO_PF | GPIO_OUT | 26)
+#define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_PF | GPIO_OUT | 27)
+#define PA28_PF_HSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 28)
+#define PA29_PF_VSYNC (GPIO_PORTA | GPIO_PF | GPIO_OUT | 29)
+#define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_PF | GPIO_OUT | 30)
+#define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_PF | GPIO_OUT | 31)
+#define PB4_PF_SD2_D0 (GPIO_PORTB | GPIO_PF | 4)
+#define PB5_PF_SD2_D1 (GPIO_PORTB | GPIO_PF | 5)
+#define PB6_PF_SD2_D2 (GPIO_PORTB | GPIO_PF | 6)
+#define PB7_PF_SD2_D3 (GPIO_PORTB | GPIO_PF | 7)
+#define PB8_PF_SD2_CMD (GPIO_PORTB | GPIO_PF | 8)
+#define PB9_PF_SD2_CLK (GPIO_PORTB | GPIO_PF | 9)
+#define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 10)
+#define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 11)
+#define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 12)
+#define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 13)
+#define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 14)
+#define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 15)
+#define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_PF | GPIO_OUT | 16)
+#define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 17)
+#define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 18)
+#define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_PF | GPIO_OUT | 19)
+#define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 20)
+#define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_PF | GPIO_OUT | 21)
+#define PB23_PF_USB_PWR (GPIO_PORTB | GPIO_PF | 23)
+#define PB24_PF_USB_OC (GPIO_PORTB | GPIO_PF | 24)
+#define PB26_PF_USBH1_FS (GPIO_PORTB | GPIO_PF | 26)
+#define PB27_PF_USBH1_OE (GPIO_PORTB | GPIO_PF | 27)
+#define PB28_PF_USBH1_TXDM (GPIO_PORTB | GPIO_PF | 28)
+#define PB29_PF_USBH1_TXDP (GPIO_PORTB | GPIO_PF | 29)
+#define PB30_PF_USBH1_RXDM (GPIO_PORTB | GPIO_PF | 30)
+#define PB31_PF_USBH1_RXDP (GPIO_PORTB | GPIO_PF | 31)
+#define PC14_PF_TOUT (GPIO_PORTC | GPIO_PF | 14)
+#define PC15_PF_TIN (GPIO_PORTC | GPIO_PF | 15)
+#define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 20)
+#define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 21)
+#define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 22)
+#define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 23)
+#define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 24)
+#define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 25)
+#define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 26)
+#define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 27)
+#define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_PF | GPIO_IN | 28)
+#define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 29)
+#define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_PF | GPIO_IN | 30)
+#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_PF | GPIO_IN | 31)
+#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_PF | GPIO_OUT | 17)
+#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 18)
+#define PD19_PF_CSPI2_SS2 (GPIO_PORTD | GPIO_PF | 19)
+#define PD20_PF_CSPI2_SS1 (GPIO_PORTD | GPIO_PF | 20)
+#define PD21_PF_CSPI2_SS0 (GPIO_PORTD | GPIO_PF | 21)
+#define PD22_PF_CSPI2_SCLK (GPIO_PORTD | GPIO_PF | 22)
+#define PD23_PF_CSPI2_MISO (GPIO_PORTD | GPIO_PF | 23)
+#define PD24_PF_CSPI2_MOSI (GPIO_PORTD | GPIO_PF | 24)
+#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_PF | GPIO_OUT | 25)
+#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 26)
+#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 27)
+#define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_PF | GPIO_OUT | 28)
+#define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_PF | GPIO_OUT | 29)
+#define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_PF | GPIO_IN | 30)
+#define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_PF | GPIO_OUT | 31)
+#define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 3)
+#define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 4)
+#define PE5_PF_PWMO (GPIO_PORTE | GPIO_PF | 5)
+#define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 6)
+#define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 7)
+#define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 8)
+#define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 9)
+#define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 10)
+#define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 11)
+#define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_PF | GPIO_OUT | 12)
+#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_PF | GPIO_IN | 13)
+#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_PF | GPIO_OUT | 14)
+#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_PF | GPIO_IN | 15)
+#define PE16_PF_RTCK (GPIO_PORTE | GPIO_PF | GPIO_OUT | 16)
+#define PE17_PF_RESET_OUT (GPIO_PORTE | GPIO_PF | 17)
+#define PE18_PF_SD1_D0 (GPIO_PORTE | GPIO_PF | 18)
+#define PE19_PF_SD1_D1 (GPIO_PORTE | GPIO_PF | 19)
+#define PE20_PF_SD1_D2 (GPIO_PORTE | GPIO_PF | 20)
+#define PE21_PF_SD1_D3 (GPIO_PORTE | GPIO_PF | 21)
+#define PE22_PF_SD1_CMD (GPIO_PORTE | GPIO_PF | 22)
+#define PE23_PF_SD1_CLK (GPIO_PORTE | GPIO_PF | 23)
+#define PF0_PF_NRFB (GPIO_PORTF | GPIO_PF | 0)
+#define PF2_PF_NFWP (GPIO_PORTF | GPIO_PF | 2)
+#define PF4_PF_NFALE (GPIO_PORTF | GPIO_PF | 4)
+#define PF5_PF_NFRE (GPIO_PORTF | GPIO_PF | 5)
+#define PF6_PF_NFWE (GPIO_PORTF | GPIO_PF | 6)
+#define PF15_PF_CLKO (GPIO_PORTF | GPIO_PF | 15)
+#define PF21_PF_CS4 (GPIO_PORTF | GPIO_PF | 21)
+#define PF22_PF_CS5 (GPIO_PORTF | GPIO_PF | 22)
+
+/* Alternate GPIO pin functions */
+
+#define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_AF | GPIO_IN | 26)
+#define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_AF | GPIO_OUT | 28)
+#define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_AF | GPIO_OUT | 29)
+#define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_AF | GPIO_IN | 31)
+#define PC28_AF_SLCDC2_D0 (GPIO_PORTC | GPIO_AF | 28)
+#define PC29_AF_SLCDC2_RS (GPIO_PORTC | GPIO_AF | 29)
+#define PC30_AF_SLCDC2_CS (GPIO_PORTC | GPIO_AF | 30)
+#define PC31_AF_SLCDC2_CLK (GPIO_PORTC | GPIO_AF | 31)
+#define PD19_AF_USBH2_DATA4 (GPIO_PORTD | GPIO_AF | 19)
+#define PD20_AF_USBH2_DATA3 (GPIO_PORTD | GPIO_AF | 20)
+#define PD21_AF_USBH2_DATA6 (GPIO_PORTD | GPIO_AF | 21)
+#define PD22_AF_USBH2_DATA0 (GPIO_PORTD | GPIO_AF | 22)
+#define PD23_AF_USBH2_DATA2 (GPIO_PORTD | GPIO_AF | 23)
+#define PD24_AF_USBH2_DATA1 (GPIO_PORTD | GPIO_AF | 24)
+#define PD26_AF_USBH2_DATA5 (GPIO_PORTD | GPIO_AF | 26)
+#define PE0_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 0)
+#define PE1_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 1)
+#define PE2_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 2)
+#define PE3_AF_KP_COL7 (GPIO_PORTE | GPIO_AF | 3)
+#define PE4_AF_KP_ROW7 (GPIO_PORTE | GPIO_AF | 4)
+#define PE6_AF_KP_COL6 (GPIO_PORTE | GPIO_AF | 6)
+#define PE7_AF_KP_ROW6 (GPIO_PORTE | GPIO_AF | 7)
+#define PE16_AF_OWIRE (GPIO_PORTE | GPIO_AF | 16)
+#define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_AF | GPIO_IN | 18)
+#define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_AF | GPIO_OUT | 21)
+#define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_AF | GPIO_OUT | 22)
+#define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_AF | GPIO_OUT | 23)
+
+/* AIN GPIO pin functions */
+
+#define PA6_AIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 6)
+#define PA7_AIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 7)
+#define PA8_AIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 8)
+#define PA0_AIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 0)
+#define PA11_AIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 11)
+#define PA13_AIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 13)
+#define PA15_AIN_SLCDC1_DAT9 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 15)
+#define PA17_AIN_SLCDC1_DAT11 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 17)
+#define PA19_AIN_SLCDC1_DAT13 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 19)
+#define PA21_AIN_SLCDC1_DAT15 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 21)
+#define PA22_AIN_EXT_DMAGRANT (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 22)
+#define PA24_AIN_SLCDC1_D0 (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 24)
+#define PA25_AIN_SLCDC1_RS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 25)
+#define PA26_AIN_SLCDC1_CS (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 26)
+#define PA27_AIN_SLCDC1_CLK (GPIO_PORTA | GPIO_AIN | GPIO_OUT | 27)
+#define PB6_AIN_SLCDC1_D0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 6)
+#define PB7_AIN_SLCDC1_RS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 7)
+#define PB8_AIN_SLCDC1_CS (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 8)
+#define PB9_AIN_SLCDC1_CLK (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 9)
+#define PB25_AIN_SLCDC1_DAT0 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 25)
+#define PB26_AIN_SLCDC1_DAT1 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 26)
+#define PB27_AIN_SLCDC1_DAT2 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 27)
+#define PB28_AIN_SLCDC1_DAT3 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 28)
+#define PB29_AIN_SLCDC1_DAT4 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 29)
+#define PB30_AIN_SLCDC1_DAT5 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 30)
+#define PB31_AIN_SLCDC1_DAT6 (GPIO_PORTB | GPIO_AIN | GPIO_OUT | 31)
+#define PC5_AIN_SLCDC1_DAT7 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 5)
+#define PC6_AIN_SLCDC1_DAT8 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 6)
+#define PC7_AIN_SLCDC1_DAT9 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 7)
+#define PC8_AIN_SLCDC1_DAT10 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 8)
+#define PC9_AIN_SLCDC1_DAT11 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 9)
+#define PC10_AIN_SLCDC1_DAT12 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 10)
+#define PC11_AIN_SLCDC1_DAT13 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 11)
+#define PC12_AIN_SLCDC1_DAT14 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 12)
+#define PC13_AIN_SLCDC1_DAT15 (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 13)
+#define PE5_AIN_PC_SPKOUT (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 5)
+
+/* BIN GPIO pin functions */
+
+#define PE5_BIN_TOUT2 (GPIO_PORTE | GPIO_BIN | GPIO_OUT | 5)
+
+/* CIN GPIO pin functions */
+
+#define PA14_CIN_SLCDC1_DAT0 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 14)
+#define PA15_CIN_SLCDC1_DAT1 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 15)
+#define PA16_CIN_SLCDC1_DAT2 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 16)
+#define PA17_CIN_SLCDC1_DAT3 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 17)
+#define PA18_CIN_SLCDC1_DAT4 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 18)
+#define PA19_CIN_SLCDC1_DAT5 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 19)
+#define PA20_CIN_SLCDC1_DAT6 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 20)
+#define PA21_CIN_SLCDC1_DAT7 (GPIO_PORTA | GPIO_CIN | GPIO_OUT | 21)
+#define PB30_CIN_UART4_CTS (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 30)
+#define PE5_CIN_TOUT3 (GPIO_PORTE | GPIO_CIN | GPIO_OUT | 5)
+
+/* AOUT GPIO pin functions */
+
+#define PB29_AOUT_UART4_RXD (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 29)
+#define PB31_AOUT_UART4_RTS (GPIO_PORTB | GPIO_AOUT | GPIO_IN | 31)
+#define PC8_AOUT_USBOTG_TXR_INT (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 8)
+#define PC15_AOUT_WKGD (GPIO_PORTC | GPIO_AOUT | GPIO_IN | 15)
+#define PF21_AOUT_DTACK (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 21)
+
+#endif /* ifndef __MACH_IOMUX_MX2x_H__ */
diff --git a/board/eukrea_cpuimx27/eukrea_cpuimx27.c b/board/eukrea_cpuimx27/eukrea_cpuimx27.c
index e40c260..1937d21 100644
--- a/board/eukrea_cpuimx27/eukrea_cpuimx27.c
+++ b/board/eukrea_cpuimx27/eukrea_cpuimx27.c
@@ -45,6 +45,7 @@
#include <asm/mmu.h>
#include <i2c/i2c.h>
#include <i2c/lp3972.h>
+#include <mach/iomux-mx27.h>
static struct device_d cfi_dev = {
.name = "cfi_flash",
@@ -230,7 +231,7 @@ static int eukrea_cpuimx27_devices_init(void)
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
- PD14_AOUT_FEC_CLR,
+ PD14_AOUT_FEC_RX_CLK,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
diff --git a/board/imx21ads/imx21ads.c b/board/imx21ads/imx21ads.c
index 9eba19a..5e88af4 100644
--- a/board/imx21ads/imx21ads.c
+++ b/board/imx21ads/imx21ads.c
@@ -35,6 +35,7 @@
#include <asm/mach-types.h>
#include <mach/imx-nand.h>
#include <mach/imxfb.h>
+#include <mach/iomux-mx21.h>
#define MX21ADS_IO_REG 0xCC800000
#define MX21ADS_IO_LCDON (1 << 9)
diff --git a/board/imx27ads/imx27ads.c b/board/imx27ads/imx27ads.c
index 3512ed3..6f31520 100644
--- a/board/imx27ads/imx27ads.c
+++ b/board/imx27ads/imx27ads.c
@@ -31,6 +31,7 @@
#include <fs.h>
#include <fcntl.h>
#include <asm/mach-types.h>
+#include <mach/iomux-mx27.h>
static struct device_d cfi_dev = {
.name = "cfi_flash",
@@ -114,7 +115,7 @@ static int mx27ads_devices_init(void)
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
- PD14_AOUT_FEC_CLR,
+ PD14_AOUT_FEC_RX_CLK,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
diff --git a/board/pcm038/pcm038.c b/board/pcm038/pcm038.c
index fbd53a5..03794fc 100644
--- a/board/pcm038/pcm038.c
+++ b/board/pcm038/pcm038.c
@@ -42,6 +42,7 @@
#include <asm/mmu.h>
#include <usb/isp1504.h>
#include <mach/spi.h>
+#include <mach/iomux-mx27.h>
static struct device_d cfi_dev = {
.name = "cfi_flash",
@@ -229,7 +230,7 @@ static int pcm038_devices_init(void)
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
- PD14_AOUT_FEC_CLR,
+ PD14_AOUT_FEC_RX_CLK,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
diff --git a/board/phycard-i.MX27/pca100.c b/board/phycard-i.MX27/pca100.c
index 2fb1e35..ce59960 100644
--- a/board/phycard-i.MX27/pca100.c
+++ b/board/phycard-i.MX27/pca100.c
@@ -38,6 +38,7 @@
#include <gpio.h>
#include <asm/mmu.h>
#include <usb/isp1504.h>
+#include <mach/iomux-mx27.h>
static struct memory_platform_data ram_pdata = {
.name = "ram0",
@@ -147,7 +148,7 @@ static int pca100_devices_init(void)
PD11_AOUT_FEC_TX_CLK,
PD12_AOUT_FEC_RXD0,
PD13_AOUT_FEC_RX_DV,
- PD14_AOUT_FEC_CLR,
+ PD14_AOUT_FEC_RX_CLK,
PD15_AOUT_FEC_COL,
PD16_AIN_FEC_TX_ER,
PF23_AIN_FEC_TX_EN,
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 02/11] imxfb: Add board specific hook to enable display
2010-06-24 9:39 assorted patches Sascha Hauer
2010-06-24 9:39 ` [PATCH 01/11] i.MX27: merge iomux pim definitions from kernel Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 03/11] imxfb: do not enable framebuffer on startup Sascha Hauer
` (9 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/include/mach/imxfb.h | 2 ++
drivers/video/imx.c | 7 +++++++
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/imxfb.h b/arch/arm/mach-imx/include/mach/imxfb.h
index e31b668..16b43ea 100644
--- a/arch/arm/mach-imx/include/mach/imxfb.h
+++ b/arch/arm/mach-imx/include/mach/imxfb.h
@@ -74,6 +74,8 @@ struct imx_fb_platform_data {
void *framebuffer;
/** force a memory area to be used, else NULL for dynamic allocation */
void *framebuffer_ovl;
+ /** hook to enable backlight and stuff */
+ void (*enable)(int enable);
};
void set_imx_fb_info(struct imx_fb_platform_data *);
diff --git a/drivers/video/imx.c b/drivers/video/imx.c
index d9ba643..3a4f938 100644
--- a/drivers/video/imx.c
+++ b/drivers/video/imx.c
@@ -152,6 +152,7 @@ struct imxfb_info {
struct fb_info info;
struct device_d *dev;
+ void (*enable)(int enable);
struct fb_info overlay;
};
@@ -262,12 +263,17 @@ static void imxfb_enable_controller(struct fb_info *info)
writel(readl(IMX_CCM_BASE + CCM_CGCR1) | (1 << 29),
IMX_CCM_BASE + CCM_CGCR1);
#endif
+ if (fbi->enable)
+ fbi->enable(1);
}
static void imxfb_disable_controller(struct fb_info *info)
{
struct imxfb_info *fbi = info->priv;
+ if (fbi->enable)
+ fbi->enable(0);
+
writel(0, fbi->regs + LCDC_RMCR);
#ifdef CONFIG_ARCH_IMX21
PCCR0 &= ~(PCCR0_PERCLK3_EN | PCCR0_HCLK_LCDC_EN);
@@ -546,6 +552,7 @@ static int imxfb_probe(struct device_d *dev)
fbi->pwmr = pdata->pwmr;
fbi->lscr1 = pdata->lscr1;
fbi->dmacr = pdata->dmacr;
+ fbi->enable = pdata->enable;
fbi->dev = dev;
info->priv = fbi;
info->mode = &pdata->mode->mode;
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 03/11] imxfb: do not enable framebuffer on startup
2010-06-24 9:39 assorted patches Sascha Hauer
2010-06-24 9:39 ` [PATCH 01/11] i.MX27: merge iomux pim definitions from kernel Sascha Hauer
2010-06-24 9:39 ` [PATCH 02/11] imxfb: Add board specific hook to enable display Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 04/11] memcpy cmd: Do not expect to read/write the whole chunk at once Sascha Hauer
` (8 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
The board code or startup script should enable it when
it actually wants to.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/video/imx.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/video/imx.c b/drivers/video/imx.c
index 3a4f938..ac51858 100644
--- a/drivers/video/imx.c
+++ b/drivers/video/imx.c
@@ -579,8 +579,6 @@ static int imxfb_probe(struct device_d *dev)
#ifdef CONFIG_IMXFB_DRIVER_VIDEO_IMX_OVERLAY
imxfb_register_overlay(fbi, pdata->framebuffer_ovl);
#endif
- imxfb_enable_controller(info);
-
return 0;
}
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 04/11] memcpy cmd: Do not expect to read/write the whole chunk at once
2010-06-24 9:39 assorted patches Sascha Hauer
` (2 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 03/11] imxfb: do not enable framebuffer on startup Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-25 7:17 ` Peter Korsgaard
2010-06-24 9:39 ` [PATCH 05/11] armlinux: reorder tag setup Sascha Hauer
` (7 subsequent siblings)
11 siblings, 1 reply; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
read() does not necessarily return the number of bytes
we want to read, so deal with less bytes.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
commands/mem.c | 30 +++++++++++++++++++-----------
1 files changed, 19 insertions(+), 11 deletions(-)
diff --git a/commands/mem.c b/commands/mem.c
index 6192466..bd1d349 100644
--- a/commands/mem.c
+++ b/commands/mem.c
@@ -455,27 +455,35 @@ static int do_mem_cp(struct command *cmdtp, int argc, char *argv[])
}
while (count > 0) {
- int now, r, w;
+ int now, r, w, tmp;
now = min(RW_BUF_SIZE, count);
- if ((r = read(sourcefd, rw_buf, now)) < 0) {
+ r = read(sourcefd, rw_buf, now);
+ if (r < 0) {
perror("read");
goto out;
}
- if ((w = write(destfd, rw_buf, r)) < 0) {
- perror("write");
- goto out;
- }
-
- if (r < now)
+ if (!r)
break;
- if (w < r)
- break;
+ tmp = 0;
+ now = r;
+ while (now) {
+ w = write(destfd, rw_buf + tmp, now);
+ if (w < 0) {
+ perror("write");
+ goto out;
+ }
+ if (!w)
+ break;
- count -= now;
+ now -= w;
+ tmp += w;
+ }
+
+ count -= r;
}
if (count) {
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 04/11] memcpy cmd: Do not expect to read/write the whole chunk at once
2010-06-24 9:39 ` [PATCH 04/11] memcpy cmd: Do not expect to read/write the whole chunk at once Sascha Hauer
@ 2010-06-25 7:17 ` Peter Korsgaard
2010-06-28 8:37 ` Sascha Hauer
0 siblings, 1 reply; 15+ messages in thread
From: Peter Korsgaard @ 2010-06-25 7:17 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
>>>>> "Sascha" == Sascha Hauer <s.hauer@pengutronix.de> writes:
Hi,
Sascha> read() does not necessarily return the number of bytes
Sascha> we want to read, so deal with less bytes.
Sascha> - if ((w = write(destfd, rw_buf, r)) < 0) {
Sascha> - perror("write");
Sascha> - goto out;
Sascha> - }
Sascha> -
Sascha> - if (r < now)
Sascha> + if (!r)
Sascha> break;
Sascha> - if (w < r)
Sascha> - break;
Sascha> + tmp = 0;
Sascha> + now = r;
Sascha> + while (now) {
Sascha> + w = write(destfd, rw_buf + tmp, now);
Sascha> + if (w < 0) {
Sascha> + perror("write");
Sascha> + goto out;
Sascha> + }
Sascha> + if (!w)
Sascha> + break;
Sascha> - count -= now;
Sascha> + now -= w;
Sascha> + tmp += w;
Sascha> + }
Sascha> +
This is probably not the only place we need this. What about moving this
to a helper function like busybox' full_write()?
--
Bye, Peter Korsgaard
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH 04/11] memcpy cmd: Do not expect to read/write the whole chunk at once
2010-06-25 7:17 ` Peter Korsgaard
@ 2010-06-28 8:37 ` Sascha Hauer
0 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-28 8:37 UTC (permalink / raw)
To: Peter Korsgaard; +Cc: barebox
On Fri, Jun 25, 2010 at 09:17:44AM +0200, Peter Korsgaard wrote:
> >>>>> "Sascha" == Sascha Hauer <s.hauer@pengutronix.de> writes:
>
> Hi,
>
> Sascha> read() does not necessarily return the number of bytes
> Sascha> we want to read, so deal with less bytes.
>
> Sascha> - if ((w = write(destfd, rw_buf, r)) < 0) {
> Sascha> - perror("write");
> Sascha> - goto out;
> Sascha> - }
> Sascha> -
> Sascha> - if (r < now)
> Sascha> + if (!r)
> Sascha> break;
>
> Sascha> - if (w < r)
> Sascha> - break;
> Sascha> + tmp = 0;
> Sascha> + now = r;
> Sascha> + while (now) {
> Sascha> + w = write(destfd, rw_buf + tmp, now);
> Sascha> + if (w < 0) {
> Sascha> + perror("write");
> Sascha> + goto out;
> Sascha> + }
> Sascha> + if (!w)
> Sascha> + break;
>
> Sascha> - count -= now;
> Sascha> + now -= w;
> Sascha> + tmp += w;
> Sascha> + }
> Sascha> +
>
> This is probably not the only place we need this. What about moving this
> to a helper function like busybox' full_write()?
I merged this for now, but I'll remember it for next time I implement
such a loop.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 05/11] armlinux: reorder tag setup
2010-06-24 9:39 assorted patches Sascha Hauer
` (3 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 04/11] memcpy cmd: Do not expect to read/write the whole chunk at once Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 06/11] remove eco920 board support Sascha Hauer
` (6 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
We call the individual setup_*_tag functions from three different
boot commands. Waste less space by calling a single setup_tags function
instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/lib/armlinux.c | 51 ++++++++++++++++++++--------------------------
1 files changed, 22 insertions(+), 29 deletions(-)
diff --git a/arch/arm/lib/armlinux.c b/arch/arm/lib/armlinux.c
index a38c6bf..89d989a 100644
--- a/arch/arm/lib/armlinux.c
+++ b/arch/arm/lib/armlinux.c
@@ -142,6 +142,25 @@ static void setup_end_tag (void)
params->hdr.size = 0;
}
+static void setup_tags(void)
+{
+ const char *commandline = getenv("bootargs");
+
+ setup_start_tag();
+ setup_memory_tags();
+ setup_commandline_tag(commandline);
+#if 0
+ if (initrd_start && initrd_end)
+ setup_initrd_tag (initrd_start, initrd_end);
+#endif
+ setup_revision_tag();
+ setup_end_tag();
+
+ printf("commandline: %s\n"
+ "arch_number: %d\n", commandline, armlinux_architecture);
+
+}
+
void armlinux_set_bootparams(void *params)
{
armlinux_bootparams = params;
@@ -172,7 +191,6 @@ int do_bootm_linux(struct image_data *data)
{
void (*theKernel)(int zero, int arch, void *params);
image_header_t *os_header = &data->os->header;
- const char *commandline = getenv("bootargs");
if (os_header->ih_type == IH_TYPE_MULTI) {
printf("Multifile images not handled at the moment\n");
@@ -189,23 +207,12 @@ int do_bootm_linux(struct image_data *data)
return -1;
}
- printf("commandline: %s\n"
- "arch_number: %d\n", commandline, armlinux_architecture);
-
theKernel = (void *)ntohl(os_header->ih_ep);
debug("## Transferring control to Linux (at address 0x%p) ...\n",
theKernel);
- setup_start_tag();
- setup_memory_tags();
- setup_commandline_tag(commandline);
-#if 0
- if (initrd_start && initrd_end)
- setup_initrd_tag (initrd_start, initrd_end);
-#endif
- setup_revision_tag();
- setup_end_tag();
+ setup_tags();
if (relocate_image(data->os, (void *)ntohl(os_header->ih_load)))
return -1;
@@ -259,7 +266,6 @@ struct zimage_header {
static int do_bootz(struct command *cmdtp, int argc, char *argv[])
{
void (*theKernel)(int zero, int arch, void *params);
- const char *commandline = getenv("bootargs");
int fd, ret;
struct zimage_header header;
void *zimage;
@@ -295,15 +301,7 @@ static int do_bootz(struct command *cmdtp, int argc, char *argv[])
printf("loaded zImage from %s with size %d\n", argv[1], header.end);
- setup_start_tag();
- setup_memory_tags();
- setup_commandline_tag(commandline);
-#if 0
- if (initrd_start && initrd_end)
- setup_initrd_tag (initrd_start, initrd_end);
-#endif
- setup_revision_tag();
- setup_end_tag();
+ setup_tags();
shutdown_barebox();
theKernel(0, armlinux_architecture, armlinux_bootparams);
@@ -333,7 +331,6 @@ BAREBOX_CMD_END
static int do_bootu(struct command *cmdtp, int argc, char *argv[])
{
void (*theKernel)(int zero, int arch, void *params) = NULL;
- const char *commandline = getenv("bootargs");
int fd;
if (argc != 2) {
@@ -348,11 +345,7 @@ static int do_bootu(struct command *cmdtp, int argc, char *argv[])
if (!theKernel)
theKernel = (void *)simple_strtoul(argv[1], NULL, 0);
- setup_start_tag();
- setup_memory_tags();
- setup_commandline_tag(commandline);
- setup_revision_tag();
- setup_end_tag();
+ setup_tags();
shutdown_barebox();
theKernel(0, armlinux_architecture, armlinux_bootparams);
--
1.7.1
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 06/11] remove eco920 board support
2010-06-24 9:39 assorted patches Sascha Hauer
` (4 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 05/11] armlinux: reorder tag setup Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 07/11] usbnet: remove unused dev member in struct usbnet Sascha Hauer
` (5 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
It has been broken for long time and nobody cared, so remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/Makefile | 1 -
arch/arm/mach-at91rm9200/Kconfig | 8 --
board/eco920/Makefile | 2 -
board/eco920/config.h | 134 ------------------------
board/eco920/config.mk | 1 -
board/eco920/eco920.c | 211 --------------------------------------
6 files changed, 0 insertions(+), 357 deletions(-)
delete mode 100644 board/eco920/Makefile
delete mode 100644 board/eco920/config.h
delete mode 100644 board/eco920/config.mk
delete mode 100644 board/eco920/eco920.c
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 85ff9c8..1c9f24e 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -52,7 +52,6 @@ board-$(CONFIG_MACH_A9M2410) := a9m2410
board-$(CONFIG_MACH_A9M2440) := a9m2440
board-$(CONFIG_MACH_AT91SAM9260EK) := at91sam9260ek
board-$(CONFIG_MACH_AT91SAM9263EK) := at91sam9263ek
-board-$(CONFIG_MACH_ECO920) := eco920
board-$(CONFIG_MACH_EDB9301) := edb93xx
board-$(CONFIG_MACH_EDB9302) := edb93xx
board-$(CONFIG_MACH_EDB9302A) := edb93xx
diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91rm9200/Kconfig
index 7e90179..c062097 100644
--- a/arch/arm/mach-at91rm9200/Kconfig
+++ b/arch/arm/mach-at91rm9200/Kconfig
@@ -2,7 +2,6 @@ if ARCH_AT91RM9200
config ARCH_TEXT_BASE
hex
- default 0x21e00000 if MACH_ECO920
config BOARDINFO
@@ -12,13 +11,6 @@ choice
prompt "AT91RM9200 Board Type"
-config MACH_ECO920
- bool "eco920"
- select HAS_AT91_ETHER
- select HAS_CFI
- help
- Say Y here if you are using the Motorola MX1ADS board
-
endchoice
endif
diff --git a/board/eco920/Makefile b/board/eco920/Makefile
deleted file mode 100644
index 2cc70ca..0000000
--- a/board/eco920/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-obj-y += eco920.o
-
diff --git a/board/eco920/config.h b/board/eco920/config.h
deleted file mode 100644
index 3fb8beb..0000000
--- a/board/eco920/config.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * (C) Copyright 2007 Pengutronix
- * Sascha Hauer, <s.hauer@pengutronix.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* ARM asynchronous clock */
-#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
-#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
-/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
-
-#define AT91_SLOW_CLOCK 32768 /* slow clock */
-
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-#define USE_920T_MMU 1
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#define CFG_USE_MAIN_OSCILLATOR 1
-/* flash */
-#define MC_PUIA_VAL 0x00000000
-#define MC_PUP_VAL 0x00000000
-#define MC_PUER_VAL 0x00000000
-#define MC_ASR_VAL 0x00000000
-#define MC_AASR_VAL 0x00000000
-#define EBI_CFGR_VAL 0x00000000
-#define SMC2_CSR_VAL 0x00003287
-
-/* clocks */
-#define PLLAR_VAL 0x2026be04
-#define PLLBR_VAL 0x10483e0e
-#define MCKR_VAL 0x00000202
-
-/* sdram */
-#define PIOC_ASR_VAL 0xffff0000
-#define PIOC_BSR_VAL 0x00000000
-#define PIOC_PDR_VAL 0xffff0000
-#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
-#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */
-#define SDRAM 0x20000000 /* address of the SDRAM */
-#define SDRAM1 0x20000080 /* address of the SDRAM */
-#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
-#define SDRC_MR_VAL 0x00000002 /* Precharge All */
-#define SDRC_MR_VAL1 0x00000004 /* refresh */
-#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
-#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
-#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
-
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Hardware drivers
- */
-
-/* define one of CONFIG_DBGU, CONFIG_USART0 or CONFIG_USART1 to choose console */
-#define CONFIG_DBGU
-
-#define CONFIG_BOOTDELAY 3
-
-#define CONFIG_CMDLINE_EDITING 1
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "mtdids=nor0=physmap-flash.0\0" \
- "mtdparts=mtdparts=physmap-flash.0:128k(barebox)ro,128k(env),1536k(kernel),-(jffs2)\0" \
- "bootargs_base=setenv bootargs console=ttyAT0,115200\0" \
- "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
- "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
- "bootargs_flash=setenv bootargs $(bootargs) root=/dev/mtdblock3 rootfstype=jffs2\0" \
- "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; bootm 0x11040000\0" \
- "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x20000000 $(uimage); bootm\0" \
- "autoload=n\0" \
- "uimage=uImage-eco920\0" \
- "jffs2=root-eco920.jffs2\0"
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM 0x20000000
-#define PHYS_SDRAM_SIZE 0x2000000
-
-#define CFG_MEMTEST_START PHYS_SDRAM
-#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
-
-#define CONFIG_DRIVER_ETHER
-#define CONFIG_NET_RETRY_COUNT 20
-#define CONFIG_AT91C_USE_RMII
-
-#define CFG_LOAD_ADDR 0x21000000 /* default load address */
-
-#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
-
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "barebox> " /* Monitor Command Prompt */
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
-#define CFG_MAXARGS 32 /* max number of command args */
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-
-#define CLOCK_TICK_RATE AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
- /* AT91C_TC_TIMER_DIV1_CLOCK */
-
-#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() on init */
-#define CFG_SPLASH 1
-#define CFG_S1D13706FB 1
-
-#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
-#define CFG_USB_OHCI_SLOT_NAME "at91rm9200"
-#define LITTLEENDIAN
-#define CONFIG_AT91C_PQFP_UHPBUG
-
-#endif
-
diff --git a/board/eco920/config.mk b/board/eco920/config.mk
deleted file mode 100644
index 9ce161e..0000000
--- a/board/eco920/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-TEXT_BASE = 0x21f00000
diff --git a/board/eco920/eco920.c b/board/eco920/eco920.c
deleted file mode 100644
index 8d00877..0000000
--- a/board/eco920/eco920.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * (C) Copyright 2007 Pengutronix
- * Sascha Hauer, <s.hauer@pengutronix.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mach/AT91RM9200.h>
-#include <at91rm9200_net.h>
-#include <dm9161.h>
-#include <miiphy.h>
-#include <splash.h>
-#include <asm/armlinux.h>
-#include <s1d13706fb.h>
-#include <net.h>
-#include <init.h>
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-static struct cfi_platform_data cfi_info = {
-};
-
-struct device_d cfi_dev = {
- .name = "cfi_flash",
- .map_base = 0x11000000,
- .size = 16 * 1024 * 1024,
-
- .platform_data = &cfi_info,
-};
-
-static struct memory_platform_data ram_pdata = {
- .name = "ram0",
- .flags = DEVFS_RDWR,
-};
-
-struct device_d sdram_dev = {
- .name = "mem",
- .map_base = 0x20000000,
- .size = 32 * 1024 * 1024,
- .platform_data = &ram_pdata,
-};
-
-static struct device_d at91_ath_dev = {
- .name = "at91_eth",
-};
-
-static int devices_init (void)
-{
- register_device(&cfi_dev);
- register_device(&sdram_dev);
- register_device(&at91_ath_dev);
-
- armlinux_set_bootparams((void *)(PHYS_SDRAM + 0x100));
- armlinux_set_architecture(MACH_TYPE_ECO920);
-
- return 0;
-}
-
-device_initcall(devices_init);
-
-static unsigned int phy_is_connected (AT91PS_EMAC p_mac)
-{
- return 1;
-}
-
-static unsigned char phy_init_bogus (AT91PS_EMAC p_mac)
-{
- unsigned short val;
- int timeout, adr, speed, fullduplex;
-
- at91rm9200_EmacEnableMDIO (p_mac);
-
- /* Scan through phy addresses to find a phy */
- for (adr = 0; adr < 16; adr++) {
- at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR1 | (adr << 5), &val);
- if (val != 0xffff)
- break;
- }
-
- adr <<= 5;
-
- val = PHY_BMCR_RESET;
- at91rm9200_EmacWritePhy(p_mac, PHY_BMCR | adr, &val);
-
- udelay(1000);
-
- val = 0x01e1; /* ADVERTISE_100FULL | ADVERTISE_100HALF |
- * ADVERTISE_10FULL | ADVERTISE_10HALF |
- * ADVERTISE_CSMA */
- at91rm9200_EmacWritePhy(p_mac, PHY_ANAR | adr, &val);
-
- at91rm9200_EmacReadPhy(p_mac, PHY_BMCR | adr, &val);
- val |= PHY_BMCR_AUTON | PHY_BMCR_RST_NEG;
- at91rm9200_EmacWritePhy(p_mac, PHY_BMCR | adr, &val);
-
- timeout = 500;
- do {
- /* at91rm9200_EmacReadPhy() has a udelay(10000)
- * in it, so this should be about 5 deconds
- */
- if ((timeout--) == 0) {
- printf("Autonegotiation timeout\n");
- goto out;
- }
-
- at91rm9200_EmacReadPhy(p_mac, PHY_BMSR | adr, &val);
- } while (!(val & PHY_BMSR_LS));
-
- at91rm9200_EmacReadPhy(p_mac, PHY_ANLPAR | adr, &val);
-
- if (val & PHY_ANLPAR_100) {
- speed = 100;
- p_mac->EMAC_CFG |= AT91C_EMAC_SPD;
- } else {
- speed = 10;
- p_mac->EMAC_CFG &= ~AT91C_EMAC_SPD;
- }
-
- if (val & (PHY_ANLPAR_TXFD | PHY_ANLPAR_10FD)) {
- fullduplex = 1;
- p_mac->EMAC_CFG |= AT91C_EMAC_FD;
- } else {
- fullduplex = 0;
- p_mac->EMAC_CFG &= ~AT91C_EMAC_FD;
- }
-
- printf("running at %d-%sDuplex\n",speed, fullduplex ? "FUll" : "Half");
-
-out:
- at91rm9200_EmacDisableMDIO (p_mac);
-
- return 1;
-}
-
-void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
-{
- p_phyops->Init = phy_init_bogus;
- p_phyops->IsPhyConnected = phy_is_connected;
- /* This is not used anywhere */
- p_phyops->GetLinkSpeed = NULL;
- /* ditto */
- p_phyops->AutoNegotiate = NULL;
-}
-
-#ifdef CONFIG_DRIVER_VIDEO_S1D13706
-static int efb_init(struct efb_info *efb)
-{
- writeb(GPIO_CONTROL0_GPO, efb->regs + EFB_GPIO_CONTROL1);
- writeb(PCLK_SOURCE_CLKI2, efb->regs + EFB_PCLK_CONF);
- writeb(0x1, efb->regs + 0x26); /* FIXME: display specific, should be set to zero
- * according to datasheet
- */
- return 0;
-}
-
-/* Nanya STN Display */
-static struct efb_info efb = {
- .fbd = {
- .xres = 320,
- .yres = 240,
- .bpp = 8,
- .fb = (void*)0x40020000,
- },
-
- .init = efb_init,
- .regs = (void*)0x40000000,
- .pixclock = 100000,
- .hsync_len = 1,
- .left_margin = 22,
- .right_margin = 1,
- .vsync_len = 1,
- .upper_margin = 0,
- .lower_margin = 1,
- .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
- .panel_type = PANEL_TYPE_STN | PANEL_TYPE_WIDTH_8 |
- PANEL_TYPE_COLOR | PANEL_TYPE_FORMAT_2,
-};
-#endif
-#define SMC_CSR3 0xFFFFFF7C
-
-int misc_init_r(void)
-{
- /* Initialization of the Static Memory Controller for Chip Select 3 */
- *(volatile unsigned long*)SMC_CSR3 = 0x00002185;
-#ifdef CONFIG_DRIVER_VIDEO_S1D13706
- s1d13706fb_init(&efb);
-#endif
-#ifdef CONFIG_CMD_SPLASH
- splash_set_fb_data(&efb.fbd);
-#endif
- return 0;
-}
--
1.7.1
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 07/11] usbnet: remove unused dev member in struct usbnet
2010-06-24 9:39 assorted patches Sascha Hauer
` (5 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 06/11] remove eco920 board support Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 08/11] i.MX serial: Use readl/writel instead of pointer deref Sascha Hauer
` (4 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/net/usb/asix.c | 12 ++++++------
drivers/net/usb/usbnet.c | 9 +++++----
include/usb/usbnet.h | 2 --
3 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c
index fc4146f..ca71b34 100644
--- a/drivers/net/usb/asix.c
+++ b/drivers/net/usb/asix.c
@@ -415,13 +415,13 @@ static int asix_rx_fixup(struct usbnet *dev, void *buf, int len)
while (len > 0) {
if ((short)(header & 0x0000ffff) != ~((short)((header & 0xffff0000) >> 16)))
- dev_err(&dev->dev, "asix_rx_fixup() Bad Header Length");
-
+ dev_err(&dev->edev.dev, "asix_rx_fixup() Bad Header Length");
+
/* get the packet length */
size = (unsigned short) (header & 0x0000ffff);
if (size > 1514) {
- dev_err(&dev->dev, "asix_rx_fixup() Bad RX Length %d", size);
+ dev_err(&dev->edev.dev, "asix_rx_fixup() Bad RX Length %d", size);
return 0;
}
@@ -440,7 +440,7 @@ static int asix_rx_fixup(struct usbnet *dev, void *buf, int len)
}
if (len < 0) {
- dev_err(&dev->dev,"asix_rx_fixup() Bad SKB Length %d", len);
+ dev_err(&dev->edev.dev,"asix_rx_fixup() Bad SKB Length %d", len);
return -1;
}
return 0;
@@ -503,13 +503,13 @@ static int ax88172_bind(struct usbnet *dev)
unsigned long gpio_bits = dev->driver_info->data;
struct asix_data *data = (struct asix_data *)&dev->data;
- dev_dbg(&dev->dev, "%s\n", __func__);
+ dev_dbg(&dev->edev.dev, "%s\n", __func__);
data->eeprom_len = AX88172_EEPROM_LEN;
ret = usbnet_get_endpoints(dev);
if (ret) {
- dev_err(&dev->dev, "can not get EPs\n");
+ dev_err(&dev->edev.dev, "can not get EPs\n");
return ret;
}
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index b0e3090..cc170f6 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -74,7 +74,7 @@ int usbnet_get_endpoints(struct usbnet *dev)
in->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
dev->out = usb_sndbulkpipe (dev->udev,
out->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK);
- dev_dbg(&dev->dev, "found endpoints: IN=%d OUT=%d\n",
+ dev_dbg(&dev->edev.dev, "found endpoints: IN=%d OUT=%d\n",
in->bEndpointAddress, out->bEndpointAddress);
return 0;
@@ -89,14 +89,14 @@ static int usbnet_send(struct eth_device *edev, void *eth_data, int data_length)
struct driver_info *info = dev->driver_info;
int len, alen, ret;
- dev_dbg(&dev->dev, "%s\n",__func__);
+ dev_dbg(&edev->dev, "%s\n",__func__);
/* some devices want funky USB-level framing, for
* win32 driver (usually) and/or hardware quirks
*/
if(info->tx_fixup) {
if(info->tx_fixup(dev, eth_data, data_length, tx_buffer, &len)) {
- dev_dbg(&dev->dev, "can't tx_fixup packet");
+ dev_dbg(&edev->dev, "can't tx_fixup packet");
return 0;
}
} else {
@@ -191,7 +191,7 @@ int usbnet_probe(struct usb_device *usbdev, const struct usb_device_id *prod)
struct driver_info *info;
int status;
- dev_dbg(&edev->dev, "%s\n", __func__);
+ dev_dbg(&usbdev->dev, "%s\n", __func__);
undev = xzalloc(sizeof (*undev));
@@ -206,6 +206,7 @@ int usbnet_probe(struct usb_device *usbdev, const struct usb_device_id *prod)
edev->recv = usbnet_recv,
edev->halt = usbnet_halt,
edev->priv = undev;
+ edev->dev = usbdev->dev; /* will be overwritten by eth_register */
info = (struct driver_info *)prod->driver_info;
undev->driver_info = info;
diff --git a/include/usb/usbnet.h b/include/usb/usbnet.h
index 77f1960..e3ea373 100644
--- a/include/usb/usbnet.h
+++ b/include/usb/usbnet.h
@@ -54,8 +54,6 @@ struct usbnet {
# define EVENT_RX_MEMORY 2
# define EVENT_STS_SPLIT 3
# define EVENT_LINK_RESET 4
- /* FIXME: Our eth_device should have this, not us! */
- struct device_d dev;
};
#if 0
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 08/11] i.MX serial: Use readl/writel instead of pointer deref
2010-06-24 9:39 assorted patches Sascha Hauer
` (6 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 07/11] usbnet: remove unused dev member in struct usbnet Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 09/11] i.MX clocksource: " Sascha Hauer
` (3 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/serial/serial_imx.c | 137 ++++++++++++++++++++++---------------------
1 files changed, 71 insertions(+), 66 deletions(-)
diff --git a/drivers/serial/serial_imx.c b/drivers/serial/serial_imx.c
index 91d3b18..801004e 100644
--- a/drivers/serial/serial_imx.c
+++ b/drivers/serial/serial_imx.c
@@ -24,34 +24,35 @@
#include <init.h>
#include <malloc.h>
#include <notifier.h>
-
-#define URXD0(base) __REG( 0x0 +(base)) /* Receiver Register */
-#define URTX0(base) __REG( 0x40 +(base)) /* Transmitter Register */
-#define UCR1(base) __REG( 0x80 +(base)) /* Control Register 1 */
-#define UCR2(base) __REG( 0x84 +(base)) /* Control Register 2 */
-#define UCR3(base) __REG( 0x88 +(base)) /* Control Register 3 */
-#define UCR4(base) __REG( 0x8c +(base)) /* Control Register 4 */
-#define UFCR(base) __REG( 0x90 +(base)) /* FIFO Control Register */
-#define USR1(base) __REG( 0x94 +(base)) /* Status Register 1 */
-#define USR2(base) __REG( 0x98 +(base)) /* Status Register 2 */
-#define UESC(base) __REG( 0x9c +(base)) /* Escape Character Register */
-#define UTIM(base) __REG( 0xa0 +(base)) /* Escape Timer Register */
-#define UBIR(base) __REG( 0xa4 +(base)) /* BRM Incremental Register */
-#define UBMR(base) __REG( 0xa8 +(base)) /* BRM Modulator Register */
-#define UBRC(base) __REG( 0xac +(base)) /* Baud Rate Count Register */
+#include <asm/io.h>
+
+#define URXD0 0x0 /* Receiver Register */
+#define URTX0 0x40 /* Transmitter Register */
+#define UCR1 0x80 /* Control Register 1 */
+#define UCR2 0x84 /* Control Register 2 */
+#define UCR3 0x88 /* Control Register 3 */
+#define UCR4 0x8c /* Control Register 4 */
+#define UFCR 0x90 /* FIFO Control Register */
+#define USR1 0x94 /* Status Register 1 */
+#define USR2 0x98 /* Status Register 2 */
+#define UESC 0x9c /* Escape Character Register */
+#define UTIM 0xa0 /* Escape Timer Register */
+#define UBIR 0xa4 /* BRM Incremental Register */
+#define UBMR 0xa8 /* BRM Modulator Register */
+#define UBRC 0xac /* Baud Rate Count Register */
#ifdef CONFIG_ARCH_IMX1
-#define BIPR1(base) __REG( 0xb0 +(base)) /* Incremental Preset Register 1 */
-#define BIPR2(base) __REG( 0xb4 +(base)) /* Incremental Preset Register 2 */
-#define BIPR3(base) __REG( 0xb8 +(base)) /* Incremental Preset Register 3 */
-#define BIPR4(base) __REG( 0xbc +(base)) /* Incremental Preset Register 4 */
-#define BMPR1(base) __REG( 0xc0 +(base)) /* BRM Modulator Register 1 */
-#define BMPR2(base) __REG( 0xc4 +(base)) /* BRM Modulator Register 2 */
-#define BMPR3(base) __REG( 0xc8 +(base)) /* BRM Modulator Register 3 */
-#define BMPR4(base) __REG( 0xcc +(base)) /* BRM Modulator Register 4 */
-#define UTS(base) __REG( 0xd0 +(base)) /* UART Test Register */
+#define BIPR1 0xb0 /* Incremental Preset Register 1 */
+#define BIPR2 0xb4 /* Incremental Preset Register 2 */
+#define BIPR3 0xb8 /* Incremental Preset Register 3 */
+#define BIPR4 0xbc /* Incremental Preset Register 4 */
+#define BMPR1 0xc0 /* BRM Modulator Register 1 */
+#define BMPR2 0xc4 /* BRM Modulator Register 2 */
+#define BMPR3 0xc8 /* BRM Modulator Register 3 */
+#define BMPR4 0xcc /* BRM Modulator Register 4 */
+#define UTS 0xd0 /* UART Test Register */
#else
-#define ONEMS(base) __REG( 0xb0 +(base)) /* One Millisecond register */
-#define UTS(base) __REG( 0xb4 +(base)) /* UART Test Register */
+#define ONEMS 0xb0 /* One Millisecond register */
+#define UTS 0xb4 /* UART Test Register */
#endif
/* UART Control Register Bit Fields.*/
@@ -175,7 +176,7 @@ static int imx_serial_reffreq(ulong base)
{
ulong rfdiv;
- rfdiv = (UFCR(base) >> 7) & 7;
+ rfdiv = (readl(base + UFCR) >> 7) & 7;
rfdiv = rfdiv < 6 ? 6 - rfdiv : 7;
return imx_get_uartclk() / rfdiv;
@@ -190,45 +191,42 @@ static int imx_serial_init_port(struct console_device *cdev)
{
struct device_d *dev = cdev->dev;
ulong base = dev->map_base;
+ uint32_t val;
+
+ writel(UCR1_VAL, base + UCR1);
+ writel(UCR2_WS | UCR2_IRTS, base + UCR2);
+ writel(UCR3_VAL, base + UCR3);
+ writel(UCR4_VAL, base + UCR4);
+ writel(0x0000002B, base + UESC);
+ writel(0, base + UTIM);
+ writel(0, base + UBIR);
+ writel(0, base + UBMR);
+ writel(0, base + UTS);
- UCR1(base) = UCR1_VAL;
- UCR2(base) = UCR2_WS | UCR2_IRTS;
- UCR3(base) = UCR3_VAL;
- UCR4(base) = UCR4_VAL;
- UESC(base) = 0x0000002B;
- UTIM(base) = 0;
- UBIR(base) = 0;
- UBMR(base) = 0;
- UTS(base) = 0;
/* Configure FIFOs */
- UFCR(base) = 0xa81;
+ writel(0xa81, base + UFCR);
#ifdef ONEMS
- ONEMS(base) = imx_serial_reffreq(base) / 1000;
+ writel(imx_serial_reffreq(base) / 1000, base + ONEMS);
#endif
/* Enable FIFOs */
- UCR2(base) |= UCR2_SRST | UCR2_RXEN | UCR2_TXEN;
+ val = readl(base + UCR2);
+ val |= UCR2_SRST | UCR2_RXEN | UCR2_TXEN;
+ writel(val, base + UCR2);
/* Clear status flags */
- USR2(base) |= USR2_ADET |
- USR2_DTRF |
- USR2_IDLE |
- USR2_IRINT |
- USR2_WAKE |
- USR2_RTSF |
- USR2_BRCD |
- USR2_ORE |
- USR2_RDR;
+ val = readl(base + USR2);
+ val |= USR2_ADET | USR2_DTRF | USR2_IDLE | USR2_IRINT | USR2_WAKE |
+ USR2_RTSF | USR2_BRCD | USR2_ORE | USR2_RDR;
+ writel(val, base + USR2);
/* Clear status flags */
- USR1(base) |= USR1_PARITYERR |
- USR1_RTSD |
- USR1_ESCF |
- USR1_FRAMERR |
- USR1_AIRINT |
- USR1_AWAKE;
+ val = readl(base + USR2);
+ val |= USR1_PARITYERR | USR1_RTSD | USR1_ESCF | USR1_FRAMERR | USR1_AIRINT |
+ USR1_AWAKE;
+ writel(val, base + USR2);
return 0;
}
@@ -238,9 +236,9 @@ static void imx_serial_putc(struct console_device *cdev, char c)
struct device_d *dev = cdev->dev;
/* Wait for Tx FIFO not full */
- while (UTS(dev->map_base) & UTS_TXFULL);
+ while (readl(dev->map_base + UTS) & UTS_TXFULL);
- URTX0(dev->map_base) = c;
+ writel(c, dev->map_base + URTX0);
}
static int imx_serial_tstc(struct console_device *cdev)
@@ -248,7 +246,7 @@ static int imx_serial_tstc(struct console_device *cdev)
struct device_d *dev = cdev->dev;
/* If receive fifo is empty, return false */
- if (UTS(dev->map_base) & UTS_RXEMPTY)
+ if (readl(dev->map_base + UTS) & UTS_RXEMPTY)
return 0;
return 1;
}
@@ -258,9 +256,9 @@ static int imx_serial_getc(struct console_device *cdev)
struct device_d *dev = cdev->dev;
unsigned char ch;
- while (UTS(dev->map_base) & UTS_RXEMPTY);
+ while (readl(dev->map_base + UTS) & UTS_RXEMPTY);
- ch = URXD0(dev->map_base);
+ ch = readl(dev->map_base + URXD0);
return ch;
}
@@ -269,7 +267,7 @@ static void imx_serial_flush(struct console_device *cdev)
{
struct device_d *dev = cdev->dev;
- while (!(USR2(dev->map_base) & USR2_TXDC));
+ while (!(readl(dev->map_base + USR2) & USR2_TXDC));
}
static int imx_serial_setbaudrate(struct console_device *cdev, int baudrate)
@@ -277,18 +275,22 @@ static int imx_serial_setbaudrate(struct console_device *cdev, int baudrate)
struct device_d *dev = cdev->dev;
struct imx_serial_priv *priv = container_of(cdev,
struct imx_serial_priv, cdev);
+ uint32_t val;
+
ulong base = dev->map_base;
- ulong ucr1 = UCR1(base);
+ ulong ucr1 = readl(base + UCR1);
/* disable UART */
- UCR1(base) &= ~UCR1_UARTEN;
+ val = readl(base + UCR1);
+ val &= ~UCR1_UARTEN;
+ writel(val, base + UCR1);
/* Set the numerator value minus one of the BRM ratio */
- UBIR(base) = (baudrate / 100) - 1;
+ writel((baudrate / 100) - 1, base + UBIR);
/* Set the denominator value minus one of the BRM ratio */
- UBMR(base) = ((imx_serial_reffreq(base) / 1600) - 1);
+ writel((imx_serial_reffreq(base) / 1600) - 1, base + UBMR);
- UCR1(base) = ucr1;
+ writel(ucr1, base + UCR1);
priv->baudrate = baudrate;
@@ -310,6 +312,7 @@ static int imx_serial_probe(struct device_d *dev)
{
struct console_device *cdev;
struct imx_serial_priv *priv;
+ uint32_t val;
priv = malloc(sizeof(*priv));
cdev = &priv->cdev;
@@ -327,7 +330,9 @@ static int imx_serial_probe(struct device_d *dev)
imx_serial_setbaudrate(cdev, 115200);
/* Enable UART */
- UCR1(cdev->dev->map_base) |= UCR1_UARTEN;
+ val = readl(cdev->dev->map_base + UCR1);
+ val |= UCR1_UARTEN;
+ writel(val, cdev->dev->map_base + UCR1);
console_register(cdev);
priv->notify.notifier_call = imx_clocksource_clock_change;
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 09/11] i.MX clocksource: Use readl/writel instead of pointer deref
2010-06-24 9:39 assorted patches Sascha Hauer
` (7 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 08/11] i.MX serial: Use readl/writel instead of pointer deref Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 10/11] i.MX27: Add some missing device base addresses Sascha Hauer
` (2 subsequent siblings)
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/clocksource.c | 18 +++++++++++-------
1 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-imx/clocksource.c b/arch/arm/mach-imx/clocksource.c
index 4b400a0..a166038 100644
--- a/arch/arm/mach-imx/clocksource.c
+++ b/arch/arm/mach-imx/clocksource.c
@@ -35,12 +35,14 @@
#include <notifier.h>
#include <mach/imx-regs.h>
#include <mach/clock.h>
+#include <asm/io.h>
#define GPT(x) __REG(IMX_TIM1_BASE + (x))
+#define timer_base (IMX_TIM1_BASE)
uint64_t imx_clocksource_read(void)
{
- return GPT(GPT_TCN);
+ return readl(timer_base + GPT_TCN);
}
static struct clocksource cs = {
@@ -62,8 +64,10 @@ static struct notifier_block imx_clock_notifier = {
static int clocksource_init (void)
{
int i;
+ uint32_t val;
+
/* setup GP Timer 1 */
- GPT(GPT_TCTL) = TCTL_SWR;
+ writel(TCTL_SWR, timer_base + GPT_TCTL);
#ifdef CONFIG_ARCH_IMX21
PCCR1 |= PCCR1_GPT1_EN;
@@ -74,12 +78,12 @@ static int clocksource_init (void)
#endif
for (i = 0; i < 100; i++)
- GPT(GPT_TCTL) = 0; /* We have no udelay by now */
+ writel(0, timer_base + GPT_TCTL); /* We have no udelay by now */
- GPT(GPT_TPRER) = 0;
- GPT(GPT_TCTL) |= TCTL_FRR | (1<<TCTL_CLKSOURCE); /* Freerun Mode, PERCLK1 input */
- GPT(GPT_TCTL) &= ~TCTL_TEN;
- GPT(GPT_TCTL) |= TCTL_TEN; /* Enable timer */
+ writel(0, timer_base + GPT_TPRER);
+ val = readl(timer_base + GPT_TCTL);
+ val |= TCTL_FRR | (1 << TCTL_CLKSOURCE) | TCTL_TEN; /* Freerun Mode, PERCLK1 input */
+ writel(val, timer_base + GPT_TCTL);
cs.mult = clocksource_hz2mult(imx_get_gptclk(), cs.shift);
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 10/11] i.MX27: Add some missing device base addresses
2010-06-24 9:39 assorted patches Sascha Hauer
` (8 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 09/11] i.MX clocksource: " Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 9:39 ` [PATCH 11/11] fb: add a usage counter to prevent double enable/disable Sascha Hauer
2010-06-24 15:05 ` assorted patches Eric Bénard
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/mach-imx/include/mach/imx27-regs.h | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h
index d804a9d..8d0bcda 100644
--- a/arch/arm/mach-imx/include/mach/imx27-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx27-regs.h
@@ -16,6 +16,7 @@
#define IMX_UART2_BASE (0x0b000 + IMX_IO_BASE)
#define IMX_UART3_BASE (0x0c000 + IMX_IO_BASE)
#define IMX_UART4_BASE (0x0d000 + IMX_IO_BASE)
+#define IMX_SPI1_BASE (0x0e000 + IMX_IO_BASE)
#define IMX_I2C1_BASE (0x12000 + IMX_IO_BASE)
#define IMX_GPIO_BASE (0x15000 + IMX_IO_BASE)
#define IMX_TIM4_BASE (0x19000 + IMX_IO_BASE)
@@ -25,9 +26,11 @@
#define IMX_I2C2_BASE (0x1d000 + IMX_IO_BASE)
#define IMX_TIM6_BASE (0x1f000 + IMX_IO_BASE)
#define IMX_AIPI2_BASE (0x20000 + IMX_IO_BASE)
+#define IMX_FB_BASE (0x21000 + IMX_IO_BASE)
#define IMX_PLL_BASE (0x27000 + IMX_IO_BASE)
#define IMX_SYSTEM_CTL_BASE (0x27800 + IMX_IO_BASE)
#define IMX_OTG_BASE (0x24000 + IMX_IO_BASE)
+#define IMX_FEC_BASE (0x2b000 + IMX_IO_BASE)
#define IMX_NFC_BASE (0xd8000000)
#define IMX_ESD_BASE (0xd8001000)
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 11/11] fb: add a usage counter to prevent double enable/disable
2010-06-24 9:39 assorted patches Sascha Hauer
` (9 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 10/11] i.MX27: Add some missing device base addresses Sascha Hauer
@ 2010-06-24 9:39 ` Sascha Hauer
2010-06-24 15:05 ` assorted patches Eric Bénard
11 siblings, 0 replies; 15+ messages in thread
From: Sascha Hauer @ 2010-06-24 9:39 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/video/fb.c | 5 +++++
include/fb.h | 4 +++-
2 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/drivers/video/fb.c b/drivers/video/fb.c
index 841c3af..f9a425e 100644
--- a/drivers/video/fb.c
+++ b/drivers/video/fb.c
@@ -39,6 +39,9 @@ static int fb_enable_set(struct device_d *dev, struct param_d *param,
enable = simple_strtoul(val, NULL, 0);
+ if (info->enabled == !!enable)
+ return 0;
+
if (enable) {
info->fbops->fb_enable(info);
new = "1";
@@ -49,6 +52,8 @@ static int fb_enable_set(struct device_d *dev, struct param_d *param,
dev_param_set_generic(dev, param, new);
+ info->enabled = !!enable;
+
return 0;
}
diff --git a/include/fb.h b/include/fb.h
index 218500b..379f931 100644
--- a/include/fb.h
+++ b/include/fb.h
@@ -96,7 +96,9 @@ struct fb_info {
struct fb_bitfield red; /* bitfield in fb mem if true color, */
struct fb_bitfield green; /* else only length is significant */
struct fb_bitfield blue;
- struct fb_bitfield transp; /* transparency */
+ struct fb_bitfield transp; /* transparency */
+
+ int enabled;
};
int register_framebuffer(struct fb_info *info);
--
1.7.1
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: assorted patches
2010-06-24 9:39 assorted patches Sascha Hauer
` (10 preceding siblings ...)
2010-06-24 9:39 ` [PATCH 11/11] fb: add a usage counter to prevent double enable/disable Sascha Hauer
@ 2010-06-24 15:05 ` Eric Bénard
11 siblings, 0 replies; 15+ messages in thread
From: Eric Bénard @ 2010-06-24 15:05 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
Hi Sascha,
Le 24/06/2010 11:39, Sascha Hauer a écrit :
>
> The following changes since commit 334fe1dc8a1b866d1f0f4ccf82ff7b06589ec022:
>
> pca100: use generic default env (2010-06-22 15:44:45 +0200)
>
> are available in the git repository at:
> git://git.pengutronix.de/git/barebox.git assorted-pu
>
> Sascha Hauer (11):
> i.MX27: merge iomux pim definitions from kernel
> imxfb: Add board specific hook to enable display
> imxfb: do not enable framebuffer on startup
> memcpy cmd: Do not expect to read/write the whole chunk at once
> armlinux: reorder tag setup
> remove eco920 board support
> usbnet: remove unused dev member in struct usbnet
> i.MX serial: Use readl/writel instead of pointer deref
> i.MX clocksource: Use readl/writel instead of pointer deref
> i.MX27: Add some missing device base addresses
> fb: add a usage counter to prevent double enable/disable
>
patche serie tested on i.MX35 : no problem found
Eric
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^ permalink raw reply [flat|nested] 15+ messages in thread