* Freescale i.MX35 using CSD1 and 256 MiB DDR2 @ 2011-04-26 12:30 Roman Fietze 2011-04-26 21:56 ` Sascha Hauer 0 siblings, 1 reply; 9+ messages in thread From: Roman Fietze @ 2011-04-26 12:30 UTC (permalink / raw) To: barebox Hello Barebox Mailing List Members, I found this advice to patch RedBoot to support more than 128 MiB DDR2 on a Freescale i.MX35 3-stack eval board by enabling CSD1 and properly configuring the ESDRAMC. http://www.spinics.net/lists/u-boot-v2/msg03422.html They simply seem to modify the boot code by omitting some checks and adding MMU mapping entries. My changes are not successful yet. It seems I'm simply not yet familiar enough with the i.MX35, barebox, or even both. The changes that I added to barebox are at the end of this mail. It seems that barebox uses the DCD table to boot the chip in my case, so I added new entries there, and I can see them when dumping e.g. the ESDRAMC registers using barebox itself (yes, it still starts. I can still dump the RAM starting at 0x80000000, but when I try to dump 0x90000000 barebox simply hangs. I checked the IOMUX GPRA, the PAD settings for CS2 and CS3, the ESDRAMC registers and all locations of Freescale's document containing CS2, CS3, CSD0, CSD1, etc. with no success. I'm stuck. What am I missing? A pointer to the appropriate section of the documentation or any helpful link would already very helpful. Thank's a lot in advance Roman The not yet working patches: Subject: [PATCH] imx35: support 2 banks of SDRAM using 256 MiB DDR2 Change the DCD table and the low level init code. CAUTION: This code does not work as expected and is just used to have a starting point for discussions on the Barebox mailing list. Signed-off-by: Roman Fietze <roman.fietze@telemotive.de> --- arch/arm/boards/freescale-mx35-3-stack/3stack.c | 25 ++++++++++++++++---- .../boards/freescale-mx35-3-stack/flash_header.c | 11 ++++++++- .../boards/freescale-mx35-3-stack/lowlevel_init.S | 17 ++++++++----- 3 files changed, 40 insertions(+), 13 deletions(-) diff --git a/arch/arm/boards/freescale-mx35-3-stack/3stack.c b/arch/arm/boards/freescale-mx35-3-stack/3stack.c index 7b61a24..2a12aaa 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx35-3-stack/3stack.c @@ -71,17 +71,30 @@ static struct fec_platform_data fec_info = { .phy_addr = 0x1F, }; -static struct memory_platform_data sdram_pdata = { +static struct memory_platform_data sdram0_pdata = { .name = "ram0", .flags = DEVFS_RDWR, }; -static struct device_d sdram_dev = { +static struct device_d sdram0_dev = { .id = -1, .name = "mem", .map_base = IMX_SDRAM_CS0, .size = 128 * 1024 * 1024, - .platform_data = &sdram_pdata, + .platform_data = &sdram0_pdata, +}; + +static struct memory_platform_data sdram1_pdata = { + .name = "ram1", + .flags = DEVFS_RDWR, +}; + +static struct device_d sdram1_dev = { + .id = -1, + .name = "mem", + .map_base = IMX_SDRAM_CS1, + .size = 128 * 1024 * 1024, + .platform_data = &sdram1_pdata, }; struct imx_nand_platform_data nand_info = { @@ -209,10 +222,12 @@ static int f3s_devices_init(void) imx35_add_mmc0(NULL); - register_device(&sdram_dev); + register_device(&sdram0_dev); + register_device(&sdram1_dev); imx35_add_fb(&ipu_fb_data); - armlinux_add_dram(&sdram_dev); + armlinux_add_dram(&sdram0_dev); + armlinux_add_dram(&sdram1_dev); armlinux_set_bootparams((void *)0x80000100); armlinux_set_architecture(MACH_TYPE_MX35_3DS); diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c index 4bee797..34edceb 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c +++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c @@ -17,19 +17,28 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { { .ptr_type = 4, .addr = 0xB8001010, .val = 0x0000030C, }, { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, { .ptr_type = 4, .addr = 0xB8001000, .val = 0x92220000, }, + { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x92220000, }, { .ptr_type = 4, .addr = 0x80000400, .val = 0x12345678, }, + { .ptr_type = 4, .addr = 0x90000400, .val = 0x12345678, }, { .ptr_type = 4, .addr = 0xB8001000, .val = 0xA2220000, }, { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, { .ptr_type = 4, .addr = 0xB8001000, .val = 0xB2220000, }, + { .ptr_type = 4, .addr = 0xB8001004, .val = 0xB2220000, }, { .ptr_type = 1, .addr = 0x80000233, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x90000233, .val = 0xda, }, { .ptr_type = 1, .addr = 0x82000780, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x92000780, .val = 0xda, }, { .ptr_type = 1, .addr = 0x82000400, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x92000400, .val = 0xda, }, { .ptr_type = 4, .addr = 0xB8001000, .val = 0x82226080, }, { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x82226080, }, { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, - { .ptr_type = 4, .addr = 0xB8001008, .val = 0x00002000, }, }; diff --git a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S index 1680579..413e04a 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S +++ b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S @@ -28,8 +28,8 @@ #include "board-mx35_3stack.h" #define CSD0_BASE_ADDR 0x80000000 -#define ESDCTL_BASE_ADDR 0xB8001000 #define CSD1_BASE_ADDR 0x90000000 +#define ESDCTL_BASE_ADDR 0xB8001000 #define writel(val, reg) \ ldr r0, =reg; \ @@ -122,9 +122,9 @@ board_init_lowlevel: str r1, [r0, #CCM_CGR1] /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #0x80000000 + cmp pc, #CSD0_BASE_ADDR bls 1f - cmp pc, #0x90000000 + cmp pc, #CSD1_BASE_ADDR bhi 1f mov pc, r10 @@ -138,14 +138,17 @@ board_init_lowlevel: /* ip(r12) has used to save lr register in upper calling */ mov fp, lr + /* setup bank 0 */ mov r5, #0x00 mov r2, #0x00 mov r1, #CSD0_BASE_ADDR bl setup_sdram_bank - cmp r3, #0x0 - orreq r5, r5, #1 - eorne r2, r2, #0x1 - blne setup_sdram_bank + + /* setup bank 1 */ + mov r5, #0x00 + mov r2, #0x00 + mov r1, #CSD1_BASE_ADDR + bl setup_sdram_bank mov lr, fp -- 1.7.4.2 -- Roman Fietze Telemotive AG Buero Muehlhausen Breitwiesen 73347 Muehlhausen Tel.: +49(0)7335/18493-45 http://www.telemotive.de _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: Freescale i.MX35 using CSD1 and 256 MiB DDR2 2011-04-26 12:30 Freescale i.MX35 using CSD1 and 256 MiB DDR2 Roman Fietze @ 2011-04-26 21:56 ` Sascha Hauer 2011-04-27 8:38 ` [PATCH] freescale-mx35-3-stack: support 256 MiB RAM Roman Fietze 0 siblings, 1 reply; 9+ messages in thread From: Sascha Hauer @ 2011-04-26 21:56 UTC (permalink / raw) To: Roman Fietze; +Cc: barebox Hi Roman, On Tue, Apr 26, 2011 at 02:30:01PM +0200, Roman Fietze wrote: > Hello Barebox Mailing List Members, > > I found this advice to patch RedBoot to support more than 128 MiB DDR2 > on a Freescale i.MX35 3-stack eval board by enabling CSD1 and properly > configuring the ESDRAMC. > > http://www.spinics.net/lists/u-boot-v2/msg03422.html > > They simply seem to modify the boot code by omitting some checks and > adding MMU mapping entries. > > My changes are not successful yet. It seems I'm simply not yet > familiar enough with the i.MX35, barebox, or even both. The changes > that I added to barebox are at the end of this mail. > > It seems that barebox uses the DCD table to boot the chip in my case, > so I added new entries there, and I can see them when dumping e.g. the > ESDRAMC registers using barebox itself (yes, it still starts. I can > still dump the RAM starting at 0x80000000, but when I try to dump > 0x90000000 barebox simply hangs. > > I checked the IOMUX GPRA, the PAD settings for CS2 and CS3, the > ESDRAMC registers and all locations of Freescale's document containing > CS2, CS3, CSD0, CSD1, etc. with no success. > > I'm stuck. What am I missing? A pointer to the appropriate section of > the documentation or any helpful link would already very helpful. There are at least two bugs in your flash header, see below. > > > diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c > index 4bee797..34edceb 100644 > --- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c > +++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c > @@ -17,19 +17,28 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { > { .ptr_type = 4, .addr = 0xB8001010, .val = 0x0000030C, }, > { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, > { .ptr_type = 4, .addr = 0xB8001000, .val = 0x92220000, }, > + { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, > + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x92220000, }, > { .ptr_type = 4, .addr = 0x80000400, .val = 0x12345678, }, > + { .ptr_type = 4, .addr = 0x90000400, .val = 0x12345678, }, > { .ptr_type = 4, .addr = 0xB8001000, .val = 0xA2220000, }, There is the equivalent for this at 0xB8001008 missing > { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, > + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, > { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, > + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, > { .ptr_type = 4, .addr = 0xB8001000, .val = 0xB2220000, }, > + { .ptr_type = 4, .addr = 0xB8001004, .val = 0xB2220000, }, This should be 0xB8001008 > { .ptr_type = 1, .addr = 0x80000233, .val = 0xda, }, > + { .ptr_type = 1, .addr = 0x90000233, .val = 0xda, }, > { .ptr_type = 1, .addr = 0x82000780, .val = 0xda, }, > + { .ptr_type = 1, .addr = 0x92000780, .val = 0xda, }, > { .ptr_type = 1, .addr = 0x82000400, .val = 0xda, }, > + { .ptr_type = 1, .addr = 0x92000400, .val = 0xda, }, > { .ptr_type = 4, .addr = 0xB8001000, .val = 0x82226080, }, > { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, > + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x82226080, }, > { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, > { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, > - { .ptr_type = 4, .addr = 0xB8001008, .val = 0x00002000, }, > }; > > > > /* Skip SDRAM initialization if we run from RAM */ > - cmp pc, #0x80000000 > + cmp pc, #CSD0_BASE_ADDR > bls 1f > - cmp pc, #0x90000000 > + cmp pc, #CSD1_BASE_ADDR This should be 0xa0000000 since with 256MB Ram this is still in SDRAM. I Hope this helps. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH] freescale-mx35-3-stack: support 256 MiB RAM 2011-04-26 21:56 ` Sascha Hauer @ 2011-04-27 8:38 ` Roman Fietze 2011-04-27 9:14 ` Marc Kleine-Budde 0 siblings, 1 reply; 9+ messages in thread From: Roman Fietze @ 2011-04-27 8:38 UTC (permalink / raw) To: Sascha Hauer; +Cc: barebox [-- Attachment #1.1: Type: Text/Plain, Size: 6519 bytes --] Hallo, On Tuesday, 26.April.2011 23:56:30 Sascha Hauer wrote: > There are at least two bugs in your flash header, see below. I think I will need reading glasses pretty soon. :( Here are the updated patches. And they seem to work on our two boards. As far as I know there are different variants of the Freescale i.MX35 3-stack out there. It would be great if somebody using one of those boards could double check the patches. Here's the updated patch: From ee2ed245651363f6cd6f1d5ad00e7a88c206b5b4 Mon Sep 17 00:00:00 2001 From: Roman Fietze <roman.fietze@telemotive.de> Date: Wed, 27 Apr 2011 07:13:12 +0200 Subject: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM Extend DCD table and low level init routines. Add barebox SDRAM device. Signed-off-by: Roman Fietze <roman.fietze@telemotive.de> --- arch/arm/boards/freescale-mx35-3-stack/3stack.c | 25 +++++++++++++++---- .../boards/freescale-mx35-3-stack/flash_header.c | 26 +++++++++++++++++++- .../boards/freescale-mx35-3-stack/lowlevel_init.S | 17 +++++++----- 3 files changed, 55 insertions(+), 13 deletions(-) diff --git a/arch/arm/boards/freescale-mx35-3-stack/3stack.c b/arch/arm/boards/freescale-mx35-3-stack/3stack.c index 7b61a24..2a12aaa 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx35-3-stack/3stack.c @@ -71,17 +71,30 @@ static struct fec_platform_data fec_info = { .phy_addr = 0x1F, }; -static struct memory_platform_data sdram_pdata = { +static struct memory_platform_data sdram0_pdata = { .name = "ram0", .flags = DEVFS_RDWR, }; -static struct device_d sdram_dev = { +static struct device_d sdram0_dev = { .id = -1, .name = "mem", .map_base = IMX_SDRAM_CS0, .size = 128 * 1024 * 1024, - .platform_data = &sdram_pdata, + .platform_data = &sdram0_pdata, +}; + +static struct memory_platform_data sdram1_pdata = { + .name = "ram1", + .flags = DEVFS_RDWR, +}; + +static struct device_d sdram1_dev = { + .id = -1, + .name = "mem", + .map_base = IMX_SDRAM_CS1, + .size = 128 * 1024 * 1024, + .platform_data = &sdram1_pdata, }; struct imx_nand_platform_data nand_info = { @@ -209,10 +222,12 @@ static int f3s_devices_init(void) imx35_add_mmc0(NULL); - register_device(&sdram_dev); + register_device(&sdram0_dev); + register_device(&sdram1_dev); imx35_add_fb(&ipu_fb_data); - armlinux_add_dram(&sdram_dev); + armlinux_add_dram(&sdram0_dev); + armlinux_add_dram(&sdram1_dev); armlinux_set_bootparams((void *)0x80000100); armlinux_set_architecture(MACH_TYPE_MX35_3DS); diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c index 4bee797..92f2142 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c +++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c @@ -13,23 +13,47 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { { .ptr_type = 4, .addr = 0xb8002050, .val = 0x0000d843, }, { .ptr_type = 4, .addr = 0xB8002054, .val = 0x22252521, }, { .ptr_type = 4, .addr = 0xB8002058, .val = 0x22220a00, }, + { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, { .ptr_type = 4, .addr = 0xB8001010, .val = 0x0000030C, }, + { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0x92220000, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x92220000, }, + { .ptr_type = 4, .addr = 0x80000400, .val = 0x12345678, }, + { .ptr_type = 4, .addr = 0x90000400, .val = 0x12345678, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0xA2220000, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0xA2220000, }, + { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0xB2220000, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0xB2220000, }, + { .ptr_type = 1, .addr = 0x80000233, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x90000233, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x82000780, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x92000780, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x82000400, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x92000400, .val = 0xda, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0x82226080, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x82226080, }, + { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, - { .ptr_type = 4, .addr = 0xB8001008, .val = 0x00002000, }, }; diff --git a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S index 1680579..413e04a 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S +++ b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S @@ -28,8 +28,8 @@ #include "board-mx35_3stack.h" #define CSD0_BASE_ADDR 0x80000000 -#define ESDCTL_BASE_ADDR 0xB8001000 #define CSD1_BASE_ADDR 0x90000000 +#define ESDCTL_BASE_ADDR 0xB8001000 #define writel(val, reg) \ ldr r0, =reg; \ @@ -122,9 +122,9 @@ board_init_lowlevel: str r1, [r0, #CCM_CGR1] /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #0x80000000 + cmp pc, #CSD0_BASE_ADDR bls 1f - cmp pc, #0x90000000 + cmp pc, #CSD1_BASE_ADDR bhi 1f mov pc, r10 @@ -138,14 +138,17 @@ board_init_lowlevel: /* ip(r12) has used to save lr register in upper calling */ mov fp, lr + /* setup bank 0 */ mov r5, #0x00 mov r2, #0x00 mov r1, #CSD0_BASE_ADDR bl setup_sdram_bank - cmp r3, #0x0 - orreq r5, r5, #1 - eorne r2, r2, #0x1 - blne setup_sdram_bank + + /* setup bank 1 */ + mov r5, #0x00 + mov r2, #0x00 + mov r1, #CSD1_BASE_ADDR + bl setup_sdram_bank mov lr, fp -- 1.7.4.2 Roman -- Roman Fietze Telemotive AG Büro Mühlhausen Breitwiesen 73347 Mühlhausen Tel.: +49(0)7335/18493-45 http://www.telemotive.de Amtsgericht Ulm HRB 541321 Vorstand: Peter Kersten, Markus Fischer, Franz Diller, Markus Stolz [-- Attachment #1.2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 198 bytes --] [-- Attachment #2: Type: text/plain, Size: 149 bytes --] _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM 2011-04-27 8:38 ` [PATCH] freescale-mx35-3-stack: support 256 MiB RAM Roman Fietze @ 2011-04-27 9:14 ` Marc Kleine-Budde 2011-04-27 10:32 ` Roman Fietze 0 siblings, 1 reply; 9+ messages in thread From: Marc Kleine-Budde @ 2011-04-27 9:14 UTC (permalink / raw) To: Roman Fietze; +Cc: barebox [-- Attachment #1.1: Type: text/plain, Size: 7248 bytes --] On 04/27/2011 10:38 AM, Roman Fietze wrote: > Hallo, > > On Tuesday, 26.April.2011 23:56:30 Sascha Hauer wrote: > >> There are at least two bugs in your flash header, see below. > > I think I will need reading glasses pretty soon. :( > > Here are the updated patches. And they seem to work on our two boards. > > As far as I know there are different variants of the Freescale i.MX35 > 3-stack out there. It would be great if somebody using one of those > boards could double check the patches. > > Here's the updated patch: > > From ee2ed245651363f6cd6f1d5ad00e7a88c206b5b4 Mon Sep 17 00:00:00 2001 > From: Roman Fietze <roman.fietze@telemotive.de> > Date: Wed, 27 Apr 2011 07:13:12 +0200 > Subject: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM > > Extend DCD table and low level init routines. Add barebox SDRAM > device. > > Signed-off-by: Roman Fietze <roman.fietze@telemotive.de> > --- > arch/arm/boards/freescale-mx35-3-stack/3stack.c | 25 +++++++++++++++---- > .../boards/freescale-mx35-3-stack/flash_header.c | 26 +++++++++++++++++++- > .../boards/freescale-mx35-3-stack/lowlevel_init.S | 17 +++++++----- > 3 files changed, 55 insertions(+), 13 deletions(-) > > diff --git a/arch/arm/boards/freescale-mx35-3-stack/3stack.c b/arch/arm/boards/freescale-mx35-3-stack/3stack.c > index 7b61a24..2a12aaa 100644 > --- a/arch/arm/boards/freescale-mx35-3-stack/3stack.c > +++ b/arch/arm/boards/freescale-mx35-3-stack/3stack.c > @@ -71,17 +71,30 @@ static struct fec_platform_data fec_info = { > .phy_addr = 0x1F, > }; > > -static struct memory_platform_data sdram_pdata = { > +static struct memory_platform_data sdram0_pdata = { > .name = "ram0", > .flags = DEVFS_RDWR, > }; > > -static struct device_d sdram_dev = { > +static struct device_d sdram0_dev = { > .id = -1, ^^^^^ Have a look at the /dev folder, do you have two "/dev/mem*"? If not you should make the .id unique, i.e. should be "0" here. > .name = "mem", > .map_base = IMX_SDRAM_CS0, > .size = 128 * 1024 * 1024, > - .platform_data = &sdram_pdata, > + .platform_data = &sdram0_pdata, > +}; > + > +static struct memory_platform_data sdram1_pdata = { > + .name = "ram1", > + .flags = DEVFS_RDWR, > +}; > + > +static struct device_d sdram1_dev = { > + .id = -1, ^^^^^ here "1" > + .name = "mem", > + .map_base = IMX_SDRAM_CS1, > + .size = 128 * 1024 * 1024, > + .platform_data = &sdram1_pdata, > }; > > struct imx_nand_platform_data nand_info = { > @@ -209,10 +222,12 @@ static int f3s_devices_init(void) > > imx35_add_mmc0(NULL); > > - register_device(&sdram_dev); > + register_device(&sdram0_dev); > + register_device(&sdram1_dev); > imx35_add_fb(&ipu_fb_data); > > - armlinux_add_dram(&sdram_dev); > + armlinux_add_dram(&sdram0_dev); > + armlinux_add_dram(&sdram1_dev); > armlinux_set_bootparams((void *)0x80000100); > armlinux_set_architecture(MACH_TYPE_MX35_3DS); > > diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c > index 4bee797..92f2142 100644 > --- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c > +++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c > @@ -13,23 +13,47 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { > { .ptr_type = 4, .addr = 0xb8002050, .val = 0x0000d843, }, > { .ptr_type = 4, .addr = 0xB8002054, .val = 0x22252521, }, > { .ptr_type = 4, .addr = 0xB8002058, .val = 0x22220a00, }, > + > { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, > { .ptr_type = 4, .addr = 0xB8001010, .val = 0x0000030C, }, > + > { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, > + { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, > + > { .ptr_type = 4, .addr = 0xB8001000, .val = 0x92220000, }, > + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x92220000, }, > + > { .ptr_type = 4, .addr = 0x80000400, .val = 0x12345678, }, > + { .ptr_type = 4, .addr = 0x90000400, .val = 0x12345678, }, > + > { .ptr_type = 4, .addr = 0xB8001000, .val = 0xA2220000, }, > + { .ptr_type = 4, .addr = 0xB8001008, .val = 0xA2220000, }, > + > { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, > + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, > + > { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, > + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, > + > { .ptr_type = 4, .addr = 0xB8001000, .val = 0xB2220000, }, > + { .ptr_type = 4, .addr = 0xB8001008, .val = 0xB2220000, }, > + > { .ptr_type = 1, .addr = 0x80000233, .val = 0xda, }, > + { .ptr_type = 1, .addr = 0x90000233, .val = 0xda, }, > + > { .ptr_type = 1, .addr = 0x82000780, .val = 0xda, }, > + { .ptr_type = 1, .addr = 0x92000780, .val = 0xda, }, > + > { .ptr_type = 1, .addr = 0x82000400, .val = 0xda, }, > + { .ptr_type = 1, .addr = 0x92000400, .val = 0xda, }, > + > { .ptr_type = 4, .addr = 0xB8001000, .val = 0x82226080, }, > + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x82226080, }, > + > { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, > { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, > + > { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, > - { .ptr_type = 4, .addr = 0xB8001008, .val = 0x00002000, }, > }; > > > diff --git a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S > index 1680579..413e04a 100644 > --- a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S > +++ b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S > @@ -28,8 +28,8 @@ > #include "board-mx35_3stack.h" > > #define CSD0_BASE_ADDR 0x80000000 > -#define ESDCTL_BASE_ADDR 0xB8001000 > #define CSD1_BASE_ADDR 0x90000000 > +#define ESDCTL_BASE_ADDR 0xB8001000 > > #define writel(val, reg) \ > ldr r0, =reg; \ > @@ -122,9 +122,9 @@ board_init_lowlevel: > str r1, [r0, #CCM_CGR1] > > /* Skip SDRAM initialization if we run from RAM */ > - cmp pc, #0x80000000 > + cmp pc, #CSD0_BASE_ADDR > bls 1f > - cmp pc, #0x90000000 > + cmp pc, #CSD1_BASE_ADDR > bhi 1f > > mov pc, r10 > @@ -138,14 +138,17 @@ board_init_lowlevel: > /* ip(r12) has used to save lr register in upper calling */ > mov fp, lr > > + /* setup bank 0 */ > mov r5, #0x00 > mov r2, #0x00 > mov r1, #CSD0_BASE_ADDR > bl setup_sdram_bank > - cmp r3, #0x0 > - orreq r5, r5, #1 > - eorne r2, r2, #0x1 > - blne setup_sdram_bank > + > + /* setup bank 1 */ > + mov r5, #0x00 > + mov r2, #0x00 > + mov r1, #CSD1_BASE_ADDR > + bl setup_sdram_bank > > mov lr, fp > > > > > _______________________________________________ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | [-- Attachment #1.2: OpenPGP digital signature --] [-- Type: application/pgp-signature, Size: 262 bytes --] [-- Attachment #2: Type: text/plain, Size: 149 bytes --] _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM 2011-04-27 9:14 ` Marc Kleine-Budde @ 2011-04-27 10:32 ` Roman Fietze 2011-04-27 10:34 ` Marc Kleine-Budde 0 siblings, 1 reply; 9+ messages in thread From: Roman Fietze @ 2011-04-27 10:32 UTC (permalink / raw) To: Marc Kleine-Budde; +Cc: barebox Hello Marc, On Wednesday, 27.April.2011 11:14:54 Marc Kleine-Budde wrote: > Have a look at the /dev folder, do you have two "/dev/mem*"? If not > you should make the .id unique, i.e. should be "0" here. Barebox' register_device auto increments the ID if it's below zero, and devinfo shows me ... |----mem2 (ram0) |----mem3 (ram1) ... "My" code is just borrowed from boards/karo-tx25/board.c. So if it's ambiguous, somebody (Sascha? Me?) should fix that there as well. Thanks for the review. Roman -- Roman Fietze Telemotive AG Buero Muehlhausen Breitwiesen 73347 Muehlhausen Tel.: +49(0)7335/18493-45 http://www.telemotive.de _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM 2011-04-27 10:32 ` Roman Fietze @ 2011-04-27 10:34 ` Marc Kleine-Budde 2012-01-20 15:04 ` Thomas Mayer 0 siblings, 1 reply; 9+ messages in thread From: Marc Kleine-Budde @ 2011-04-27 10:34 UTC (permalink / raw) To: Roman Fietze; +Cc: barebox [-- Attachment #1.1: Type: text/plain, Size: 872 bytes --] On 04/27/2011 12:32 PM, Roman Fietze wrote: > Hello Marc, > > On Wednesday, 27.April.2011 11:14:54 Marc Kleine-Budde wrote: > >> Have a look at the /dev folder, do you have two "/dev/mem*"? If not >> you should make the .id unique, i.e. should be "0" here. > > Barebox' register_device auto increments the ID if it's below zero, > and devinfo shows me Even better! > > ... > |----mem2 (ram0) > |----mem3 (ram1) > ... > > "My" code is just borrowed from boards/karo-tx25/board.c. So if it's > ambiguous, somebody (Sascha? Me?) should fix that there as well. Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions | Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917-5555 | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | [-- Attachment #1.2: OpenPGP digital signature --] [-- Type: application/pgp-signature, Size: 262 bytes --] [-- Attachment #2: Type: text/plain, Size: 149 bytes --] _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM 2011-04-27 10:34 ` Marc Kleine-Budde @ 2012-01-20 15:04 ` Thomas Mayer 2012-01-23 9:26 ` Sascha Hauer 0 siblings, 1 reply; 9+ messages in thread From: Thomas Mayer @ 2012-01-20 15:04 UTC (permalink / raw) To: barebox [-- Attachment #1.1: Type: text/plain, Size: 891 bytes --] Hi, is there a reason why this patch was never applied? It works fine for us. Regards, Thomas On 27.04.2011 12:34, Marc Kleine-Budde wrote: > On 04/27/2011 12:32 PM, Roman Fietze wrote: >> Hello Marc, >> >> On Wednesday, 27.April.2011 11:14:54 Marc Kleine-Budde wrote: >> >>> Have a look at the /dev folder, do you have two "/dev/mem*"? If not >>> you should make the .id unique, i.e. should be "0" here. >> Barebox' register_device auto increments the ID if it's below zero, >> and devinfo shows me > Even better! > >> ... >> |----mem2 (ram0) >> |----mem3 (ram1) >> ... >> >> "My" code is just borrowed from boards/karo-tx25/board.c. So if it's >> ambiguous, somebody (Sascha? Me?) should fix that there as well. > Marc > > > > > _______________________________________________ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox [-- Attachment #1.2: Type: text/html, Size: 1805 bytes --] [-- Attachment #2: Type: text/plain, Size: 149 bytes --] _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM 2012-01-20 15:04 ` Thomas Mayer @ 2012-01-23 9:26 ` Sascha Hauer 2012-01-23 14:04 ` Thomas Mayer 0 siblings, 1 reply; 9+ messages in thread From: Sascha Hauer @ 2012-01-23 9:26 UTC (permalink / raw) To: Thomas Mayer; +Cc: barebox On Fri, Jan 20, 2012 at 04:04:28PM +0100, Thomas Mayer wrote: > Hi, > > is there a reason why this patch was never applied? > It works fine for us. Yeah, the reason probably is that I forgot to apply it. It does not apply anymore. Can you check this updated version? 8<------------------------------------------------ ARM i.MX freescale-mx35-3-stack: support 256 MiB RAM Extend DCD table and low level init routines. Add barebox SDRAM device. Also, fix the memory size for bank 0 to 128MB. It was accidently changed to 124MB here: commit f928efa818adfe56a08350569a9b0f3c2fb791d2 Author: Sascha Hauer <s.hauer@pengutronix.de> Date: Tue Jul 19 09:58:32 2011 +0200 add a add_mem_device function Add a helper function for boards to register their memory devices. This makes the board code smaller and also helps getting rid of map_base and struct memory_platform_data. And switch all of the memory to it Signed-off-by: Roman Fietze <roman.fietze@telemotive.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> --- arch/arm/boards/freescale-mx35-3-stack/3stack.c | 3 +- .../boards/freescale-mx35-3-stack/flash_header.c | 26 +++++++++++++++++++- .../boards/freescale-mx35-3-stack/lowlevel_init.S | 17 +++++++----- 3 files changed, 37 insertions(+), 9 deletions(-) diff --git a/arch/arm/boards/freescale-mx35-3-stack/3stack.c b/arch/arm/boards/freescale-mx35-3-stack/3stack.c index 030a1a7..cc27af3 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx35-3-stack/3stack.c @@ -130,7 +130,8 @@ static void set_board_rev(int rev) static int f3s_mem_init(void) { - arm_add_mem_device("ram0", IMX_SDRAM_CS0, 124 * 1024 * 1024); + arm_add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024); + arm_add_mem_device("ram1", IMX_SDRAM_CS1, 128 * 1024 * 1024); return 0; } diff --git a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c index 4bee797..92f2142 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/flash_header.c +++ b/arch/arm/boards/freescale-mx35-3-stack/flash_header.c @@ -13,23 +13,47 @@ struct imx_dcd_entry __dcd_entry_section dcd_entry[] = { { .ptr_type = 4, .addr = 0xb8002050, .val = 0x0000d843, }, { .ptr_type = 4, .addr = 0xB8002054, .val = 0x22252521, }, { .ptr_type = 4, .addr = 0xB8002058, .val = 0x22220a00, }, + { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, { .ptr_type = 4, .addr = 0xB8001010, .val = 0x0000030C, }, + { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0x92220000, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x92220000, }, + { .ptr_type = 4, .addr = 0x80000400, .val = 0x12345678, }, + { .ptr_type = 4, .addr = 0x90000400, .val = 0x12345678, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0xA2220000, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0xA2220000, }, + { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x80000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0x90000000, .val = 0x87654321, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0xB2220000, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0xB2220000, }, + { .ptr_type = 1, .addr = 0x80000233, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x90000233, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x82000780, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x92000780, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x82000400, .val = 0xda, }, + { .ptr_type = 1, .addr = 0x92000400, .val = 0xda, }, + { .ptr_type = 4, .addr = 0xB8001000, .val = 0x82226080, }, + { .ptr_type = 4, .addr = 0xB8001008, .val = 0x82226080, }, + { .ptr_type = 4, .addr = 0xB8001004, .val = 0x007ffc3f, }, { .ptr_type = 4, .addr = 0xB800100C, .val = 0x007ffc3f, }, + { .ptr_type = 4, .addr = 0xB8001010, .val = 0x00000304, }, - { .ptr_type = 4, .addr = 0xB8001008, .val = 0x00002000, }, }; diff --git a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S index 1680579..413e04a 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S +++ b/arch/arm/boards/freescale-mx35-3-stack/lowlevel_init.S @@ -28,8 +28,8 @@ #include "board-mx35_3stack.h" #define CSD0_BASE_ADDR 0x80000000 -#define ESDCTL_BASE_ADDR 0xB8001000 #define CSD1_BASE_ADDR 0x90000000 +#define ESDCTL_BASE_ADDR 0xB8001000 #define writel(val, reg) \ ldr r0, =reg; \ @@ -122,9 +122,9 @@ board_init_lowlevel: str r1, [r0, #CCM_CGR1] /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #0x80000000 + cmp pc, #CSD0_BASE_ADDR bls 1f - cmp pc, #0x90000000 + cmp pc, #CSD1_BASE_ADDR bhi 1f mov pc, r10 @@ -138,14 +138,17 @@ board_init_lowlevel: /* ip(r12) has used to save lr register in upper calling */ mov fp, lr + /* setup bank 0 */ mov r5, #0x00 mov r2, #0x00 mov r1, #CSD0_BASE_ADDR bl setup_sdram_bank - cmp r3, #0x0 - orreq r5, r5, #1 - eorne r2, r2, #0x1 - blne setup_sdram_bank + + /* setup bank 1 */ + mov r5, #0x00 + mov r2, #0x00 + mov r1, #CSD1_BASE_ADDR + bl setup_sdram_bank mov lr, fp -- 1.7.8.3 -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] freescale-mx35-3-stack: support 256 MiB RAM 2012-01-23 9:26 ` Sascha Hauer @ 2012-01-23 14:04 ` Thomas Mayer 0 siblings, 0 replies; 9+ messages in thread From: Thomas Mayer @ 2012-01-23 14:04 UTC (permalink / raw) To: barebox Hi Sasha, On 23.01.2012 10:26, Sascha Hauer wrote: > On Fri, Jan 20, 2012 at 04:04:28PM +0100, Thomas Mayer wrote: >> Hi, >> >> is there a reason why this patch was never applied? >> It works fine for us. > Yeah, the reason probably is that I forgot to apply it. > > It does not apply anymore. Can you check this updated version? I patched the v2012.01.0 release to test it, seems to work fine :) Regards, Thomas _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2012-01-23 14:04 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2011-04-26 12:30 Freescale i.MX35 using CSD1 and 256 MiB DDR2 Roman Fietze 2011-04-26 21:56 ` Sascha Hauer 2011-04-27 8:38 ` [PATCH] freescale-mx35-3-stack: support 256 MiB RAM Roman Fietze 2011-04-27 9:14 ` Marc Kleine-Budde 2011-04-27 10:32 ` Roman Fietze 2011-04-27 10:34 ` Marc Kleine-Budde 2012-01-20 15:04 ` Thomas Mayer 2012-01-23 9:26 ` Sascha Hauer 2012-01-23 14:04 ` Thomas Mayer
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