* [PATCH 5/7] ARM boards: move sdram setup before mmu setup
2011-07-29 9:43 rework MMU support Sascha Hauer
` (3 preceding siblings ...)
2011-07-29 9:43 ` [PATCH 4/7] ARM: pass size to dma_free_coherent Sascha Hauer
@ 2011-07-29 9:43 ` Sascha Hauer
2011-07-29 9:43 ` [PATCH 6/7] ARM: rework MMU support Sascha Hauer
2011-07-29 9:43 ` [PATCH 7/7] ARM boards: remove now unnecessary mmu calls Sascha Hauer
6 siblings, 0 replies; 10+ messages in thread
From: Sascha Hauer @ 2011-07-29 9:43 UTC (permalink / raw)
To: barebox
The new MMU setup will need SDRAM base addresses and sizes.
For this reason convert the MMU enabled ARM boards:
- move MMU setup to a postconsole_initcall. This is early but
still makes sure that we already have the console available
- move sdram registration in this initcall before the MMU setup.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/chumby_falconwing/falconwing.c | 19 ++++++-----
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c | 26 ++++++---------
arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c | 24 ++++++--------
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c | 18 +++++-----
arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c | 25 ++++++--------
arch/arm/boards/freescale-mx51-pdk/board.c | 26 ++++++---------
arch/arm/boards/guf-cupid/board.c | 16 +++++----
arch/arm/boards/guf-neso/board.c | 25 ++++++--------
arch/arm/boards/karo-tx25/board.c | 34 ++++++++------------
arch/arm/boards/karo-tx28/tx28.c | 19 ++++++-----
arch/arm/boards/panda/board.c | 18 +++++-----
arch/arm/boards/pcm037/pcm037.c | 35 +++++++++-----------
arch/arm/boards/pcm038/pcm038.c | 25 +++++++--------
arch/arm/boards/pcm043/pcm043.c | 18 ++++++----
arch/arm/boards/pcm049/board.c | 20 ++++++------
arch/arm/boards/phycard-i.MX27/pca100.c | 23 ++++++-------
16 files changed, 176 insertions(+), 195 deletions(-)
diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c
index 7a5f37e..0c9c339 100644
--- a/arch/arm/boards/chumby_falconwing/falconwing.c
+++ b/arch/arm/boards/chumby_falconwing/falconwing.c
@@ -274,9 +274,15 @@ static const uint32_t pad_setup[] = {
GPMI_RDY3_GPIO | GPIO_IN | PULLUP(1),
};
-#ifdef CONFIG_MMU
static int falconwing_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_MEMORY_BASE, 64 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x40000000, 0x40000000, 64, PMD_SECT_DEF_CACHED);
@@ -285,11 +291,10 @@ static int falconwing_mmu_init(void)
setup_dma_coherent(0x10000000);
mmu_enable();
-
+#endif
return 0;
}
-postcore_initcall(falconwing_mmu_init);
-#endif
+postconsole_initcall(falconwing_mmu_init);
/**
* Try to register an environment storage on the attached MCI card
@@ -359,14 +364,11 @@ static void falconwing_init_usb(void)
static int falconwing_devices_init(void)
{
int i, rc;
- struct device_d *sdram_dev;
/* initizalize gpios */
for (i = 0; i < ARRAY_SIZE(pad_setup); i++)
imx_gpio_mode(pad_setup[i]);
- sdram_dev = add_mem_device("ram0", IMX_MEMORY_BASE, 64 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
imx_set_ioclk(480000000); /* enable IOCLK to run at the PLL frequency */
/* run the SSP unit clock at 100,000 kHz */
imx_set_sspclk(0, 100000000, 1);
@@ -375,8 +377,7 @@ static int falconwing_devices_init(void)
falconwing_init_usb();
- armlinux_add_dram(sdram_dev);
- armlinux_set_bootparams(dev_get_mem_region(sdram_dev, 0) + 0x100);
+ armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100);
armlinux_set_architecture(MACH_TYPE_CHUMBY);
rc = register_persistant_environment();
diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
index b80de4b..5a21636 100644
--- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
+++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
@@ -162,9 +162,15 @@ static struct device_d usbotg_dev = {
.platform_data = &usb_pdata,
};
-#ifdef CONFIG_MMU
-static void eukrea_cpuimx25_mmu_init(void)
+static int eukrea_cpuimx25_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 64 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
@@ -173,12 +179,10 @@ static void eukrea_cpuimx25_mmu_init(void)
setup_dma_coherent(0x10000000);
mmu_enable();
-}
-#else
-static void eukrea_cpuimx25_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(eukrea_cpuimx25_mmu_init);
static struct pad_desc eukrea_cpuimx25_pads[] = {
MX25_PAD_FEC_MDC__FEC_MDC,
@@ -236,10 +240,6 @@ static struct pad_desc eukrea_cpuimx25_pads[] = {
static int eukrea_cpuimx25_devices_init(void)
{
- struct device_d *sdram_dev;
-
- eukrea_cpuimx25_mmu_init();
-
mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
ARRAY_SIZE(eukrea_cpuimx25_pads));
@@ -259,10 +259,6 @@ static int eukrea_cpuimx25_devices_init(void)
PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
- sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 64 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
-
/* enable LCD */
gpio_direction_output(26, 1);
gpio_set_value(26, 1);
diff --git a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
index fa910b9..aea2d20 100644
--- a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
+++ b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
@@ -108,9 +108,15 @@ static struct i2c_board_info i2c_devices[] = {
},
};
-#ifdef CONFIG_MMU
-static void eukrea_cpuimx27_mmu_init(void)
+static int eukrea_cpuimx27_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0xa0000000, SDRAM0 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
@@ -119,12 +125,10 @@ static void eukrea_cpuimx27_mmu_init(void)
setup_dma_coherent(0x10000000);
mmu_enable();
-}
-#else
-static void eukrea_cpuimx27_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(eukrea_cpuimx27_mmu_init);
#ifdef CONFIG_DRIVER_VIDEO_IMX
static struct imx_fb_videomode imxfb_mode = {
@@ -162,7 +166,6 @@ static struct device_d imxfb_dev = {
static int eukrea_cpuimx27_devices_init(void)
{
- struct device_d *sdram_dev;
char *envdev = "no";
int i;
@@ -221,8 +224,6 @@ static int eukrea_cpuimx27_devices_init(void)
#endif
};
- eukrea_cpuimx27_mmu_init();
-
/* configure 16 bit nor flash on cs0 */
CS0U = 0x00008F03;
CS0L = 0xA0330D01;
@@ -237,9 +238,6 @@ static int eukrea_cpuimx27_devices_init(void)
add_cfi_flash_device(-1, 0xC2000000, 32 * 1024 * 1024, 0);
#endif
imx27_add_nand(&nand_info);
- sdram_dev = add_mem_device("ram0", 0xa0000000, SDRAM0 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
PCCR0 |= PCCR0_I2C1_EN;
i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
index d43d3af..d1b9da5 100644
--- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
+++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
@@ -131,9 +131,15 @@ static struct device_d usbotg_dev = {
.platform_data = &usb_pdata,
};
-#ifdef CONFIG_MMU
static int eukrea_cpuimx35_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
@@ -146,15 +152,13 @@ static int eukrea_cpuimx35_mmu_init(void)
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
+#endif
return 0;
}
-postcore_initcall(eukrea_cpuimx35_mmu_init);
-#endif
+postconsole_initcall(eukrea_cpuimx35_mmu_init);
static int eukrea_cpuimx35_devices_init(void)
{
- struct device_d *sdram_dev;
-
imx35_add_nand(&nand_info);
devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
@@ -163,10 +167,6 @@ static int eukrea_cpuimx35_devices_init(void)
dev_add_bb_dev("env_raw", "env0");
imx35_add_fec(&fec_info);
-
- sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
imx35_add_fb(&ipu_fb_data);
imx35_add_i2c0(NULL);
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
index 4d281f4..4980a08 100644
--- a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
+++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
@@ -93,9 +93,15 @@ static struct pad_desc eukrea_cpuimx51_pads[] = {
#define GPIO_LAN8700_RESET (1 * 32 + 31)
#define GPIO_LCD_BL (2 * 32 + 4)
-#ifdef CONFIG_MMU
-static void eukrea_cpuimx51_mmu_init(void)
+static int eukrea_cpuimx51_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0x90000000, 256 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x90000000, 0x90000000, 256, PMD_SECT_DEF_CACHED);
@@ -110,22 +116,13 @@ static void eukrea_cpuimx51_mmu_init(void)
#endif
mmu_enable();
-}
-#else
-static void eukrea_cpuimx51_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(eukrea_cpuimx51_mmu_init);
static int eukrea_cpuimx51_devices_init(void)
{
- struct device_d *sdram_dev;
-
- eukrea_cpuimx51_mmu_init();
-
- sdram_dev = add_mem_device("ram0", 0x90000000, 256 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
imx51_add_fec(&fec_info);
#ifdef CONFIG_MCI_IMX_ESDHC
imx51_add_mmc0(NULL);
diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
index c763719..b7e9540 100644
--- a/arch/arm/boards/freescale-mx51-pdk/board.c
+++ b/arch/arm/boards/freescale-mx51-pdk/board.c
@@ -73,9 +73,15 @@ static struct pad_desc f3s_pads[] = {
IOMUX_PAD(0x60C, 0x21C, 3, 0x0, 0, 0x85), /* FIXME: needed? */
};
-#ifdef CONFIG_MMU
-static void babbage_mmu_init(void)
+static int babbage_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0x90000000, 512 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x90000000, 0x90000000, 512, PMD_SECT_DEF_CACHED);
@@ -84,12 +90,10 @@ static void babbage_mmu_init(void)
setup_dma_coherent(0x20000000);
mmu_enable();
-}
-#else
-static void babbage_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(babbage_mmu_init);
//extern int babbage_power_init(void);
@@ -229,14 +233,6 @@ static void babbage_power_init(void)
static int f3s_devices_init(void)
{
- struct device_d *sdram_dev;
-
- babbage_mmu_init();
-
- sdram_dev = add_mem_device("ram0", 0x90000000, 512 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
-
imx51_iim_register_fec_ethaddr();
imx51_add_fec(&fec_info);
imx51_add_mmc0(NULL);
diff --git a/arch/arm/boards/guf-cupid/board.c b/arch/arm/boards/guf-cupid/board.c
index 6906f0a..8ee6376 100644
--- a/arch/arm/boards/guf-cupid/board.c
+++ b/arch/arm/boards/guf-cupid/board.c
@@ -96,9 +96,15 @@ static struct imx_ipu_fb_platform_data ipu_fb_data = {
.enable = cupid_fb_enable,
};
-#ifdef CONFIG_MMU
static int cupid_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
@@ -111,15 +117,14 @@ static int cupid_mmu_init(void)
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
+#endif
return 0;
}
-postcore_initcall(cupid_mmu_init);
-#endif
+postconsole_initcall(cupid_mmu_init);
static int cupid_devices_init(void)
{
uint32_t reg;
- struct device_d *sdram_dev;
gpio_direction_output(GPIO_LCD_ENABLE, 0);
gpio_direction_output(GPIO_LCD_BACKLIGHT, 0);
@@ -139,9 +144,6 @@ static int cupid_devices_init(void)
devfs_add_partition("nand0", 0x40000, 0x80000, PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
- sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
imx35_add_fb(&ipu_fb_data);
imx35_add_mmc0(NULL);
diff --git a/arch/arm/boards/guf-neso/board.c b/arch/arm/boards/guf-neso/board.c
index e36e804..a595abd 100644
--- a/arch/arm/boards/guf-neso/board.c
+++ b/arch/arm/boards/guf-neso/board.c
@@ -136,9 +136,15 @@ static void neso_usbh_init(void)
}
#endif
-#ifdef CONFIG_MMU
-static void neso_mmu_init(void)
+static int neso_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
@@ -147,17 +153,14 @@ static void neso_mmu_init(void)
setup_dma_coherent(0x10000000);
mmu_enable();
-}
-#else
-static void neso_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(neso_mmu_init);
static int neso_devices_init(void)
{
int i;
- struct device_d *sdram_dev;
unsigned int mode[] = {
/* UART1 */
@@ -281,17 +284,11 @@ static int neso_devices_init(void)
gpio_direction_output(OTG_PHY_CS_GPIO, 1);
gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
-
- neso_mmu_init();
-
/* initialize gpios */
for (i = 0; i < ARRAY_SIZE(mode); i++)
imx_gpio_mode(mode[i]);
imx27_add_nand(&nand_info);
- sdram_dev = add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
imx27_add_fb(&neso_fb_data);
#ifdef CONFIG_USB
diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c
index a463c82..7b3cd7e 100644
--- a/arch/arm/boards/karo-tx25/board.c
+++ b/arch/arm/boards/karo-tx25/board.c
@@ -51,9 +51,20 @@ struct imx_nand_platform_data nand_info = {
.flash_bbt = 1,
};
-#ifdef CONFIG_MMU
static int tx25_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 32 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+ sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS1, 32 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+ add_mem_device("ram0", 0x78000000, 128 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 32, PMD_SECT_DEF_CACHED);
@@ -63,17 +74,11 @@ static int tx25_mmu_init(void)
setup_dma_coherent(0x02000000);
-#if TEXT_BASE & (0x100000 - 1)
-#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
-#else
- arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED);
-#endif
mmu_enable();
-
+#endif
return 0;
}
-postcore_initcall(tx25_mmu_init);
-#endif
+postconsole_initcall(tx25_mmu_init);
static struct pad_desc karo_tx25_padsd_fec[] = {
MX25_PAD_D11__GPIO_4_9, /* FEC PHY power on pin */
@@ -117,8 +122,6 @@ static void noinline gpio_fec_active(void)
static int tx25_devices_init(void)
{
- struct device_d *sdram_dev;
-
gpio_fec_active();
imx25_add_fec(&fec_info);
@@ -134,15 +137,6 @@ static int tx25_devices_init(void)
devfs_add_partition("nand0", 0x40000, 0x80000, PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
- sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 32 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
- sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS1, 32 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
- add_mem_device("ram0", 0x78000000, 128 * 1024,
- IORESOURCE_MEM_WRITEABLE);
-
armlinux_set_bootparams((void *)0x80000100);
armlinux_set_architecture(MACH_TYPE_TX25);
armlinux_set_serial(imx_uid());
diff --git a/arch/arm/boards/karo-tx28/tx28.c b/arch/arm/boards/karo-tx28/tx28.c
index b9d5454..bdec51d 100644
--- a/arch/arm/boards/karo-tx28/tx28.c
+++ b/arch/arm/boards/karo-tx28/tx28.c
@@ -70,9 +70,15 @@ static const uint32_t tx28_pad_setup[] = {
extern void base_board_init(void);
-#ifdef CONFIG_MMU
static int tx28_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x40000000, 0x40000000, 128, PMD_SECT_DEF_CACHED);
@@ -81,25 +87,20 @@ static int tx28_mmu_init(void)
setup_dma_coherent(0x10000000);
mmu_enable();
-
+#endif
return 0;
}
-postcore_initcall(tx28_mmu_init);
-#endif
+postconsole_initcall(tx28_mmu_init);
static int tx28_devices_init(void)
{
int i;
- struct device_d *sdram_dev;
/* initizalize gpios */
for (i = 0; i < ARRAY_SIZE(tx28_pad_setup); i++)
imx_gpio_mode(tx28_pad_setup[i]);
- sdram_dev = add_mem_device("ram0", IMX_MEMORY_BASE, 128 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
- armlinux_set_bootparams(dev_get_mem_region(sdram_dev, 0) + 0x100);
+ armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100);
armlinux_set_architecture(MACH_TYPE_TX28);
base_board_init();
diff --git a/arch/arm/boards/panda/board.c b/arch/arm/boards/panda/board.c
index 1c6cf58..b11da2e 100644
--- a/arch/arm/boards/panda/board.c
+++ b/arch/arm/boards/panda/board.c
@@ -46,20 +46,25 @@ static int panda_console_init(void)
}
console_initcall(panda_console_init);
-#ifdef CONFIG_MMU
static int panda_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0x80000000, SZ_1G,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 256, PMD_SECT_DEF_CACHED);
arm_create_section(0x90000000, 0x80000000, 256, PMD_SECT_DEF_UNCACHED);
mmu_enable();
-
+#endif
return 0;
}
-device_initcall(panda_mmu_init);
-#endif
+postconsole_initcall(panda_mmu_init);
static struct ehci_platform_data ehci_pdata = {
.flags = 0,
@@ -126,8 +131,6 @@ static struct device_d hsmmc_dev = {
static int panda_devices_init(void)
{
- struct device_d *sdram_dev;
-
panda_boardrev_init();
if (gpio_get_value(182)) {
@@ -154,9 +157,6 @@ static int panda_devices_init(void)
sr32(OMAP44XX_SCRM_ALTCLKSRC, 2, 2, 0x3);
}
- sdram_dev = add_mem_device("ram0", 0x80000000, SZ_1G,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
register_device(&hsmmc_dev);
panda_ehci_init();
diff --git a/arch/arm/boards/pcm037/pcm037.c b/arch/arm/boards/pcm037/pcm037.c
index 78bf1b9..acbfe54 100644
--- a/arch/arm/boards/pcm037/pcm037.c
+++ b/arch/arm/boards/pcm037/pcm037.c
@@ -146,9 +146,20 @@ static void pcm037_usb_init(void)
}
#endif
-#ifdef CONFIG_MMU
-static void pcm037_mmu_init(void)
+static int pcm037_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, SDRAM0 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+#ifndef CONFIG_PCM037_SDRAM_BANK1_NONE
+ sdram_dev = add_mem_device("ram1", IMX_SDRAM_CS1, SDRAM1 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+#endif
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
@@ -161,19 +172,13 @@ static void pcm037_mmu_init(void)
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
-}
-#else
-static void pcm037_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(pcm037_mmu_init);
static int imx31_devices_init(void)
{
- struct device_d *sdram_dev;
-
- pcm037_mmu_init();
-
__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
__REG(CSCR_L(0)) = 0x10000d03;
__REG(CSCR_A(0)) = 0x00720900;
@@ -221,14 +226,6 @@ static int imx31_devices_init(void)
add_generic_device("smc911x", -1, NULL, IMX_CS1_BASE, IMX_CS1_RANGE,
IORESOURCE_MEM, NULL);
- sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, SDRAM0 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
-#ifndef CONFIG_PCM037_SDRAM_BANK1_NONE
- sdram_dev = add_mem_device("ram1", IMX_SDRAM_CS1, SDRAM1 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
-#endif
#ifdef CONFIG_USB
pcm037_usb_init();
imx31_add_ehci0(NULL);
diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index 74c8b34..4644550 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -129,9 +129,15 @@ static void pcm038_usbh_init(void)
}
#endif
-#ifdef CONFIG_MMU
-static void pcm038_mmu_init(void)
+static int pcm038_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
@@ -140,18 +146,15 @@ static void pcm038_mmu_init(void)
setup_dma_coherent(0x10000000);
mmu_enable();
-}
-#else
-static void pcm038_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(pcm038_mmu_init);
static int pcm038_devices_init(void)
{
int i;
char *envdev;
- struct device_d *sdram_dev;
unsigned int mode[] = {
PD0_AIN_FEC_TXD0,
@@ -224,8 +227,6 @@ static int pcm038_devices_init(void)
PD26_AF_USBH2_DATA5,
};
- pcm038_mmu_init();
-
/* configure 16 bit nor flash on cs0 */
CS0U = 0x0000CC03;
CS0L = 0xa0330D01;
@@ -250,14 +251,12 @@ static int pcm038_devices_init(void)
gpio_direction_output(GPIO_PORTD | 28, 0);
gpio_set_value(GPIO_PORTD | 28, 0);
+
spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info));
imx27_add_spi0(&pcm038_spi_0_data);
add_cfi_flash_device(-1, 0xC0000000, 32 * 1024 * 1024, 0);
imx27_add_nand(&nand_info);
- sdram_dev = add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
add_mem_device("ram0", 0xc8000000, 512 * 1024, /* Can be up to 2MiB */
IORESOURCE_MEM_WRITEABLE);
imx27_add_fb(&pcm038_fb_data);
diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
index 3bd6402..d1fede7 100644
--- a/arch/arm/boards/pcm043/pcm043.c
+++ b/arch/arm/boards/pcm043/pcm043.c
@@ -99,9 +99,15 @@ static struct imx_ipu_fb_platform_data ipu_fb_data = {
.bpp = 16,
};
-#ifdef CONFIG_MMU
static int pcm043_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
@@ -114,10 +120,11 @@ static int pcm043_mmu_init(void)
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
+#endif
return 0;
}
-postcore_initcall(pcm043_mmu_init);
-#endif
+postconsole_initcall(pcm043_mmu_init);
+
struct gpio_led led0 = {
.gpio = 1 * 32 + 6,
@@ -125,7 +132,6 @@ struct gpio_led led0 = {
static int imx35_devices_init(void)
{
- struct device_d *sdram_dev;
uint32_t reg;
/* CS0: Nor Flash */
@@ -171,9 +177,6 @@ static int imx35_devices_init(void)
}
- sdram_dev = add_mem_device("ram0", IMX_SDRAM_CS0, 128 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
imx35_add_fb(&ipu_fb_data);
armlinux_set_bootparams((void *)0x80000100);
@@ -219,6 +222,7 @@ static int imx35_console_init(void)
mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
imx35_add_uart0();
+
return 0;
}
diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 7eae2cf..e691f59 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -57,9 +57,15 @@ static int pcm049_console_init(void)
}
console_initcall(pcm049_console_init);
-#ifdef CONFIG_MMU
static int pcm049_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0x80000000, SZ_512M,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0x80000000, 0x80000000, 256, PMD_SECT_DEF_CACHED);
@@ -67,11 +73,10 @@ static int pcm049_mmu_init(void)
arm_create_section(0x90000000, 0x80000000, 256, PMD_SECT_DEF_UNCACHED);
mmu_enable();
-
+#endif
return 0;
}
-device_initcall(pcm049_mmu_init);
-#endif
+postconsole_initcall(pcm049_mmu_init);
static struct device_d hsmmc_dev = {
.id = -1,
@@ -109,12 +114,7 @@ static void pcm049_network_init(void)
static int pcm049_devices_init(void)
{
- struct device_d *sdram_dev;
-
- sdram_dev = add_mem_device("ram0", 0x80000000, SZ_512M,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
- add_mem_device("ram0", 0x40300000, 48 * 1024,
+ add_mem_device("sram0", 0x40300000, 48 * 1024,
IORESOURCE_MEM_WRITEABLE);
register_device(&hsmmc_dev);
diff --git a/arch/arm/boards/phycard-i.MX27/pca100.c b/arch/arm/boards/phycard-i.MX27/pca100.c
index d196e55..6d3e2e3 100644
--- a/arch/arm/boards/phycard-i.MX27/pca100.c
+++ b/arch/arm/boards/phycard-i.MX27/pca100.c
@@ -69,9 +69,15 @@ static void pca100_usb_register(void)
}
#endif
-#ifdef CONFIG_MMU
-static void pca100_mmu_init(void)
+static int pca100_mmu_init(void)
{
+ struct device_d *sdram_dev;
+
+ sdram_dev = add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024,
+ IORESOURCE_MEM_WRITEABLE);
+ armlinux_add_dram(sdram_dev);
+
+#ifdef CONFIG_MMU
mmu_init();
arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
@@ -80,12 +86,10 @@ static void pca100_mmu_init(void)
setup_dma_coherent(0x10000000);
mmu_enable();
-}
-#else
-static void pca100_mmu_init(void)
-{
-}
#endif
+ return 0;
+}
+postconsole_initcall(pca100_mmu_init);
static void pca100_usb_init(void)
{
@@ -123,7 +127,6 @@ static int pca100_devices_init(void)
{
int i;
struct device_d *nand;
- struct device_d *sdram_dev;
unsigned int mode[] = {
PD0_AIN_FEC_TXD0,
@@ -198,9 +201,6 @@ static int pca100_devices_init(void)
imx_gpio_mode(mode[i]);
imx27_add_nand(&nand_info);
- sdram_dev = add_mem_device("ram0", 0xa0000000, 128 * 1024 * 1024,
- IORESOURCE_MEM_WRITEABLE);
- armlinux_add_dram(sdram_dev);
imx27_add_fec(&fec_info);
imx27_add_mmc0(NULL);
@@ -227,7 +227,6 @@ device_initcall(pca100_devices_init);
static int pca100_console_init(void)
{
- pca100_mmu_init();
imx27_add_uart0();
return 0;
}
--
1.7.5.4
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 6/7] ARM: rework MMU support
2011-07-29 9:43 rework MMU support Sascha Hauer
` (4 preceding siblings ...)
2011-07-29 9:43 ` [PATCH 5/7] ARM boards: move sdram setup before mmu setup Sascha Hauer
@ 2011-07-29 9:43 ` Sascha Hauer
2011-07-29 9:43 ` [PATCH 7/7] ARM boards: remove now unnecessary mmu calls Sascha Hauer
6 siblings, 0 replies; 10+ messages in thread
From: Sascha Hauer @ 2011-07-29 9:43 UTC (permalink / raw)
To: barebox
In barebox we used 1MiB sections to map our SDRAM cachable. This
has the drawback that we have to map our sdram twice: cached for
normal sdram and uncached for DMA operations. As address space gets
sparse on newer systems we are sometines unable to find a suitably
big enough area for the dma coherent space.
This patch changes the MMU code to use second level page tables.
With it we can implement dma_alloc_coherent as normal malloc, we
just have to remap the allocated area uncached afterwards and map
it cached again after free().
This makes arm_create_section(), setup_dma_coherent() and mmu_enable()
noops.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/cpu/mmu.c | 175 ++++++++++++++++++++++++++++++++++++--------
arch/arm/include/asm/mmu.h | 20 ++++-
include/common.h | 1 +
3 files changed, 161 insertions(+), 35 deletions(-)
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index bb067e3..53ba51a 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -1,10 +1,13 @@
#include <common.h>
#include <init.h>
#include <asm/mmu.h>
+#include <errno.h>
+#include <sizes.h>
+#include <asm/memory.h>
static unsigned long *ttb;
-void arm_create_section(unsigned long virt, unsigned long phys, int size_m,
+static void create_section(unsigned long virt, unsigned long phys, int size_m,
unsigned int flags)
{
int i;
@@ -24,6 +27,23 @@ void arm_create_section(unsigned long virt, unsigned long phys, int size_m,
}
/*
+ * Do it the simple way for now and invalidate the entire
+ * tlb
+ */
+static inline void tlb_invalidate(void)
+{
+ asm volatile (
+ "mov r0, #0\n"
+ "mcr p15, 0, r0, c7, c10, 4; @ drain write buffer\n"
+ "mcr p15, 0, r0, c8, c6, 0; @ invalidate D TLBs\n"
+ "mcr p15, 0, r0, c8, c5, 0; @ invalidate I TLBs\n"
+ :
+ :
+ : "r0"
+ );
+}
+
+/*
* Create a second level translation table for the given virtual address.
* We initially create a flat uncached mapping on it.
* Not yet exported, but may be later if someone finds use for it.
@@ -43,6 +63,84 @@ static u32 *arm_create_pte(unsigned long virt)
return table;
}
+static void remap_range(void *_start, size_t size, uint32_t flags)
+{
+ u32 pteentry;
+ struct arm_memory *mem;
+ unsigned long start = (unsigned long)_start;
+ u32 *p;
+ int numentries, i;
+
+ for_each_sdram_bank(mem) {
+ if (start >= mem->start && start < mem->start + mem->size)
+ goto found;
+ }
+
+ BUG();
+ return;
+
+found:
+ pteentry = (start - mem->start) >> PAGE_SHIFT;
+
+ numentries = size >> PAGE_SHIFT;
+
+ p = mem->ptes + pteentry;
+
+ for (i = 0; i < numentries; i++) {
+ p[i] &= ~(PTE_BUFFERABLE | PTE_CACHEABLE);
+ p[i] |= flags;
+ }
+
+ dma_flush_range((unsigned long)p,
+ (unsigned long)p + numentries * sizeof(u32));
+
+ tlb_invalidate();
+}
+
+/*
+ * remap the memory bank described by mem cachable and
+ * bufferable
+ */
+static int arm_mmu_remap_sdram(struct arm_memory *mem)
+{
+ unsigned long phys = (unsigned long)mem->start;
+ unsigned long ttb_start = phys >> 20;
+ unsigned long ttb_end = (phys + mem->size) >> 20;
+ unsigned long num_ptes = mem->size >> 10;
+ int i, pte;
+
+ debug("remapping SDRAM from 0x%08lx (size 0x%08lx)\n",
+ phys, mem->size);
+
+ /*
+ * We replace each 1MiB section in this range with second level page
+ * tables, therefore we must have 1Mib aligment here.
+ */
+ if ((phys & (SZ_1M - 1)) || (mem->size & (SZ_1M - 1)))
+ return -EINVAL;
+
+ mem->ptes = memalign(0x400, num_ptes * sizeof(u32));
+
+ debug("ptes: 0x%p ttb_start: 0x%08lx ttb_end: 0x%08lx\n",
+ mem->ptes, ttb_start, ttb_end);
+
+ for (i = 0; i < num_ptes; i++) {
+ mem->ptes[i] = (phys + i * 4096) | PTE_TYPE_SMALL |
+ PTE_SMALL_AP_URW_SRW | PTE_BUFFERABLE | PTE_CACHEABLE;
+ }
+
+ pte = 0;
+
+ for (i = ttb_start; i < ttb_end; i++) {
+ ttb[i] = (unsigned long)(&mem->ptes[pte]) | PMD_TYPE_TABLE |
+ (0 << 4);
+ pte += 256;
+ }
+
+ tlb_invalidate();
+
+ return 0;
+}
/*
* We have 8 exception vectors and the table consists of absolute
* jumps, so we need 8 * 4 bytes for the instructions and another
@@ -70,15 +168,17 @@ static void vectors_init(void)
}
/*
- * Prepare MMU for usage and create a flat mapping. Board
- * code is responsible to remap the SDRAM cached
+ * Prepare MMU for usage enable it.
*/
-void mmu_init(void)
+int mmu_init(void)
{
+ struct arm_memory *mem;
int i;
ttb = memalign(0x10000, 0x4000);
+ debug("ttb: 0x%p\n", ttb);
+
/* Set the ttb register */
asm volatile ("mcr p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/);
@@ -86,23 +186,36 @@ void mmu_init(void)
i = 0x3;
asm volatile ("mcr p15,0,%0,c3,c0,0" : : "r"(i) /*:*/);
- /* create a flat mapping */
- arm_create_section(0, 0, 4096, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT);
+ /* create a flat mapping using 1MiB sections */
+ create_section(0, 0, 4096, PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
+ PMD_TYPE_SECT);
vectors_init();
-}
-/*
- * enable the MMU. Should be called after mmu_init()
- */
-void mmu_enable(void)
-{
+ /*
+ * First remap sdram cached using sections.
+ * This is to speed up the generation of 2nd level page tables
+ * below
+ */
+ for_each_sdram_bank(mem)
+ create_section(mem->start, mem->start, mem->size >> 20,
+ PMD_SECT_DEF_CACHED);
+
asm volatile (
"bl __mmu_cache_on;"
:
:
: "r0", "r1", "r2", "r3", "r6", "r10", "r12", "cc", "memory"
);
+
+ /*
+ * Now that we have the MMU and caches on remap sdram again using
+ * page tables
+ */
+ for_each_sdram_bank(mem)
+ arm_mmu_remap_sdram(mem);
+
+ return 0;
}
struct outer_cache_fns outer_cache;
@@ -125,39 +238,41 @@ void mmu_disable(void)
);
}
-/*
- * For boards which need coherent memory for DMA. The idea
- * is simple: Setup a uncached section containing your SDRAM
- * and call setup_dma_coherent() with the offset between the
- * cached and the uncached section. dma_alloc_coherent() then
- * works using normal malloc but returns the corresponding
- * pointer in the uncached area.
- */
-static unsigned long dma_coherent_offset;
-
-void setup_dma_coherent(unsigned long offset)
-{
- dma_coherent_offset = offset;
-}
+#define PAGE_ALIGN(s) ((s) + PAGE_SIZE - 1) & ~(PAGE_SIZE - 1);
void *dma_alloc_coherent(size_t size)
{
- return xmemalign(4096, size) + dma_coherent_offset;
+ void *ret;
+
+ size = PAGE_ALIGN(size);
+ ret = xmemalign(4096, size);
+
+#ifdef CONFIG_MMU
+ dma_inv_range((unsigned long)ret, (unsigned long)ret + size);
+
+ remap_range(ret, size, 0);
+#endif
+
+ return ret;
}
unsigned long virt_to_phys(void *virt)
{
- return (unsigned long)virt - dma_coherent_offset;
+ return (unsigned long)virt;
}
void *phys_to_virt(unsigned long phys)
{
- return (void *)(phys + dma_coherent_offset);
+ return (void *)phys;
}
void dma_free_coherent(void *mem, size_t size)
{
- free(mem - dma_coherent_offset);
+#ifdef CONFIG_MMU
+ remap_range(mem, size, PTE_BUFFERABLE | PTE_CACHEABLE);
+#endif
+
+ free(mem);
}
void dma_clean_range(unsigned long start, unsigned long end)
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index 9ebc2cd..b1aa781 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -3,19 +3,29 @@
#include <asm/pgtable.h>
#include <malloc.h>
+#include <errno.h>
#define PMD_SECT_DEF_UNCACHED (PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT)
#define PMD_SECT_DEF_CACHED (PMD_SECT_WB | PMD_SECT_DEF_UNCACHED)
-void mmu_init(void);
-void mmu_enable(void);
+struct arm_memory;
+
+static inline void mmu_enable(void)
+{
+}
void mmu_disable(void);
-void arm_create_section(unsigned long virt, unsigned long phys, int size_m,
- unsigned int flags);
+static inline void arm_create_section(unsigned long virt, unsigned long phys, int size_m,
+ unsigned int flags)
+{
+}
-void setup_dma_coherent(unsigned long offset);
+static inline void setup_dma_coherent(unsigned long offset)
+{
+}
#ifdef CONFIG_MMU
+int mmu_init(void);
+
void *dma_alloc_coherent(size_t size);
void dma_free_coherent(void *mem, size_t size);
diff --git a/include/common.h b/include/common.h
index f3353c8..0ce4a70 100644
--- a/include/common.h
+++ b/include/common.h
@@ -221,6 +221,7 @@ int run_shell(void);
#define ULLONG_MAX (~0ULL)
#define PAGE_SIZE 4096
+#define PAGE_SHIFT 12
int memory_display(char *addr, ulong offs, ulong nbytes, int size);
--
1.7.5.4
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 7/7] ARM boards: remove now unnecessary mmu calls
2011-07-29 9:43 rework MMU support Sascha Hauer
` (5 preceding siblings ...)
2011-07-29 9:43 ` [PATCH 6/7] ARM: rework MMU support Sascha Hauer
@ 2011-07-29 9:43 ` Sascha Hauer
2011-07-29 11:12 ` Jean-Christophe PLAGNIOL-VILLARD
6 siblings, 1 reply; 10+ messages in thread
From: Sascha Hauer @ 2011-07-29 9:43 UTC (permalink / raw)
To: barebox
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boards/chumby_falconwing/falconwing.c | 8 ---
arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c | 8 ---
arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c | 8 ---
arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c | 13 +-----
arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c | 14 -----
arch/arm/boards/freescale-mx51-pdk/board.c | 8 ---
arch/arm/boards/guf-cupid/board.c | 12 +----
arch/arm/boards/guf-neso/board.c | 8 ---
arch/arm/boards/karo-tx25/board.c | 10 ----
arch/arm/boards/karo-tx28/tx28.c | 8 ---
arch/arm/boards/panda/board.c | 6 --
arch/arm/boards/pcm037/pcm037.c | 13 +-----
arch/arm/boards/pcm038/pcm038.c | 8 ---
arch/arm/boards/pcm043/pcm043.c | 13 +-----
arch/arm/boards/pcm049/board.c | 7 ---
arch/arm/boards/phycard-i.MX27/pca100.c | 8 ---
arch/arm/boards/scb9328/env/config | 56 +++++++++++++++++++++
17 files changed, 60 insertions(+), 148 deletions(-)
create mode 100644 arch/arm/boards/scb9328/env/config
diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c
index 0c9c339..31efe5e 100644
--- a/arch/arm/boards/chumby_falconwing/falconwing.c
+++ b/arch/arm/boards/chumby_falconwing/falconwing.c
@@ -282,16 +282,8 @@ static int falconwing_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x40000000, 0x40000000, 64, PMD_SECT_DEF_CACHED);
- arm_create_section(0x50000000, 0x40000000, 64, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(falconwing_mmu_init);
diff --git a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
index 5a21636..f4a81eb 100644
--- a/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
+++ b/arch/arm/boards/eukrea_cpuimx25/eukrea_cpuimx25.c
@@ -170,16 +170,8 @@ static int eukrea_cpuimx25_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(eukrea_cpuimx25_mmu_init);
diff --git a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
index aea2d20..b2b64a3 100644
--- a/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
+++ b/arch/arm/boards/eukrea_cpuimx27/eukrea_cpuimx27.c
@@ -116,16 +116,8 @@ static int eukrea_cpuimx27_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(eukrea_cpuimx27_mmu_init);
diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
index d1b9da5..1c79cc9 100644
--- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
+++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c
@@ -139,20 +139,9 @@ static int eukrea_cpuimx35_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
-
- arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-
-#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
-#endif
-#endif
+
return 0;
}
postconsole_initcall(eukrea_cpuimx35_mmu_init);
diff --git a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
index 4980a08..5d6094b 100644
--- a/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
+++ b/arch/arm/boards/eukrea_cpuimx51/eukrea_cpuimx51.c
@@ -101,22 +101,8 @@ static int eukrea_cpuimx51_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x90000000, 0x90000000, 256, PMD_SECT_DEF_CACHED);
- arm_create_section(0xa0000000, 0x90000000, 256, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
-#if TEXT_BASE & (0x100000 - 1)
-#warning cannot create vector section. Adjust TEXT_BASE to a 1M boundary
-#else
- arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED);
-#endif
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(eukrea_cpuimx51_mmu_init);
diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c
index b7e9540..4caace4 100644
--- a/arch/arm/boards/freescale-mx51-pdk/board.c
+++ b/arch/arm/boards/freescale-mx51-pdk/board.c
@@ -81,16 +81,8 @@ static int babbage_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x90000000, 0x90000000, 512, PMD_SECT_DEF_CACHED);
- arm_create_section(0xb0000000, 0x90000000, 512, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x20000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(babbage_mmu_init);
diff --git a/arch/arm/boards/guf-cupid/board.c b/arch/arm/boards/guf-cupid/board.c
index 8ee6376..b83451e 100644
--- a/arch/arm/boards/guf-cupid/board.c
+++ b/arch/arm/boards/guf-cupid/board.c
@@ -104,20 +104,10 @@ static int cupid_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-
-#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
-#endif
-#endif
+
return 0;
}
postconsole_initcall(cupid_mmu_init);
diff --git a/arch/arm/boards/guf-neso/board.c b/arch/arm/boards/guf-neso/board.c
index a595abd..18676a2 100644
--- a/arch/arm/boards/guf-neso/board.c
+++ b/arch/arm/boards/guf-neso/board.c
@@ -144,16 +144,8 @@ static int neso_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(neso_mmu_init);
diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c
index 7b3cd7e..1b597e3 100644
--- a/arch/arm/boards/karo-tx25/board.c
+++ b/arch/arm/boards/karo-tx25/board.c
@@ -64,18 +64,8 @@ static int tx25_mmu_init(void)
add_mem_device("ram0", 0x78000000, 128 * 1024,
IORESOURCE_MEM_WRITEABLE);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x80000000, 0x80000000, 32, PMD_SECT_DEF_CACHED);
- arm_create_section(0x82000000, 0x80000000, 32, PMD_SECT_DEF_UNCACHED);
- arm_create_section(0x90000000, 0x90000000, 32, PMD_SECT_DEF_CACHED);
- arm_create_section(0x92000000, 0x90000000, 32, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x02000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(tx25_mmu_init);
diff --git a/arch/arm/boards/karo-tx28/tx28.c b/arch/arm/boards/karo-tx28/tx28.c
index bdec51d..8bb46b8 100644
--- a/arch/arm/boards/karo-tx28/tx28.c
+++ b/arch/arm/boards/karo-tx28/tx28.c
@@ -78,16 +78,8 @@ static int tx28_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x40000000, 0x40000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0x50000000, 0x40000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(tx28_mmu_init);
diff --git a/arch/arm/boards/panda/board.c b/arch/arm/boards/panda/board.c
index b11da2e..6752ef0 100644
--- a/arch/arm/boards/panda/board.c
+++ b/arch/arm/boards/panda/board.c
@@ -54,14 +54,8 @@ static int panda_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x80000000, 0x80000000, 256, PMD_SECT_DEF_CACHED);
- arm_create_section(0x90000000, 0x80000000, 256, PMD_SECT_DEF_UNCACHED);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(panda_mmu_init);
diff --git a/arch/arm/boards/pcm037/pcm037.c b/arch/arm/boards/pcm037/pcm037.c
index acbfe54..4e42775 100644
--- a/arch/arm/boards/pcm037/pcm037.c
+++ b/arch/arm/boards/pcm037/pcm037.c
@@ -159,20 +159,9 @@ static int pcm037_mmu_init(void)
armlinux_add_dram(sdram_dev);
#endif
-#ifdef CONFIG_MMU
mmu_init();
-
- arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-
-#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
-#endif
-#endif
+
return 0;
}
postconsole_initcall(pcm037_mmu_init);
diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c
index 4644550..848df55 100644
--- a/arch/arm/boards/pcm038/pcm038.c
+++ b/arch/arm/boards/pcm038/pcm038.c
@@ -137,16 +137,8 @@ static int pcm038_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(pcm038_mmu_init);
diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
index d1fede7..c6b6ef5 100644
--- a/arch/arm/boards/pcm043/pcm043.c
+++ b/arch/arm/boards/pcm043/pcm043.c
@@ -107,20 +107,9 @@ static int pcm043_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
-
- arm_create_section(0x80000000, 0x80000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0x90000000, 0x80000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-
-#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
-#endif
-#endif
+
return 0;
}
postconsole_initcall(pcm043_mmu_init);
diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index e691f59..62eaa3d 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -65,15 +65,8 @@ static int pcm049_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0x80000000, 0x80000000, 256, PMD_SECT_DEF_CACHED);
- /* warning: This shadows the second half of our ram */
- arm_create_section(0x90000000, 0x80000000, 256, PMD_SECT_DEF_UNCACHED);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(pcm049_mmu_init);
diff --git a/arch/arm/boards/phycard-i.MX27/pca100.c b/arch/arm/boards/phycard-i.MX27/pca100.c
index 6d3e2e3..b66e43e 100644
--- a/arch/arm/boards/phycard-i.MX27/pca100.c
+++ b/arch/arm/boards/phycard-i.MX27/pca100.c
@@ -77,16 +77,8 @@ static int pca100_mmu_init(void)
IORESOURCE_MEM_WRITEABLE);
armlinux_add_dram(sdram_dev);
-#ifdef CONFIG_MMU
mmu_init();
- arm_create_section(0xa0000000, 0xa0000000, 128, PMD_SECT_DEF_CACHED);
- arm_create_section(0xb0000000, 0xa0000000, 128, PMD_SECT_DEF_UNCACHED);
-
- setup_dma_coherent(0x10000000);
-
- mmu_enable();
-#endif
return 0;
}
postconsole_initcall(pca100_mmu_init);
diff --git a/arch/arm/boards/scb9328/env/config b/arch/arm/boards/scb9328/env/config
new file mode 100644
index 0000000..d0f3f25
--- /dev/null
+++ b/arch/arm/boards/scb9328/env/config
@@ -0,0 +1,56 @@
+#!/bin/sh
+
+machine=scb9328
+eth0.serverip=
+user=
+
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'none' if you want to skip kernel ip autoconfiguration
+ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
+# can be either 'net', 'nor' or 'nand'
+kernel_loc=net
+# can be either 'net', 'nor', 'nand' or 'initrd'
+rootfs_loc=net
+
+# can be either 'jffs2' or 'ubifs'
+rootfs_type=ubifs
+rootfsimage=root-$machine.$rootfs_type
+
+# The image type of the kernel. Can be uimage, zimage, raw, or raw_lzo
+kernelimage_type=zimage
+kernelimage=zImage-$machine
+#kernelimage_type=uimage
+#kernelimage=uImage-$machine
+#kernelimage_type=raw
+#kernelimage=Image-$machine
+#kernelimage_type=raw_lzo
+#kernelimage=Image-$machine.lzo
+
+if [ -n $user ]; then
+ kernelimage="$user"-"$kernelimage"
+ nfsroot="$eth0.serverip:/home/$user/nfsroot/$machine"
+ rootfsimage="$user"-"$rootfsimage"
+else
+ nfsroot="$eth0.serverip:/path/to/nfs/root"
+fi
+
+autoboot_timeout=3
+
+bootargs="console=ttymxc0,115200"
+
+nor_parts="256k(barebox)ro,128k(bareboxenv),2M(kernel),-(root)"
+rootfs_mtdblock_nor=3
+
+nand_parts="256k(barebox)ro,128k(bareboxenv),2M(kernel),-(root)"
+rootfs_mtdblock_nand=7
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m "
+
--
1.7.5.4
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