[PATCH] omap3 towards thumb2 support

[PATCH] omap3 towards thumb2 support

[Sascha Hauer]

The following patches rework the omap3 support to be thumb2 safe.
The initialisation order is changed so that more stuff can be
done in a regular C environment rather than in lowlevel time.

Together with git://git.pengutronix.de/git/barebox.git work/thumb2
the beagle board Xload config now fits into 34k.

The following changes since commit be07ecb5c50e007d71f75145938c66bd04960b43:

  omap343xdsp: move to arch/arm/boards/omap343xdsp (2012-01-16 10:28:00 +0100)

are available in the git repository at:
  git://git.pengutronix.de/git/barebox.git work/omap3

Sascha Hauer (10):
      ARM omap3: remove OMAP3_COPY_CLOCK_SRAM
      ARM omap3 beagle xload: Move stack to SRAM
      ARM omap3: move board_init to pure_initcall
      ARM omap3: call a_init from board code
      ARM omap3 clock: move pll tables to C code
      ARM omap3: remove vector setup from lowlevel code
      ARM omap3: reimplement setup_auxcr in pure asm
      ARM cache-armv7: Add additional ISB
      mtd omap nand: fix driver without CONFIG_PARAMETER
      ARM omap3: make omap3_core.S thumb safe

 arch/arm/boards/beagle/board.c                   |    8 +-
 arch/arm/boards/omap343xdsp/board.c              |    8 +-
 arch/arm/boards/omap3evm/board.c                 |    8 +-
 arch/arm/configs/omap3530_beagle_xload_defconfig |    4 +-
 arch/arm/cpu/cache-armv7.S                       |    1 +
 arch/arm/mach-omap/Kconfig                       |   11 -
 arch/arm/mach-omap/Makefile                      |    5 +-
 arch/arm/mach-omap/auxcr.S                       |   16 +
 arch/arm/mach-omap/include/mach/board.h          |   35 --
 arch/arm/mach-omap/include/mach/omap3-clock.h    |   10 -
 arch/arm/mach-omap/include/mach/silicon.h        |    4 +-
 arch/arm/mach-omap/omap3_clock.c                 |  212 ++++++-----
 arch/arm/mach-omap/omap3_clock_core.S            |  426 ----------------------
 arch/arm/mach-omap/omap3_core.S                  |   64 +---
 arch/arm/mach-omap/omap3_generic.c               |   22 +-
 arch/arm/mach-omap/omap3_platform.S              |   65 ----
 drivers/mtd/nand/nand_omap_gpmc.c                |    1 +
 17 files changed, 171 insertions(+), 729 deletions(-)
 create mode 100644 arch/arm/mach-omap/auxcr.S
 delete mode 100644 arch/arm/mach-omap/include/mach/board.h
 delete mode 100644 arch/arm/mach-omap/omap3_clock_core.S
 delete mode 100644 arch/arm/mach-omap/omap3_platform.S

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[PATCH 01/10] ARM omap3: remove OMAP3_COPY_CLOCK_SRAM

[Sascha Hauer]

The X-loader startup relocates to SRAM anyway, so there
is no need to be runnable from flash for the clock code.
This config is disabled in all defconfigs anyway, so remove
it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-omap/Kconfig            |    8 --
 arch/arm/mach-omap/omap3_clock.c      |   89 +------------------
 arch/arm/mach-omap/omap3_clock_core.S |  161 ---------------------------------
 arch/arm/mach-omap/omap3_core.S       |    8 --
 4 files changed, 1 insertions(+), 265 deletions(-)

diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index c370827..baffdff 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -77,14 +77,6 @@ config OMAP3_CLOCK_CONFIG
 	help
 	  Say Y here if you like to have OMAP3 Clock configuration done.
 
-config OMAP3_COPY_CLOCK_SRAM
-	prompt "SRAM copy of Clock code"
-	bool
-	depends on OMAP3_CLOCK_CONFIG
-	default y
-	help
-	  Say Y here if you like to have initial OMAP3 Clock configuration done from SRAM.
-
 config OMAP_GPMC
 	prompt "Support for GPMC configuration"
 	bool
diff --git a/arch/arm/mach-omap/omap3_clock.c b/arch/arm/mach-omap/omap3_clock.c
index 412d7b7..391aa40 100644
--- a/arch/arm/mach-omap/omap3_clock.c
+++ b/arch/arm/mach-omap/omap3_clock.c
@@ -47,10 +47,6 @@
 #include <mach/syslib.h>
 
 /* Following functions are exported from omap3_clock_core.S */
-#ifdef CONFIG_OMAP3_COPY_CLOCK_SRAM
-/* A.K.A go_to_speed */
-static void (*f_lock_pll) (u32, u32, u32, u32);
-#endif
 /* Helper functions */
 static u32 get_osc_clk_speed(void);
 static void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel);
@@ -156,9 +152,6 @@ static void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
 static void init_core_dpll_34x(u32 cpu_rev, u32 clk_sel)
 {
 	struct dpll_param *dp = get_core_dpll_param_34x(cpu_rev);
-#ifdef CONFIG_OMAP3_COPY_CLOCK_SRAM
-	int p0, p1, p2, p3;
-#endif
 
 	dp += clk_sel;
 
@@ -202,46 +195,8 @@ static void init_core_dpll_34x(u32 cpu_rev, u32 clk_sel)
 		sr32(CM_REG(CLKEN_PLL), 0, 3, PLL_LOCK);
 		wait_on_value((0x1 << 0), 1, CM_REG(IDLEST_CKGEN), LDELAY);
 	} else if (running_in_flash()) {
-#ifdef CONFIG_OMAP3_COPY_CLOCK_SRAM
-		f_lock_pll = (void *)(OMAP_SRAM_INTVECT +
-					OMAP_SRAM_INTVECT_COPYSIZE);
-
-		/*
-		 * Jump to small relocated code area in SRAM.
-		 */
-		p0 = readl(CM_REG(CLKEN_PLL));
-		sr32((u32) &p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
-
-		/* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
-		sr32((u32) &p0, 4, 4, dp->fsel);
-
-		p1 = readl(CM_REG(CLKSEL1_PLL));
-
-		/* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
-		sr32((u32) &p1, 27, 2, dp->m2);
-
-		/* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
-		sr32((u32) &p1, 16, 11, dp->m);
-
-		/* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
-		sr32((u32) &p1, 8, 7, dp->n);
-
-		/* Set source CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
-		sr32((u32) &p1, 6, 1, 0);
-
-		p2 = readl(CM_REG(CLKSEL_CORE));
-		sr32((u32) &p2, 8, 4, CORE_SSI_DIV);
-		sr32((u32) &p2, 4, 2, CORE_FUSB_DIV);
-		sr32((u32) &p2, 2, 2, CORE_L4_DIV);
-		sr32((u32) &p2, 0, 2, CORE_L3_DIV);
-
-		p3 = CM_REG(IDLEST_CKGEN);
-
-		(*f_lock_pll) (p0, p1, p2, p3);
-#else
 		/***Oopps.. Wrong .config!! *****/
 		hang();
-#endif
 	}
 }
 
@@ -370,9 +325,6 @@ static void init_iva_dpll_34x(u32 cpu_rev, u32 clk_sel)
 static void init_core_dpll_36x(u32 cpu_rev, u32 clk_sel)
 {
 	struct dpll_param *dp = get_core_dpll_param_36x(cpu_rev);
-#ifdef CONFIG_OMAP3_COPY_CLOCK_SRAM
-	int p0, p1, p2, p3;
-#endif
 
 	dp += clk_sel;
 
@@ -409,46 +361,8 @@ static void init_core_dpll_36x(u32 cpu_rev, u32 clk_sel)
 		sr32(CM_REG(CLKEN_PLL), 0, 3, PLL_LOCK);
 		wait_on_value((0x1 << 0), 1, CM_REG(IDLEST_CKGEN), LDELAY);
 	} else if (running_in_flash()) {
-#ifdef CONFIG_OMAP3_COPY_CLOCK_SRAM
-		f_lock_pll = (void *)(OMAP_SRAM_INTVECT +
-					OMAP_SRAM_INTVECT_COPYSIZE);
-
-		/*
-		 * Jump to small relocated code area in SRAM.
-		 */
-		p0 = readl(CM_REG(CLKEN_PLL));
-		sr32((u32) &p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
-
-		/* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
-		sr32((u32) &p0, 4, 4, dp->fsel);
-
-		p1 = readl(CM_REG(CLKSEL1_PLL));
-
-		/* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
-		sr32((u32) &p1, 27, 5, dp->m2);
-
-		/* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
-		sr32((u32) &p1, 16, 11, dp->m);
-
-		/* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
-		sr32((u32) &p1, 8, 7, dp->n);
-
-		/* Set source CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
-		sr32((u32) &p1, 6, 1, 0);
-
-		p2 = readl(CM_REG(CLKSEL_CORE));
-		sr32((u32) &p2, 8, 4, CORE_SSI_DIV);
-		sr32((u32) &p2, 4, 2, CORE_FUSB_DIV);
-		sr32((u32) &p2, 2, 2, CORE_L4_DIV);
-		sr32((u32) &p2, 0, 2, CORE_L3_DIV);
-
-		p3 = CM_REG(IDLEST_CKGEN);
-
-		(*f_lock_pll) (p0, p1, p2, p3);
-#else
 		/***Oopps.. Wrong .config!! *****/
 		hang();
-#endif
 	}
 }
 
@@ -557,8 +471,7 @@ static void init_iva_dpll_36x(u32 cpu_rev, u32 clk_sel)
 /**
  * @brief Inits clocks for PRCM
  *
- * This is called from SRAM, or Flash (using temp SRAM stack).
- * if CONFIG_OMAP3_COPY_CLOCK_SRAM is defined, @ref go_to_speed
+ * This is called from SRAM
  *
  * @return void
  */
diff --git a/arch/arm/mach-omap/omap3_clock_core.S b/arch/arm/mach-omap/omap3_clock_core.S
index c8d04bb..b31ed80 100644
--- a/arch/arm/mach-omap/omap3_clock_core.S
+++ b/arch/arm/mach-omap/omap3_clock_core.S
@@ -41,167 +41,6 @@
 #include <mach/clocks.h>
 #include <mach/gpmc.h>
 
-#ifdef CONFIG_OMAP3_COPY_CLOCK_SRAM
-/**
- * @fn void cpy_clk_code(u32 R1)
- *
- * @brief cpy_clk_code: relocates clock code into SRAM where its safer to
- * execute
- *
- * @param[in] R1 = SRAM destination address.
- *
- * @return void
- */
-.global cpy_clk_code
- cpy_clk_code:
-        /* Copy DPLL code into SRAM */
-        adr     r0, go_to_speed         /* get addr of clock setting code */
-        mov     r2, #384                /* r2 size to copy (div by 32 bytes) */
-        mov     r1, r1                  /* r1 <- dest address (passed in) */
-        add     r2, r2, r0              /* r2 <- source end address */
-next2:
-        ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
-        stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
-        cmp     r0, r2                  /* until source end address [r2]    */
-        bne     next2
-	mov	pc, lr                  /* back to caller */
-
-/**
- * @fn void go_to_speed(u32 R0, u32 R1, u32 R3)
- *
- * @brief go_to_speed: Function which configures the clocks
- *  Moves to bypass, -Commits clock dividers, -puts dpll at speed
- *               -executed from SRAM.
- * @warning Note: If core unlocks/relocks and SDRAM is running fast already
- *        it gets confused.  A reset of the controller gets it back. Taking
- *        away its L3 when its not in self refresh seems bad for it.
- *        Normally, this code runs from flash before SDR is init so that
- *        should be ok.
- *
- * @param[in] R1 = SRAM destination address.
- * @param[in] R0 = CM_CLKEN_PLL-bypass value
- * @param[in] R1 = CM_CLKSEL1_PLL-m, n, and divider values
- * @param[in] R2 = CM_CLKSEL_CORE-divider values
- * @param[in] R3 = CM_IDLEST_CKGEN - addr dpll lock wait
- *
- * @return void
- */
-.global go_to_speed
- go_to_speed:
-        stmfd sp!, {r4-r6}
-
-        /* move into fast relock bypass */
-        ldr     r4, pll_ctl_add
-        str     r0, [r4]
-wait1:
-        ldr     r5, [r3]       /* get status */
-        and     r5, r5, #0x1   /* isolate core status */
-        cmp     r5, #0x1       /* still locked? */
-        beq     wait1          /* if lock, loop */
-
-	/* set new dpll dividers _after_ in bypass */
-	ldr     r5, pll_div_add1
-        str     r1, [r5]          /* set m, n, m2 */
-        ldr     r5, pll_div_add2
-        str     r2, [r5]          /* set l3/l4/.. dividers*/
-        ldr     r5, pll_div_add3  /* wkup */
-        ldr     r2, pll_div_val3  /* rsm val */
-        str     r2, [r5]
-        ldr     r5, pll_div_add4  /* gfx */
-        ldr     r2, pll_div_val4
-        str     r2, [r5]
-        ldr     r5, pll_div_add5  /* emu */
-        ldr     r2, pll_div_val5
-        str     r2, [r5]
-
-#if 0
-        /* FIXME: now prepare GPMC (flash) for new dpll speed
-	 * For NOR/NAND/OneNAND boot ->make this as Kconfig?
-	 */
-	/* flash needs to be stable when we jump back to it */
-        ldr     r6, flash_cfg_offset
-        ldr     r5, flash_cfg_addr /* CFG1 */
-        ldr     r2, flash_cfg1_val
-        str     r2, [r5]
-        add	r5, r5, r6 /* CFG2 */
-        ldr     r2, flash_cfg2_val
-        str     r2, [r5]
-        add	r5, r5, r6 /* CFG3 */
-        ldr     r2, flash_cfg3_val
-        str     r2, [r5]
-        add	r5, r5, r6 /* CFG4 */
-        ldr     r2, flash_cfg4_val
-        str     r2, [r5]
-        add	r5, r5, r6 /* CFG5 */
-        ldr     r2, flash_cfg5_val
-        str     r2, [r5]
-        add	r5, r5, r6 /* CFG6 */
-        ldr     r2, flash_cfg6_val
-        str     r2, [r5]
-#endif /* Debug */
-
-        /* lock DPLL3 and wait a bit */
-        orr     r0, r0, #0x7   /* set up for lock mode */
-        str     r0, [r4]       /* lock */
-        nop                    /* ARM slow at this point working at sys_clk */
-        nop
-        nop
-        nop
-wait2:
-        ldr     r5, [r3]       /* get status */
-        and     r5, r5, #0x1   /* isolate core status */
-        cmp     r5, #0x1       /* still locked? */
-        bne     wait2          /* if lock, loop */
-        nop
-        nop
-        nop
-        nop
-        ldmfd sp!, {r4-r6}
-        mov     pc, lr           /* back to caller, locked */
-
-_go_to_speed: .word go_to_speed
-
-/* these constants need to be close for PIC code */
-/* FIXME: The Nor has to be in the Flash Base CS0 for this condition to happen*/
-#if 0
-flash_cfg_addr:
-    .word GPMC_REG(CONFIG1_0)
-flash_cfg_offset:
-    .word GPMC_REG(CONFIG2_0) - GPMC_REG(CONFIG1_0)
-flash_cfg1_val:
-    .word  CONFIG_VALUE_GPMC_CONFIG1
-flash_cfg2_val:
-    .word  CONFIG_VALUE_GPMC_CONFIG2
-flash_cfg3_val:
-    .word  CONFIG_VALUE_GPMC_CONFIG3
-flash_cfg4_val:
-    .word  CONFIG_VALUE_GPMC_CONFIG4
-flash_cfg5_val:
-    .word  CONFIG_VALUE_GPMC_CONFIG5
-flash_cfg6_val:
-    .word  CONFIG_VALUE_GPMC_CONFIG6
-#endif
-pll_ctl_add:
-    .word CM_CLKEN_PLL
-pll_div_add1:
-    .word CM_CLKSEL1_PLL
-pll_div_add2:
-    .word CM_CLKSEL_CORE
-pll_div_add3:
-    .word CM_CLKSEL_WKUP
-pll_div_val3:
-    .word (WKUP_RSM << 1)
-pll_div_add4:
-    .word CM_CLKSEL_GFX
-pll_div_val4:
-    .word GFX_DIV_34X
-pll_div_add5:
-    .word CM_CLKSEL1_EMU
-pll_div_val5:
-    .word CLSEL1_EMU_VAL
-
-#endif /* OMAP3_CLOCK_COPY_SRAM */
-
 	/* the literal pools origin */
 	.ltorg
 
diff --git a/arch/arm/mach-omap/omap3_core.S b/arch/arm/mach-omap/omap3_core.S
index ee4c133..90c4243 100644
--- a/arch/arm/mach-omap/omap3_core.S
+++ b/arch/arm/mach-omap/omap3_core.S
@@ -13,7 +13,6 @@
  * @li Call architecture initialization function a_init
  *
  * arch_init_lowlevel is enabled if CONFIG_ARCH_HAS_LOWLEVEL_INIT is defined
- * cpy_clk_code is called if CONFIG_OMAP3_COPY_CLOCK_SRAM is defined
  */
 /*
  * (C) Copyright 2006-2008
@@ -61,13 +60,6 @@ next:
 	cmp	r0, r2			/* until source end address [r2]    */
 	ble	next			/* loop until equal */
 
-#ifdef CONFIG_OMAP3_COPY_CLOCK_SRAM
-	/* No need to copy/exec the clock code - DPLL adjust already done
-	 * in Perip/NAND/oneNAND Boot.
-	 * Put dpll adjust code behind vectors. r1 has address to copy to
-	 */
-	bl	cpy_clk_code
-#endif
 	ldr	r1, SRAM_INTVECT	/* build vect addr */
 	/* Read the interrupt vector base address */
 	mrc p15, #0, r0, c12, c0, #0
-- 
1.7.8.3


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[PATCH 02/10] ARM omap3 beagle xload: Move stack to SRAM

[Sascha Hauer]

Setting up the clocks does not work when the stack is in SDRAM.
Moving the stack to SRAM allows us to do the lowlevel clock setup
later.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/configs/omap3530_beagle_xload_defconfig |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/configs/omap3530_beagle_xload_defconfig b/arch/arm/configs/omap3530_beagle_xload_defconfig
index 1069670..d951b1c 100644
--- a/arch/arm/configs/omap3530_beagle_xload_defconfig
+++ b/arch/arm/configs/omap3530_beagle_xload_defconfig
@@ -1,5 +1,4 @@
 CONFIG_ARCH_OMAP=y
-# CONFIG_OMAP3_COPY_CLOCK_SRAM is not set
 CONFIG_OMAP_BUILD_IFT=y
 CONFIG_MACH_BEAGLE=y
 CONFIG_AEABI=y
@@ -7,7 +6,8 @@ CONFIG_AEABI=y
 # CONFIG_ARM_EXCEPTIONS is not set
 CONFIG_TEXT_BASE=0x40200000
 CONFIG_MEMORY_LAYOUT_FIXED=y
-CONFIG_STACK_BASE=0x87BF7F10
+CONFIG_STACK_BASE=0x4020F000
+CONFIG_STACK_SIZE=0xc00
 CONFIG_MALLOC_BASE=0x87BFFF10
 CONFIG_MALLOC_DUMMY=y
 CONFIG_PROMPT="X-load Beagle>"
-- 
1.7.8.3


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[PATCH 03/10] ARM omap3: move board_init to pure_initcall

[Sascha Hauer]

board_init initializes the mux and sdram. For both there is no
need to configure this so early. Move the code to a pure_initcall
and remove the surrounding unneeded code.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/boards/beagle/board.c          |    6 ++-
 arch/arm/boards/omap343xdsp/board.c     |    5 ++-
 arch/arm/boards/omap3evm/board.c        |    6 ++-
 arch/arm/mach-omap/Kconfig              |    3 -
 arch/arm/mach-omap/Makefile             |    1 -
 arch/arm/mach-omap/include/mach/board.h |   35 ----------------
 arch/arm/mach-omap/omap3_platform.S     |   65 -------------------------------
 7 files changed, 13 insertions(+), 108 deletions(-)
 delete mode 100644 arch/arm/mach-omap/include/mach/board.h
 delete mode 100644 arch/arm/mach-omap/omap3_platform.S

diff --git a/arch/arm/boards/beagle/board.c b/arch/arm/boards/beagle/board.c
index 0be3ff2..bd663ad 100644
--- a/arch/arm/boards/beagle/board.c
+++ b/arch/arm/boards/beagle/board.c
@@ -74,7 +74,6 @@
 #include <linux/err.h>
 #include <usb/ehci.h>
 #include <mach/xload.h>
-#include <mach/board.h>
 
 /******************** Board Boot Time *******************/
 
@@ -221,7 +220,7 @@ static void mux_config(void)
  *
  * @return void
  */
-void omap3_board_init(void)
+static int beagle_board_init(void)
 {
 	int in_sdram = running_in_sdram();
 
@@ -229,7 +228,10 @@ void omap3_board_init(void)
 	/* Dont reconfigure SDRAM while running in SDRAM! */
 	if (!in_sdram)
 		sdrc_init();
+
+	return 0;
 }
+pure_initcall(beagle_board_init);
 
 /******************** Board Run Time *******************/
 
diff --git a/arch/arm/boards/omap343xdsp/board.c b/arch/arm/boards/omap343xdsp/board.c
index e9fc36d..2cbb987 100644
--- a/arch/arm/boards/omap343xdsp/board.c
+++ b/arch/arm/boards/omap343xdsp/board.c
@@ -77,13 +77,16 @@ static void mux_config(void);
  *
  * @return void
  */
-void omap3_board_init(void)
+static int sdp343x_board_init(void)
 {
 	int in_sdram = running_in_sdram();
 	mux_config();
 	if (!in_sdram)
 		sdrc_init();
+
+	return 0;
 }
+pure_initcall(sdp343x_board_init);
 
 /**
  * @brief Do the SDRC initialization for 128Meg Infenion DDR for CS0
diff --git a/arch/arm/boards/omap3evm/board.c b/arch/arm/boards/omap3evm/board.c
index e286209..ec2ed2c 100644
--- a/arch/arm/boards/omap3evm/board.c
+++ b/arch/arm/boards/omap3evm/board.c
@@ -196,15 +196,19 @@ static void mux_config(void)
  *
  * @return void
  */
-void omap3_board_init(void)
+static int omap3_evm_board_init(void)
 {
 	int in_sdram = running_in_sdram();
 
 	mux_config();
+
 	/* Dont reconfigure SDRAM while running in SDRAM! */
 	if (!in_sdram)
 		sdrc_init();
+
+	return 0;
 }
+pure_initcall(omap3_evm_board_init);
 
 /*
  * Run-time initialization(s)
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index baffdff..970c899 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -108,7 +108,6 @@ choice
 
 config MACH_OMAP343xSDP
 	bool "Texas Instrument's SDP343x"
-	select MACH_HAS_LOWLEVEL_INIT
 	select OMAP_CLOCK_ALL
 	select HAS_OMAP_NAND
 	depends on ARCH_OMAP3
@@ -117,7 +116,6 @@ config MACH_OMAP343xSDP
 
 config MACH_BEAGLE
 	bool "Texas Instrument's Beagle Board"
-	select MACH_HAS_LOWLEVEL_INIT
 	select OMAP_CLOCK_ALL
 	select HAVE_NOSHELL
 	select HAS_OMAP_NAND
@@ -127,7 +125,6 @@ config MACH_BEAGLE
 
 config MACH_OMAP3EVM
 	bool "Texas Instrument's OMAP3 EVM"
-	select MACH_HAS_LOWLEVEL_INIT
 	select OMAP_CLOCK_ALL
 	select HAVE_NOSHELL
 	select HAS_OMAP_NAND
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index f8d9abd..9bd2b62 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -20,7 +20,6 @@
 # MA 02111-1307 USA
 #
 obj-$(CONFIG_ARCH_OMAP) += syslib.o
-obj-$(CONFIG_OMAP3_LOWLEVEL_INIT) += omap3_platform.o
 obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o
 obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o
 obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
diff --git a/arch/arm/mach-omap/include/mach/board.h b/arch/arm/mach-omap/include/mach/board.h
deleted file mode 100644
index 2216bb8..0000000
--- a/arch/arm/mach-omap/include/mach/board.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/**
- * @file
- * @brief exported generic APIs which various board files implement
- *
- * FileName: arch/arm/boards/omap/board.h
- *
- * This file will not contain any board specific implementations.
- */
-/*
- * (C) Copyright 2008
- * Texas Instruments, <www.ti.com>
- * Raghavendra KH <r-khandenahally@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#ifndef __BOARD_OMAP_H_
-#define __BOARD_OMAP_H_
-
-/** Generic Board initialization called from platform.S */
-void omap3_board_init(void);
-
-#endif         /* __BOARD_OMAP_H_ */
diff --git a/arch/arm/mach-omap/omap3_platform.S b/arch/arm/mach-omap/omap3_platform.S
deleted file mode 100644
index 2b8b51b..0000000
--- a/arch/arm/mach-omap/omap3_platform.S
+++ /dev/null
@@ -1,65 +0,0 @@
-/**
- * @file
- * @brief Wrapper to call board level initialization routine
- *
- * FileName: arch/arm/boards/omap/platform.S
- *
- * board_init_lowlevel is defined here. This calls board_init which
- * is linked to the binary - the board_init only has a SRAM stack.
- * so it needs to be careful about the usage of global variables
- * and the likes. Enabled only if CONFIG_MACH_DO_LOWLEVEL_INIT is
- * defined
- */
-/*
- * (C) Copyright 2006-2008
- * Texas Instruments, <www.ti.com>
- * Nishanth Menon <x0nishan@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <mach/silicon.h>
-
-#ifdef CONFIG_MACH_DO_LOWLEVEL_INIT
-/**
- * @fn void board_init_lowlevel(void)
- *
- * @brief This provides a assembly wrapper setting up SRAM before calling
- * board_init
- *
- * @return void
- */
-.globl board_init_lowlevel
-board_init_lowlevel:
-	/* Setup a temporary stack so that we can call C functions
-	 * Yes. this might have been already done by arch code.
-	 * No harm in being a bit redundant to avoid future complications
-	 */
-	ldr	sp,	SRAM_STACK
-        str     ip,	[sp]    /* stash old link register */
-        str     lr,	[sp]    /* stash current link register */
-	mov	ip,	lr	/* save link reg across call */
-	/* Do the pin muxes, sdram init etc..board-xxx.c */
-	bl	omap3_board_init
-        ldr     lr,	[sp]    /* restore current link register */
-        ldr     ip,	[sp]    /* restore save ip */
-	/* back to arch calling code */
-	mov	pc,	lr
-SRAM_STACK:
-	.word	OMAP_SRAM_STACK
-
-#endif /* CONFIG_MACH_DO_LOWLEVEL_INIT */
-- 
1.7.8.3


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[PATCH 04/10] ARM omap3: call a_init from board code

[Sascha Hauer]

There is no need to call a_init before relocation, so rename
the function to omap3_core_init and call it from board code.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/boards/beagle/board.c            |    2 ++
 arch/arm/boards/omap343xdsp/board.c       |    3 +++
 arch/arm/boards/omap3evm/board.c          |    2 ++
 arch/arm/mach-omap/include/mach/silicon.h |    4 +---
 arch/arm/mach-omap/omap3_core.S           |    9 ---------
 arch/arm/mach-omap/omap3_generic.c        |    2 +-
 6 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boards/beagle/board.c b/arch/arm/boards/beagle/board.c
index bd663ad..faeaf8e 100644
--- a/arch/arm/boards/beagle/board.c
+++ b/arch/arm/boards/beagle/board.c
@@ -224,6 +224,8 @@ static int beagle_board_init(void)
 {
 	int in_sdram = running_in_sdram();
 
+	omap3_core_init();
+
 	mux_config();
 	/* Dont reconfigure SDRAM while running in SDRAM! */
 	if (!in_sdram)
diff --git a/arch/arm/boards/omap343xdsp/board.c b/arch/arm/boards/omap343xdsp/board.c
index 2cbb987..4ad6f13 100644
--- a/arch/arm/boards/omap343xdsp/board.c
+++ b/arch/arm/boards/omap343xdsp/board.c
@@ -80,6 +80,9 @@ static void mux_config(void);
 static int sdp343x_board_init(void)
 {
 	int in_sdram = running_in_sdram();
+
+	omap3_core_init();
+
 	mux_config();
 	if (!in_sdram)
 		sdrc_init();
diff --git a/arch/arm/boards/omap3evm/board.c b/arch/arm/boards/omap3evm/board.c
index ec2ed2c..fdd5227 100644
--- a/arch/arm/boards/omap3evm/board.c
+++ b/arch/arm/boards/omap3evm/board.c
@@ -200,6 +200,8 @@ static int omap3_evm_board_init(void)
 {
 	int in_sdram = running_in_sdram();
 
+	omap3_core_init();
+
 	mux_config();
 
 	/* Dont reconfigure SDRAM while running in SDRAM! */
diff --git a/arch/arm/mach-omap/include/mach/silicon.h b/arch/arm/mach-omap/include/mach/silicon.h
index c2f0c41..638d6c4 100644
--- a/arch/arm/mach-omap/include/mach/silicon.h
+++ b/arch/arm/mach-omap/include/mach/silicon.h
@@ -30,10 +30,8 @@
 #endif
 
 /* If Architecture specific init functions are present */
-#ifdef CONFIG_ARCH_HAS_LOWLEVEL_INIT
 #ifndef __ASSEMBLY__
-void a_init(void);
+void omap3_core_init(void);
 #endif /* __ASSEMBLY__ */
-#endif
 
 #endif /* __ASM_ARCH_OMAP_SILICON_H */
diff --git a/arch/arm/mach-omap/omap3_core.S b/arch/arm/mach-omap/omap3_core.S
index 90c4243..b32017c 100644
--- a/arch/arm/mach-omap/omap3_core.S
+++ b/arch/arm/mach-omap/omap3_core.S
@@ -69,16 +69,7 @@ next:
 	orr r0, r0, r1
 	/* Store the new vector address */
 	mcr p15, #0, r0, c12, c0, #0
-	/* Setup a temporary stack so that we can call C functions */
-	ldr	sp,	SRAM_STACK
-        str     ip,	[sp]    /* stash old link register */
-        str     lr,	[sp]    /* stash current link register */
-	mov	ip,	lr	/* save link reg across call */
-	bl      a_init          /* Architecture init */
-        ldr     lr,	[sp]    /* restore current link register */
-        ldr     ip,	[sp]    /* restore save ip */
 
-	/* Invalidate all Dcaches */
 #ifndef CONFIG_CPU_V7_DCACHE_SKIP
 	/* If Arch specific ROM code SMI handling does not exist */
 	mrc	p15, 1, r0, c0, c0, 1	/* read clidr */
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index fc83d23..7219e28 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -484,7 +484,7 @@ static void try_unlock_memory(void)
  *
  * @return void
  */
-void a_init(void)
+void omap3_core_init(void)
 {
 	watchdog_init();
 
-- 
1.7.8.3


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[PATCH 05/10] ARM omap3 clock: move pll tables to C code

[Sascha Hauer]

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-omap/Makefile                   |    2 +-
 arch/arm/mach-omap/include/mach/omap3-clock.h |   10 -
 arch/arm/mach-omap/omap3_clock.c              |  123 +++++++++++-
 arch/arm/mach-omap/omap3_clock_core.S         |  265 -------------------------
 4 files changed, 116 insertions(+), 284 deletions(-)
 delete mode 100644 arch/arm/mach-omap/omap3_clock_core.S

diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index 9bd2b62..b219613 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_ARCH_OMAP) += syslib.o
 obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o
 obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o
 obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
-obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock_core.o omap3_clock.o
+obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
 obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
 obj-$(CONFIG_SHELL_NONE) += xload.o
 obj-$(CONFIG_I2C_TWL6030) += omap4_twl6030_mmc.o
diff --git a/arch/arm/mach-omap/include/mach/omap3-clock.h b/arch/arm/mach-omap/include/mach/omap3-clock.h
index 10566e1..67f2673 100644
--- a/arch/arm/mach-omap/include/mach/omap3-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap3-clock.h
@@ -143,16 +143,6 @@ struct dpll_param_per_36x {
 	unsigned int m2div;
 };
 
-/* External functions see omap3_clock_core.S */
-extern struct dpll_param *get_mpu_dpll_param_34x(u32);
-extern struct dpll_param *get_iva_dpll_param_34x(u32);
-extern struct dpll_param *get_core_dpll_param_34x(u32);
-extern struct dpll_param *get_per_dpll_param_34x(u32);
-
-extern struct dpll_param *get_mpu_dpll_param_36x(u32);
-extern struct dpll_param *get_iva_dpll_param_36x(u32);
-extern struct dpll_param *get_core_dpll_param_36x(u32);
-extern struct dpll_param_per_36x *get_per_dpll_param_36x(u32);
 #endif /* __ASSEMBLY__ */
 
 #endif  /* endif _OMAP343X_CLOCKS_H_ */
diff --git a/arch/arm/mach-omap/omap3_clock.c b/arch/arm/mach-omap/omap3_clock.c
index 391aa40..646235e 100644
--- a/arch/arm/mach-omap/omap3_clock.c
+++ b/arch/arm/mach-omap/omap3_clock.c
@@ -143,6 +143,22 @@ static void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
 		*sys_clkin_sel = 0;
 }
 
+static struct dpll_param core_dpll_param_34x_es1[] = {
+	{ .m = 0x19F, .n = 0x0E, .fsel = 0x03, .m2 = 0x01, }, /* 12   MHz */
+	{ .m = 0x1B2, .n = 0x10, .fsel = 0x03, .m2 = 0x01, }, /* 13   MHz */
+	{ .m = 0x19F, .n = 0x17, .fsel = 0x03, .m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 0x1B2, .n = 0x21, .fsel = 0x03, .m2 = 0x01, }, /* 26   MHz */
+	{ .m = 0x19F, .n = 0x2F, .fsel = 0x03, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
+static struct dpll_param core_dpll_param_34x_es2[] = {
+	{ .m = 0x0A6, .n = 0x05, .fsel = 0x07, .m2 = 0x01, }, /* 12   MHz */
+	{ .m = 0x14C, .n = 0x0C, .fsel = 0x03, .m2 = 0x01, }, /* 13   MHz */
+	{ .m = 0x19F, .n = 0x17, .fsel = 0x03, .m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 0x0A6, .n = 0x0C, .fsel = 0x07, .m2 = 0x01, }, /* 26   MHz */
+	{ .m = 0x19F, .n = 0x2F, .fsel = 0x03, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize CORE DPLL for OMAP34x
  *
@@ -151,7 +167,11 @@ static void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
  */
 static void init_core_dpll_34x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param *dp = get_core_dpll_param_34x(cpu_rev);
+	struct dpll_param *dp;
+	if (cpu_rev == OMAP34XX_ES1)
+		dp = core_dpll_param_34x_es1;
+	else
+		dp = core_dpll_param_34x_es2;
 
 	dp += clk_sel;
 
@@ -200,6 +220,15 @@ static void init_core_dpll_34x(u32 cpu_rev, u32 clk_sel)
 	}
 }
 
+/* PER DPLL values are same for both ES1 and ES2 */
+static struct dpll_param per_dpll_param_34x[] = {
+	{ .m = 0x0D8, .n = 0x05, .fsel = 0x07, .m2 = 0x09, }, /* 12   MHz */
+	{ .m = 0x1B0, .n = 0x0C, .fsel = 0x03, .m2 = 0x09, }, /* 13   MHz */
+	{ .m = 0x0E1, .n = 0x09, .fsel = 0x07, .m2 = 0x09, }, /* 19.2 MHz */
+	{ .m = 0x0D8, .n = 0x0C, .fsel = 0x07, .m2 = 0x09, }, /* 26   MHz */
+	{ .m = 0x0E1, .n = 0x13, .fsel = 0x07, .m2 = 0x09, }, /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize PER DPLL for OMAP34x
  *
@@ -208,7 +237,7 @@ static void init_core_dpll_34x(u32 cpu_rev, u32 clk_sel)
  */
 static void init_per_dpll_34x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param *dp = get_per_dpll_param_34x(cpu_rev);
+	struct dpll_param *dp = per_dpll_param_34x;
 
 	dp += clk_sel;
 
@@ -255,6 +284,22 @@ static void init_per_dpll_34x(u32 cpu_rev, u32 clk_sel)
 	wait_on_value((0x1 << 1), 2, CM_REG(IDLEST_CKGEN), LDELAY);
 }
 
+static struct dpll_param mpu_dpll_param_34x_es1[] = {
+	{ .m = 0x0FE, .n = 0x07, .fsel = 0x05, .m2 = 0x01, }, /* 12   MHz */
+	{ .m = 0x17D, .n = 0x0C, .fsel = 0x03, .m2 = 0x01, }, /* 13   MHz */
+	{ .m = 0x179, .n = 0x12, .fsel = 0x04, .m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 0x17D, .n = 0x19, .fsel = 0x03, .m2 = 0x01, }, /* 26   MHz */
+	{ .m = 0x1FA, .n = 0x32, .fsel = 0x03, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
+static struct dpll_param mpu_dpll_param_34x_es2[] = {
+	{.m = 0x0FA, .n = 0x05, .fsel = 0x07, .m2 = 0x01, }, /* 12   MHz */
+	{.m = 0x1F4, .n = 0x0C, .fsel = 0x03, .m2 = 0x01, }, /* 13   MHz */
+	{.m = 0x271, .n = 0x17, .fsel = 0x03, .m2 = 0x01, }, /* 19.2 MHz */
+	{.m = 0x0FA, .n = 0x0C, .fsel = 0x07, .m2 = 0x01, }, /* 26   MHz */
+	{.m = 0x271, .n = 0x2F, .fsel = 0x03, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize MPU DPLL for OMAP34x
  *
@@ -266,7 +311,12 @@ static void init_per_dpll_34x(u32 cpu_rev, u32 clk_sel)
  */
 static void init_mpu_dpll_34x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param *dp = get_mpu_dpll_param_34x(cpu_rev);
+	struct dpll_param *dp;
+
+	if (cpu_rev == OMAP34XX_ES1)
+		dp = mpu_dpll_param_34x_es1;
+	else
+		dp = mpu_dpll_param_34x_es2;
 
 	dp += clk_sel;
 
@@ -283,6 +333,22 @@ static void init_mpu_dpll_34x(u32 cpu_rev, u32 clk_sel)
 	sr32(CM_REG(CLKEN_PLL_MPU), 4, 4, dp->fsel);
 }
 
+static struct dpll_param iva_dpll_param_34x_es1[] = {
+	{ .m = 	0x07D, .n = 0x05, .fsel = 0x07,	.m2 = 0x01, }, /* 12   MHz */
+	{ .m = 	0x0FA, .n = 0x0C, .fsel = 0x03,	.m2 = 0x01, }, /* 13   MHz */
+	{ .m = 	0x082, .n = 0x09, .fsel = 0x07,	.m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 	0x07D, .n = 0x0C, .fsel = 0x07,	.m2 = 0x01, }, /* 26   MHz */
+	{ .m = 	0x13F, .n = 0x30, .fsel = 0x03,	.m2 = 0x01, }, /* 38.4 MHz */
+};
+
+static struct dpll_param iva_dpll_param_34x_es2[] = {
+	{ .m = 0x0B4, .n = 0x05, .fsel = 0x07, .m2 = 0x01, }, /* 12   MHz */
+	{ .m = 0x168, .n = 0x0C, .fsel = 0x03, .m2 = 0x01, }, /* 13   MHz */
+	{ .m = 0x0E1, .n = 0x0B, .fsel = 0x06, .m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 0x0B4, .n = 0x0C, .fsel = 0x07, .m2 = 0x01, }, /* 26   MHz */
+	{ .m = 0x0E1, .n = 0x17, .fsel = 0x06, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize IVA DPLL for OMAP34x
  *
@@ -291,7 +357,12 @@ static void init_mpu_dpll_34x(u32 cpu_rev, u32 clk_sel)
  */
 static void init_iva_dpll_34x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param *dp = get_iva_dpll_param_34x(cpu_rev);
+	struct dpll_param *dp;
+
+	if (cpu_rev == OMAP34XX_ES1)
+		dp = iva_dpll_param_34x_es1;
+	else
+		dp = iva_dpll_param_34x_es2;
 
 	dp += clk_sel;
 
@@ -316,6 +387,15 @@ static void init_iva_dpll_34x(u32 cpu_rev, u32 clk_sel)
 	wait_on_value((0x1 << 0), 1, CM_REG(IDLEST_PLL_IVA2), LDELAY);
 }
 
+/* FIXME: All values correspond to 26MHz only */
+static struct dpll_param core_dpll_param_36x[] = {
+	{ .m = 0x0C8, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 12   MHz */
+	{ .m = 0x0C8, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 13   MHz */
+	{ .m = 0x0C8, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 0x0C8, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 26   MHz */
+	{ .m = 0x0C8, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize CORE DPLL for OMAP36x
  *
@@ -324,7 +404,7 @@ static void init_iva_dpll_34x(u32 cpu_rev, u32 clk_sel)
  */
 static void init_core_dpll_36x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param *dp = get_core_dpll_param_36x(cpu_rev);
+	struct dpll_param *dp = core_dpll_param_36x;
 
 	dp += clk_sel;
 
@@ -366,6 +446,15 @@ static void init_core_dpll_36x(u32 cpu_rev, u32 clk_sel)
 	}
 }
 
+/* FIXME: All values correspond to 26MHz only */
+static struct dpll_param_per_36x per_dpll_param_36x[] = {
+	{ .m = 0x1B0, .n = 0x0C, .m2 = 9, .m3 = 0x10, .m4 = 9, .m5 = 4,	.m6 = 3, .m2div = 1, },  /* 12   MHz */
+	{ .m = 0x1B0, .n = 0x0C, .m2 = 9, .m3 = 0x10, .m4 = 9, .m5 = 4,	.m6 = 3, .m2div = 1, },  /* 13   MHz */
+	{ .m = 0x1B0, .n = 0x0C, .m2 = 9, .m3 = 0x10, .m4 = 9, .m5 = 4,	.m6 = 3, .m2div = 1, },  /* 19.2 MHz */
+	{ .m = 0x1B0, .n = 0x0C, .m2 = 9, .m3 = 0x10, .m4 = 9, .m5 = 4,	.m6 = 3, .m2div = 1, },  /* 26   MHz */
+	{ .m = 0x1B0, .n = 0x0C, .m2 = 9, .m3 = 0x10, .m4 = 9, .m5 = 4,	.m6 = 3, .m2div = 1, },  /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize PER DPLL for OMAP36x
  *
@@ -374,7 +463,7 @@ static void init_core_dpll_36x(u32 cpu_rev, u32 clk_sel)
  */
 static void init_per_dpll_36x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param_per_36x *dp = get_per_dpll_param_36x(cpu_rev);
+	struct dpll_param_per_36x *dp = per_dpll_param_36x;
 
 	dp += clk_sel;
 
@@ -410,6 +499,15 @@ static void init_per_dpll_36x(u32 cpu_rev, u32 clk_sel)
 	wait_on_value((0x1 << 1), 2, CM_REG(IDLEST_CKGEN), LDELAY);
 }
 
+/* FIXME: All values correspond to 26MHz only */
+static struct dpll_param mpu_dpll_param_36x[] = {
+	{ .m = 0x12C, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 12   MHz */
+	{ .m = 0x12C, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 13   MHz */
+	{ .m = 0x12C, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 0x12C, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 26   MHz */
+	{ .m = 0x12C, .n = 0x0C, .fsel = 0x00, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize MPU DPLL for OMAP36x
  *
@@ -418,7 +516,7 @@ static void init_per_dpll_36x(u32 cpu_rev, u32 clk_sel)
  */
 static void init_mpu_dpll_36x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param *dp = get_mpu_dpll_param_36x(cpu_rev);
+	struct dpll_param *dp = mpu_dpll_param_36x;
 
 	dp += clk_sel;
 
@@ -435,6 +533,15 @@ static void init_mpu_dpll_36x(u32 cpu_rev, u32 clk_sel)
 	sr32(CM_REG(CLKEN_PLL_MPU), 4, 4, dp->fsel);
 }
 
+/* FIXME: All values correspond to 26MHz only */
+static struct dpll_param iva_dpll_param_36x[] = {
+	{ .m = 0x00A, .n = 0x00, .fsel = 0x00, .m2 = 0x01, }, /* 12   MHz */
+	{ .m = 0x00A, .n = 0x00, .fsel = 0x00, .m2 = 0x01, }, /* 13   MHz */
+	{ .m = 0x00A, .n = 0x00, .fsel = 0x00, .m2 = 0x01, }, /* 19.2 MHz */
+	{ .m = 0x00A, .n = 0x00, .fsel = 0x00, .m2 = 0x01, }, /* 26   MHz */
+	{ .m = 0x00A, .n = 0x00, .fsel = 0x00, .m2 = 0x01, }, /* 38.4 MHz */
+};
+
 /**
  * @brief Initialize IVA DPLL for OMAP36x
  *
@@ -443,7 +550,7 @@ static void init_mpu_dpll_36x(u32 cpu_rev, u32 clk_sel)
  */
 static void init_iva_dpll_36x(u32 cpu_rev, u32 clk_sel)
 {
-	struct dpll_param *dp = get_iva_dpll_param_36x(cpu_rev);
+	struct dpll_param *dp = iva_dpll_param_36x;
 
 	dp += clk_sel;
 
diff --git a/arch/arm/mach-omap/omap3_clock_core.S b/arch/arm/mach-omap/omap3_clock_core.S
deleted file mode 100644
index b31ed80..0000000
--- a/arch/arm/mach-omap/omap3_clock_core.S
+++ /dev/null
@@ -1,265 +0,0 @@
-/**
- * @file
- * @brief Provides PRCM divisors and SRAM execution code.
- *
- * FileName: arch/arm/mach-omap/omap3_clock_core.S
- *
- * This provides two things:
- * @li @ref omap3_clock.c cannot have switch or global variables.
- * This file provides the constant data for the file to use.
- *
- * @li @ref prcm_init cannot execute certain critical clock
- * configurations while running in SDRAM/Flash. This provides
- * relocation and execution capability for the same.
- *
- * Orignally from http://linux.omap.com/pub/bootloader/3430sdp/u-boot-v1.tar.gz
- */
-/*
- * (C) Copyright 2006-2008
- * Texas Instruments, <www.ti.com>
- * Richard Woodruff <r-woodruff2@ti.com>
- * Nishanth Menon <x0nishan@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <mach/silicon.h>
-#include <mach/clocks.h>
-#include <mach/gpmc.h>
-
-	/* the literal pools origin */
-	.ltorg
-
-/* MPU DPLL Parameter table
- *
- * This table defines the DPLL parameter table for the MPU as defined by
- * "struct dpll_param defined" in "omap3-clock.h"
- *
- * The tables are defined for separately each silicon revision.
- */
-.globl mpu_dpll_param_34x_es1
-mpu_dpll_param_34x_es1:
-/*    	M	N	FREQSEL	M2	*/
-.word	0x0FE,	0x07,	0x05,	0x01		/* 12   MHz	*/
-.word	0x17D,	0x0C,	0x03,	0x01		/* 13   MHz	*/
-.word	0x179,	0x12,	0x04,	0x01		/* 19.2 MHz	*/
-.word	0x17D,	0x19,	0x03,	0x01		/* 26   MHz	*/
-.word	0x1FA,	0x32,	0x03,	0x01		/* 38.4 MHz	*/
-
-.globl mpu_dpll_param_34x_es2
-mpu_dpll_param_34x_es2:
-/*    	M	N	FREQSEL	M2	*/
-.word	0x0FA,	0x05,	0x07,	0x01		/* 12   MHz	*/
-.word	0x1F4,	0x0C,	0x03,	0x01		/* 13   MHz	*/
-.word	0x271,	0x17,	0x03,	0x01		/* 19.2 MHz	*/
-.word	0x0FA,	0x0C,	0x07,	0x01		/* 26   MHz	*/
-.word	0x271,	0x2F,	0x03,	0x01		/* 38.4 MHz	*/
-
-/**
- * @brief Get address of MPU DPLL param table (OMAP34XX).
- *
- * @param rev Silicon revision.
- *
- * @return Address of the param table
- */
-.globl get_mpu_dpll_param_34x
-get_mpu_dpll_param_34x:
-	mov	r3, r0
-	lsl	r3, r3, #16		/* Isolate silicon revision */
-	lsr	r3, r3, #16
-	cmp	r3, #0			/* Revision 1 ? */
-	adr	r0, mpu_dpll_param_34x_es1
-	bxeq	lr
-	adr	r0, mpu_dpll_param_34x_es2
-	mov	pc, lr
-
-iva_dpll_param_34x_es1:
-/*    	M	N	FREQSEL	M2				*/
-.word	0x07D,	0x05,	0x07,	0x01		/* 12   MHz	*/
-.word	0x0FA,	0x0C,	0x03,	0x01		/* 13   MHz	*/
-.word	0x082,	0x09,	0x07,	0x01		/* 19.2 MHz	*/
-.word	0x07D,	0x0C,	0x07,	0x01		/* 26   MHz	*/
-.word	0x13F,	0x30,	0x03,	0x01		/* 38.4 MHz	*/
-
-iva_dpll_param_34x_es2:
-/*    	M	N	FREQSEL	M2				*/
-.word	0x0B4,	0x05,	0x07,	0x01		/* 12   MHz	*/
-.word	0x168,	0x0C,	0x03,	0x01		/* 13   MHz	*/
-.word	0x0E1,	0x0B,	0x06,	0x01		/* 19.2 MHz	*/
-.word	0x0B4,	0x0C,	0x07,	0x01		/* 26   MHz	*/
-.word	0x0E1,	0x17,	0x06,	0x01		/* 38.4 MHz	*/
-
-/**
- * @brief Get address of IVA DPLL param table (OMAP34XX).
- *
- * @param rev Silicon revision.
- *
- * @return Address of the param table
- */
-.globl get_iva_dpll_param_34x
-get_iva_dpll_param_34x:
-	mov	r3, r0
-	lsl	r3, r3, #16		/* Isolate silicon revision */
-	lsr	r3, r3, #16
-	cmp	r3, #0			/* Revision 1 ? */
-	adr	r0, iva_dpll_param_34x_es1
-	bxeq	lr
-	adr	r0, iva_dpll_param_34x_es2
-	mov	pc, lr
-
-core_dpll_param_34x_es1:
-/*    	M	N	FREQSEL	M2				*/
-.word	0x19F,	0x0E,	0x03,	0x01		/* 12   MHz	*/
-.word	0x1B2,	0x10,	0x03,	0x01		/* 13   MHz	*/
-.word	0x19F,	0x17,	0x03,	0x01		/* 19.2 MHz	*/
-.word	0x1B2,	0x21,	0x03,	0x01		/* 26   MHz	*/
-.word	0x19F,	0x2F,	0x03,	0x01		/* 38.4 MHz	*/
-
-core_dpll_param_34x_es2:
-/*    	M	N	FREQSEL	M2				*/
-.word	0x0A6,	0x05,	0x07,	0x01		/* 12   MHz	*/
-.word	0x14C,	0x0C,	0x03,	0x01		/* 13   MHz	*/
-.word	0x19F,	0x17,	0x03,	0x01		/* 19.2 MHz	*/
-.word	0x0A6,	0x0C,	0x07,	0x01		/* 26   MHz	*/
-.word	0x19F,	0x2F,	0x03,	0x01		/* 38.4 MHz	*/
-
-/**
- * @brief Get address of CORE DPLL param table (OMAP34XX).
- *
- * @param rev Silicon revision.
- *
- * @return Address of the param table
- */
-.globl get_core_dpll_param_34x
-get_core_dpll_param_34x:
-	mov	r3, r0
-	lsl	r3, r3, #16		/* Isolate silicon revision */
-	lsr	r3, r3, #16
-	cmp	r3, #0			/* Revision 1 ? */
-	adr	r0, core_dpll_param_34x_es1
-	bxeq	lr
-	adr	r0, core_dpll_param_34x_es2
-	mov	pc, lr
-
-/* PER DPLL values are same for both ES1 and ES2 */
-per_dpll_param_34x:
-/*    	M	N	FREQSEL	M2				*/
-.word	0x0D8,	0x05,	0x07,	0x09		/* 12   MHz	*/
-.word	0x1B0,	0x0C,	0x03,	0x09		/* 13   MHz	*/
-.word	0x0E1,	0x09,	0x07,	0x09		/* 19.2 MHz	*/
-.word	0x0D8,	0x0C,	0x07,	0x09		/* 26   MHz	*/
-.word	0x0E1,	0x13,	0x07,	0x09		/* 38.4 MHz	*/
-
-/**
- * @brief Get address of PER DPLL param table (OMAP34XX).
- *
- * @param rev Silicon revision (not used).
- *
- * @return Address of the param table
- */
-.globl get_per_dpll_param_34x
-get_per_dpll_param_34x:
-	adr r0, per_dpll_param_34x
-	mov pc, lr
-
-.globl mpu_dpll_param_36x
-mpu_dpll_param_36x:
-/* FIXME: All values correspond to 26MHz only */
-/*    	M	N	FREQSEL	M2	*/
-.word	0x12C,	0x0C,	0x00,	0x01		/* 12   MHz	*/
-.word	0x12C,	0x0C,	0x00,	0x01		/* 13   MHz	*/
-.word	0x12C,	0x0C,	0x00,	0x01		/* 19.2 MHz	*/
-.word	0x12C,	0x0C,	0x00,	0x01		/* 26   MHz	*/
-.word	0x12C,	0x0C,	0x00,	0x01		/* 38.4 MHz	*/
-
-/**
- * @brief Get address of MPU DPLL param table (OMAP36XX).
- *
- * @param rev Silicon revision.
- *
- * @return Address of the param table
- */
-.globl get_mpu_dpll_param_36x
-get_mpu_dpll_param_36x:
-	adr r0, mpu_dpll_param_36x
-	mov pc, lr
-
-.globl iva_dpll_param_36x
-iva_dpll_param_36x:
-/* FIXME: All values correspond to 26MHz only */
-/*    	M	N	FREQSEL	M2	*/
-.word	0x00A,	0x00,	0x00,	0x01		/* 12   MHz	*/
-.word	0x00A,	0x00,	0x00,	0x01		/* 13   MHz	*/
-.word	0x00A,	0x00,	0x00,	0x01		/* 19.2 MHz	*/
-.word	0x00A,	0x00,	0x00,	0x01		/* 26   MHz	*/
-.word	0x00A,	0x00,	0x00,	0x01		/* 38.4 MHz	*/
-
-/**
- * @brief Get address of IVA DPLL param table (OMAP36XX).
- *
- * @param rev Silicon revision.
- *
- * @return Address of the param table
- */
-.globl get_iva_dpll_param_36x
-get_iva_dpll_param_36x:
-	adr r0, iva_dpll_param_36x
-	mov pc, lr
-
-.globl core_dpll_param_36x
-core_dpll_param_36x:
-/* FIXME: All values correspond to 26MHz only */
-/*    	M	N	FREQSEL	M2	*/
-.word	0x0C8,	0x0C,	0x00,	0x01		/* 12   MHz	*/
-.word	0x0C8,	0x0C,	0x00,	0x01		/* 13   MHz	*/
-.word	0x0C8,	0x0C,	0x00,	0x01		/* 19.2 MHz	*/
-.word	0x0C8,	0x0C,	0x00,	0x01		/* 26   MHz	*/
-.word	0x0C8,	0x0C,	0x00,	0x01		/* 38.4 MHz	*/
-
-/**
- * @brief Get address of IVA DPLL param table (OMAP36XX).
- *
- * @param rev Silicon revision.
- *
- * @return Address of the param table
- */
-.globl get_core_dpll_param_36x
-get_core_dpll_param_36x:
-	adr r0, core_dpll_param_36x
-	mov pc, lr
-
-.globl per_dpll_param_36x
-per_dpll_param_36x:
-/* FIXME: All values correspond to 26MHz only */
-/*	M	N	M2	M3	M4	M5	M6	m2DIV */
-.word	0x1B0,	0x0C,	9,	0x10,	9,	4,	3,	1 /* 12   MHz */
-.word	0x1B0,	0x0C,	9,	0x10,	9,	4,	3,	1 /* 13   MHz */
-.word	0x1B0,	0x0C,	9,	0x10,	9,	4,	3,	1 /* 19.2 MHz */
-.word	0x1B0,	0x0C,	9,	0x10,	9,	4,	3,	1 /* 26   MHz */
-.word	0x1B0,	0x0C,	9,	0x10,	9,	4,	3,	1 /* 38.4 MHz */
-
-/**
- * @brief Get address of PER DPLL param table (OMAP36XX).
- *
- * @param rev Silicon revision.
- *
- * @return Address of the param table
- */
-.globl get_per_dpll_param_36x
-get_per_dpll_param_36x:
-	adr r0, per_dpll_param_36x
-	mov pc, lr
-- 
1.7.8.3


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[PATCH 06/10] ARM omap3: remove vector setup from lowlevel code

[Sascha Hauer]

No need to do this so early. We can't print anything right
now anyway, so there is no need to setup vectors.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-omap/omap3_core.S |   41 ++++----------------------------------
 1 files changed, 5 insertions(+), 36 deletions(-)

diff --git a/arch/arm/mach-omap/omap3_core.S b/arch/arm/mach-omap/omap3_core.S
index b32017c..dffbe99 100644
--- a/arch/arm/mach-omap/omap3_core.S
+++ b/arch/arm/mach-omap/omap3_core.S
@@ -36,40 +36,15 @@
  */
 
 #include <config.h>
+#include <linux/linkage.h>
+#include <asm/assembler.h>
 #include <mach/silicon.h>
 #include <mach/wdt.h>
 #include <mach/clocks.h>
 
 #ifdef CONFIG_ARCH_HAS_LOWLEVEL_INIT
-.globl arch_init_lowlevel
-arch_init_lowlevel:
-       /* Copy vectors to mask ROM indirect addr */
-	mov	r0, pc			/* Store the current pc address */
-	sub	r0, r0, #8		/* Reduce offset */
-	ldr	r1, arch_start		/* Load the link address for arch_int */
-	ldr	r2, barebox_start		/* load the link address of start_init*/
-	sub	r1, r1, r2		/* get the offset */
-	/* subtract the offset from PC of arch=Current start */
-	sub	r0, r0, r1
-	mov	r2, #OMAP_SRAM_INTVECT_COPYSIZE		/* r2 <- size to copy */
-	add	r2, r0, r2		/* r2 <- source end address */
-	ldr	r1, SRAM_INTVECT	/* build vect addr */
-next:
-	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
-	cmp	r0, r2			/* until source end address [r2]    */
-	ble	next			/* loop until equal */
-
-	ldr	r1, SRAM_INTVECT	/* build vect addr */
-	/* Read the interrupt vector base address */
-	mrc p15, #0, r0, c12, c0, #0
-	/* Clear the vector base 4:0 is reserved. */
-	and r0, r0, #0xF
-	/* Store the SRAM_INTVECT address */
-	orr r0, r0, r1
-	/* Store the new vector address */
-	mcr p15, #0, r0, c12, c0, #0
-
+ENTRY(arch_init_lowlevel)
+	/* Invalidate all Dcaches */
 #ifndef CONFIG_CPU_V7_DCACHE_SKIP
 	/* If Arch specific ROM code SMI handling does not exist */
 	mrc	p15, 1, r0, c0, c0, 1	/* read clidr */
@@ -114,13 +89,7 @@ finished_inval:
 #endif /* CONFIG_CPU_V7_DCACHE_SKIP */
 	/* back to arch calling code */
 	mov	pc,	lr
-
-arch_start:
-	.word	arch_init_lowlevel
-barebox_start:
-	.word	exception_vectors
-SRAM_INTVECT:
-	.word	OMAP_SRAM_INTVECT
+ENDPROC(arch_init_lowlevel)
 
 SRAM_STACK:
 	.word	OMAP_SRAM_STACK
-- 
1.7.8.3


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[PATCH 07/10] ARM omap3: reimplement setup_auxcr in pure asm

[Sascha Hauer]

This function consists of only inline asm statements, so
use assembly in the first place. Also makes sure that the
function is compiled in arm mode.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-omap/Makefile        |    2 +-
 arch/arm/mach-omap/auxcr.S         |   16 ++++++++++++++++
 arch/arm/mach-omap/omap3_generic.c |   20 +-------------------
 3 files changed, 18 insertions(+), 20 deletions(-)
 create mode 100644 arch/arm/mach-omap/auxcr.S

diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index b219613..87078ae 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -21,7 +21,7 @@
 #
 obj-$(CONFIG_ARCH_OMAP) += syslib.o
 obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o
-obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o
+obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o auxcr.o
 obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
 obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
 obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
diff --git a/arch/arm/mach-omap/auxcr.S b/arch/arm/mach-omap/auxcr.S
new file mode 100644
index 0000000..b5db773
--- /dev/null
+++ b/arch/arm/mach-omap/auxcr.S
@@ -0,0 +1,16 @@
+
+.arm
+.global setup_auxcr
+setup_auxcr:
+	mov	r12, #0x3
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #0x10		@ Enable ASA
+	orr	r0, r0, #1 << 5		@ Enable L1NEON
+	.word 0xE1600070		@ SMC
+	mov	r12, #0x2
+	mrc	p15, 1, r0, c9, c0, 2
+	@ Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround)
+	orr	r0, r0, #1 << 27
+	.word 0xE1600070		@ SMC
+	bx	lr
+
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index 7219e28..fe7363a 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -419,25 +419,7 @@ static void watchdog_init(void)
  *
  * @return void
  */
-static void setup_auxcr(void)
-{
-	unsigned long i;
-	volatile unsigned int j;
-	/* Save r0, r12 and restore them after usage */
-	__asm__ __volatile__("mov %0, r12":"=r"(j));
-	__asm__ __volatile__("mov %0, r0":"=r"(i));
-
-	/* GP Device ROM code API usage here */
-	/* r12 = AUXCR Write function and r0 value */
-	__asm__ __volatile__("mov r12, #0x3");
-	__asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
-	/* Enabling ASA */
-	__asm__ __volatile__("orr r0, r0, #0x10");
-	/* SMI instruction to call ROM Code API */
-	__asm__ __volatile__(".word 0xE1600070");
-	__asm__ __volatile__("mov r0, %0":"=r"(i));
-	__asm__ __volatile__("mov r12, %0":"=r"(j));
-}
+void setup_auxcr(void);
 
 /**
  * @brief Try to unlock the SRAM for general use
-- 
1.7.8.3


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[PATCH 08/10] ARM cache-armv7: Add additional ISB

[Sascha Hauer]

At least OMAP3 needs this to properly work with MMU.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/cpu/cache-armv7.S |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S
index f25dcfa..416498d 100644
--- a/arch/arm/cpu/cache-armv7.S
+++ b/arch/arm/cpu/cache-armv7.S
@@ -22,6 +22,7 @@ ENTRY(__mmu_cache_on)
 		movne	r1, #-1
 		mcrne	p15, 0, r1, c3, c0, 0	@ load domain access control
 #endif
+		mcr	p15, 0, r0, c7, c5, 4	@ ISB
 		mcr	p15, 0, r0, c1, c0, 0	@ load control register
 		mrc	p15, 0, r0, c1, c0, 0	@ and read it back
 		mov	r0, #0
-- 
1.7.8.3


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[PATCH 09/10] mtd omap nand: fix driver without CONFIG_PARAMETER

[Sascha Hauer]

With CONFIG_PARAMETER unset the driver never calls omap_gpmc_eccmode.
Fix it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/mtd/nand/nand_omap_gpmc.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
index 3bb6d79..740751b 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -958,6 +958,7 @@ static int gpmc_nand_probe(struct device_d *pdev)
 
 	dev_add_param(pdev, "eccmode", omap_gpmc_eccmode_set, NULL, 0);
 	dev_set_param(pdev, "eccmode", ecc_mode_strings[pdata->ecc_mode]);
+	omap_gpmc_eccmode(oinfo, pdata->ecc_mode);
 
 	/* We are all set to register with the system now! */
 	err = add_mtd_device(minfo, "nand");
-- 
1.7.8.3


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Re: [PATCH 09/10] mtd omap nand: fix driver without CONFIG_PARAMETER

[Sascha Hauer]

On Mon, Jan 16, 2012 at 11:18:19AM +0100, Sascha Hauer wrote:
> With CONFIG_PARAMETER unset the driver never calls omap_gpmc_eccmode.
> Fix it.

Will drop this one and use the patch from Jan Weitzel instead.

Sascha

> 
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
>  drivers/mtd/nand/nand_omap_gpmc.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c
> index 3bb6d79..740751b 100644
> --- a/drivers/mtd/nand/nand_omap_gpmc.c
> +++ b/drivers/mtd/nand/nand_omap_gpmc.c
> @@ -958,6 +958,7 @@ static int gpmc_nand_probe(struct device_d *pdev)
>  
>  	dev_add_param(pdev, "eccmode", omap_gpmc_eccmode_set, NULL, 0);
>  	dev_set_param(pdev, "eccmode", ecc_mode_strings[pdata->ecc_mode]);
> +	omap_gpmc_eccmode(oinfo, pdata->ecc_mode);
>  
>  	/* We are all set to register with the system now! */
>  	err = add_mtd_device(minfo, "nand");
> -- 
> 1.7.8.3
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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[PATCH 10/10] ARM omap3: make omap3_core.S thumb safe

[Sascha Hauer]

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-omap/omap3_core.S |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap/omap3_core.S b/arch/arm/mach-omap/omap3_core.S
index dffbe99..ceb3c76 100644
--- a/arch/arm/mach-omap/omap3_core.S
+++ b/arch/arm/mach-omap/omap3_core.S
@@ -71,8 +71,12 @@ inval_loop1:
 inval_loop2:
 	mov	r9, r4			/* create working copy of max way size */
 inval_loop3:
-	orr	r11, r10, r9, lsl r5	/* factor way and cache number into r11*/
-	orr	r11, r11, r7, lsl r2	/* factor index number into r11 */
+ARM(	orr	r11, r10, r9, lsl r5	) /* factor way and cache number into r11 */
+ARM(	orr	r11, r11, r7, lsl r2	) /* factor index number into r11 */
+THUMB(	lsl	r6, r9, r5		)
+THUMB(	orr	r11, r10, r6		) /* factor way and cache number into r11 */
+THUMB(	lsl	r6, r7, r2		)
+THUMB(	orr	r11, r11, r6		) /* factor index number into r11 */
 	mcr	p15, 0, r11, c7, c6, 2	/* invalidate by set/way */
 	subs	r9, r9, #1		/* decrement the way */
 	bge	inval_loop3
-- 
1.7.8.3


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RE: [PATCH] omap3 towards thumb2 support

[Premi, Sanjeev]

> -----Original Message-----
> From: barebox-bounces@lists.infradead.org 
> [mailto:barebox-bounces@lists.infradead.org] On Behalf Of Sascha Hauer
> Sent: Monday, January 16, 2012 3:48 PM
> To: barebox@lists.infradead.org
> Subject: [PATCH] omap3 towards thumb2 support
> 
> The following patches rework the omap3 support to be thumb2 safe.
> The initialisation order is changed so that more stuff can be
> done in a regular C environment rather than in lowlevel time.
> 
> Together with git://git.pengutronix.de/git/barebox.git work/thumb2
> the beagle board Xload config now fits into 34k.
> 
> The following changes since commit 
> be07ecb5c50e007d71f75145938c66bd04960b43:
> 
>   omap343xdsp: move to arch/arm/boards/omap343xdsp 
> (2012-01-16 10:28:00 +0100)
> 
> are available in the git repository at:
>   git://git.pengutronix.de/git/barebox.git work/omap3
> 
> Sascha Hauer (10):

I was able to pull in your branch and encountered a minor
issue - fixed by the patch at end of this mail.

How can I enable thumb2? Didn't find aything obvious in
omap3530_beagle_xload_defconfig.

~sanjeev

From 60293bdf05090245456931061895470a8900ca9d Mon Sep 17 00:00:00 2001
From: Sanjeev Premi <premi@ti.com>
Date: Mon, 16 Jan 2012 16:51:04 +0530
Subject: [PATCH] ARM OMAP3: Fix compile errors

Encountered this error wile compiling for omap3evm:
  CC      arch/arm/boards/omap3evm/board.o
arch/arm/boards/omap3evm/board.c:62:24: fatal error:
 mach/board.h: No such file or directory compilation terminated.

File mach/board.h doesn't exist since this commit:
  be2559e : ARM omap3: move board_init to pure_initcall

Fixed the same for omap343xsdp as well.

Signed-off-by: Sanjeev Premi <premi@ti.com>
---
 arch/arm/boards/omap343xdsp/board.c |    1 -
 arch/arm/boards/omap3evm/board.c    |    1 -
 2 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/omap343xdsp/board.c b/arch/arm/boards/omap343xdsp/board.c
index 4ad6f13..b5174f3 100644
--- a/arch/arm/boards/omap343xdsp/board.c
+++ b/arch/arm/boards/omap343xdsp/board.c
@@ -61,7 +61,6 @@
 #include <mach/control.h>
 #include <mach/omap3-mux.h>
 #include <mach/gpmc.h>
-#include <mach/board.h>
 #include <errno.h>
 
 /******************** Board Boot Time *******************/
diff --git a/arch/arm/boards/omap3evm/board.c b/arch/arm/boards/omap3evm/board.c
index fdd5227..21d2504 100644
--- a/arch/arm/boards/omap3evm/board.c
+++ b/arch/arm/boards/omap3evm/board.c
@@ -59,7 +59,6 @@
 #include <mach/control.h>
 #include <mach/omap3-mux.h>
 #include <mach/gpmc.h>
-#include <mach/board.h>
 #include <errno.h>
 
 
-- 
1.7.0.4

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Re: [PATCH] omap3 towards thumb2 support

[Sascha Hauer]

On Mon, Jan 16, 2012 at 11:30:23AM +0000, Premi, Sanjeev wrote:
> > -----Original Message-----
> > From: barebox-bounces@lists.infradead.org 
> > [mailto:barebox-bounces@lists.infradead.org] On Behalf Of Sascha Hauer
> > Sent: Monday, January 16, 2012 3:48 PM
> > To: barebox@lists.infradead.org
> > Subject: [PATCH] omap3 towards thumb2 support
> > 
> > The following patches rework the omap3 support to be thumb2 safe.
> > The initialisation order is changed so that more stuff can be
> > done in a regular C environment rather than in lowlevel time.
> > 
> > Together with git://git.pengutronix.de/git/barebox.git work/thumb2
> > the beagle board Xload config now fits into 34k.
> > 
> > The following changes since commit 
> > be07ecb5c50e007d71f75145938c66bd04960b43:
> > 
> >   omap343xdsp: move to arch/arm/boards/omap343xdsp 
> > (2012-01-16 10:28:00 +0100)
> > 
> > are available in the git repository at:
> >   git://git.pengutronix.de/git/barebox.git work/omap3
> > 
> > Sascha Hauer (10):
> 
> I was able to pull in your branch and encountered a minor
> issue - fixed by the patch at end of this mail.
> 
> How can I enable thumb2? Didn't find aything obvious in
> omap3530_beagle_xload_defconfig.

Did you merge the work/thumb2 branch into your branch? Then you should
find THUMB2_BAREBOX in menuconfig.

> 
> ~sanjeev
> 
> From 60293bdf05090245456931061895470a8900ca9d Mon Sep 17 00:00:00 2001
> From: Sanjeev Premi <premi@ti.com>
> Date: Mon, 16 Jan 2012 16:51:04 +0530
> Subject: [PATCH] ARM OMAP3: Fix compile errors
> 
> Encountered this error wile compiling for omap3evm:
>   CC      arch/arm/boards/omap3evm/board.o
> arch/arm/boards/omap3evm/board.c:62:24: fatal error:
>  mach/board.h: No such file or directory compilation terminated.
> 
> File mach/board.h doesn't exist since this commit:
>   be2559e : ARM omap3: move board_init to pure_initcall
> 
> Fixed the same for omap343xsdp as well.

Thanks for catching this. Will update my series.

Sascha


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Pengutronix e.K.                           |                             |
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Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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RE: [PATCH] omap3 towards thumb2 support

[Premi, Sanjeev]

> -----Original Message-----
> From: Sascha Hauer [mailto:s.hauer@pengutronix.de] 
> Sent: Monday, January 16, 2012 5:22 PM
> To: Premi, Sanjeev
> Cc: barebox@lists.infradead.org
> Subject: Re: [PATCH] omap3 towards thumb2 support
> 
> On Mon, Jan 16, 2012 at 11:30:23AM +0000, Premi, Sanjeev wrote:
> > > -----Original Message-----
> > > From: barebox-bounces@lists.infradead.org 
> > > [mailto:barebox-bounces@lists.infradead.org] On Behalf Of 
> Sascha Hauer
> > > Sent: Monday, January 16, 2012 3:48 PM
> > > To: barebox@lists.infradead.org
> > > Subject: [PATCH] omap3 towards thumb2 support
> > > 
> > > The following patches rework the omap3 support to be thumb2 safe.
> > > The initialisation order is changed so that more stuff can be
> > > done in a regular C environment rather than in lowlevel time.
> > > 
> > > Together with git://git.pengutronix.de/git/barebox.git work/thumb2
> > > the beagle board Xload config now fits into 34k.
> > > 
> > > The following changes since commit 
> > > be07ecb5c50e007d71f75145938c66bd04960b43:
> > > 
> > >   omap343xdsp: move to arch/arm/boards/omap343xdsp 
> > > (2012-01-16 10:28:00 +0100)
> > > 
> > > are available in the git repository at:
> > >   git://git.pengutronix.de/git/barebox.git work/omap3
> > > 
> > > Sascha Hauer (10):
> > 
> > I was able to pull in your branch and encountered a minor
> > issue - fixed by the patch at end of this mail.
> > 
> > How can I enable thumb2? Didn't find aything obvious in
> > omap3530_beagle_xload_defconfig.
> 
> Did you merge the work/thumb2 branch into your branch? Then you should
> find THUMB2_BAREBOX in menuconfig.

Found it. I was searching in a "cached" version of the file already
in my editor. Will try immediately.

~sanjeev

> 
> > 
> > ~sanjeev
> > 
> > From 60293bdf05090245456931061895470a8900ca9d Mon Sep 17 
> 00:00:00 2001
> > From: Sanjeev Premi <premi@ti.com>
> > Date: Mon, 16 Jan 2012 16:51:04 +0530
> > Subject: [PATCH] ARM OMAP3: Fix compile errors
> > 
> > Encountered this error wile compiling for omap3evm:
> >   CC      arch/arm/boards/omap3evm/board.o
> > arch/arm/boards/omap3evm/board.c:62:24: fatal error:
> >  mach/board.h: No such file or directory compilation terminated.
> > 
> > File mach/board.h doesn't exist since this commit:
> >   be2559e : ARM omap3: move board_init to pure_initcall
> > 
> > Fixed the same for omap343xsdp as well.
> 
> Thanks for catching this. Will update my series.
> 
> Sascha
> 
> 
> -- 
> Pengutronix e.K.                           |                  
>            |
> Industrial Linux Solutions                 | 
> http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: 
> +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   
> +49-5121-206917-5555 |
> 
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RE: [PATCH] omap3 towards thumb2 support

[Premi, Sanjeev]

> -----Original Message-----
> From: barebox-bounces@lists.infradead.org 
> [mailto:barebox-bounces@lists.infradead.org] On Behalf Of 
> Premi, Sanjeev
> Sent: Monday, January 16, 2012 5:32 PM
> To: Sascha Hauer
> Cc: barebox@lists.infradead.org
> Subject: RE: [PATCH] omap3 towards thumb2 support
> 

[snip]

> > > 
> > > I was able to pull in your branch and encountered a minor
> > > issue - fixed by the patch at end of this mail.
> > > 
> > > How can I enable thumb2? Didn't find aything obvious in
> > > omap3530_beagle_xload_defconfig.
> > 
> > Did you merge the work/thumb2 branch into your branch? Then 
> you should
> > find THUMB2_BAREBOX in menuconfig.
> 
> Found it. I was searching in a "cached" version of the file already
> in my editor. Will try immediately.
> 

I discarded the patches that I had manually merged last week and
pulled work/thumb2 instead.

The size of MLO dropped from 47604 to 35052 bytes. However, it didn't
boot successfully on the board. The MLO generated after removing
CONFIG_THUMB2_BAREBOX came up fine.

BTW, I while merging this patch, I saw a warning that could be fixed
before merging the patch into master.
  8917ac1 : Applying: ARM: move exception vectors away from start of binary

/home/premi/barebox/.git/rebase-apply/patch:236: new blank line at EOF.
+
warning: 1 line adds whitespace errors.


Here is the snapshot of my working branch:

d7ec121 : ARM: Allow to compile in thumb-2 mode
b695957 : ARM: get runtime offset of board_init_lowlevel_return by using separate section
6e5cfed : ARM: move exception vectors away from start of binary
60293bd : ARM OMAP3: Fix compile errors
d0b9b24 : Merge branch 'work/omap3' of git://git.pengutronix.de/git/barebox into thumb-01
f4a3223 : ARM omap3: make omap3_core.S thumb safe
1a80a4d : mtd omap nand: fix driver without CONFIG_PARAMETER
b4b125f : ARM cache-armv7: Add additional ISB
06c7256 : ARM omap3: reimplement setup_auxcr in pure asm

~sanjeev

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Re: [PATCH] omap3 towards thumb2 support

[Sascha Hauer]

[-- Attachment #1: Type: text/plain, Size: 2625 bytes --]

On Mon, Jan 16, 2012 at 12:42:36PM +0000, Premi, Sanjeev wrote:
> 
> > -----Original Message-----
> > From: barebox-bounces@lists.infradead.org 
> > [mailto:barebox-bounces@lists.infradead.org] On Behalf Of 
> > Premi, Sanjeev
> > Sent: Monday, January 16, 2012 5:32 PM
> > To: Sascha Hauer
> > Cc: barebox@lists.infradead.org
> > Subject: RE: [PATCH] omap3 towards thumb2 support
> > 
> 
> [snip]
> 
> > > > 
> > > > I was able to pull in your branch and encountered a minor
> > > > issue - fixed by the patch at end of this mail.
> > > > 
> > > > How can I enable thumb2? Didn't find aything obvious in
> > > > omap3530_beagle_xload_defconfig.
> > > 
> > > Did you merge the work/thumb2 branch into your branch? Then 
> > you should
> > > find THUMB2_BAREBOX in menuconfig.
> > 
> > Found it. I was searching in a "cached" version of the file already
> > in my editor. Will try immediately.
> > 
> 
> I discarded the patches that I had manually merged last week and
> pulled work/thumb2 instead.
> 
> The size of MLO dropped from 47604 to 35052 bytes. However, it didn't
> boot successfully on the board. The MLO generated after removing
> CONFIG_THUMB2_BAREBOX came up fine.

Please check that CONFIG_STACK_BASE really is 0x4020F000. It may be set
differently if you started from an older config.

Also, the resulting binary should also be startable as a second stage
loader in which case you might get some stack trace if you have enabled
this in the first stage.

> 
> BTW, I while merging this patch, I saw a warning that could be fixed
> before merging the patch into master.
>   8917ac1 : Applying: ARM: move exception vectors away from start of binary
> 
> /home/premi/barebox/.git/rebase-apply/patch:236: new blank line at EOF.
> +
> warning: 1 line adds whitespace errors.

Ok, will fix.

I attached my binary MLO file. Could you check if it works for you? I
just checked this binary and it comes up with:

40V

barebox 2012.01.0-00204-g319f3a9 (Jan 16 2012 - 16:41:49)

Board: Texas Instrument's Beagle
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xba ( )
Malloc space: 0x87bfff10 -> 0x87ffff0f (size  4 MB)
Stack space : 0x4020f000 -> 0x4020fc00 (size  3 kB)
booting from MMC1
could not read barebox.bin from sd card
booting failed

(I have no barebox.bin on my SD card, so 'booting failed' is ok)

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[-- Attachment #2: MLO --]
[-- Type: application/octet-stream, Size: 35244 bytes --]

[-- Attachment #3: Type: text/plain, Size: 149 bytes --]

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RE: [PATCH] omap3 towards thumb2 support

[Premi, Sanjeev]

(responding via webmail. Won't be able to quote properly)
________________________________________
From: Sascha Hauer [s.hauer@pengutronix.de]
Sent: Monday, January 16, 2012 9:16 PM
To: Premi, Sanjeev
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] omap3 towards thumb2 support

On Mon, Jan 16, 2012 at 12:42:36PM +0000, Premi, Sanjeev wrote:
>
> > -----Original Message-----
> > From: barebox-bounces@lists.infradead.org
> > [mailto:barebox-bounces@lists.infradead.org] On Behalf Of
> > Premi, Sanjeev
> > Sent: Monday, January 16, 2012 5:32 PM
> > To: Sascha Hauer
> > Cc: barebox@lists.infradead.org
> > Subject: RE: [PATCH] omap3 towards thumb2 support
> >
>
> [snip]
>
> > > >
> > > > I was able to pull in your branch and encountered a minor
> > > > issue - fixed by the patch at end of this mail.
> > > >
> > > > How can I enable thumb2? Didn't find aything obvious in
> > > > omap3530_beagle_xload_defconfig.
> > >
> > > Did you merge the work/thumb2 branch into your branch? Then
> > you should
> > > find THUMB2_BAREBOX in menuconfig.
> >
> > Found it. I was searching in a "cached" version of the file already
> > in my editor. Will try immediately.
> >
>
> I discarded the patches that I had manually merged last week and
> pulled work/thumb2 instead.
>
> The size of MLO dropped from 47604 to 35052 bytes. However, it didn't
> boot successfully on the board. The MLO generated after removing
> CONFIG_THUMB2_BAREBOX came up fine.

Please check that CONFIG_STACK_BASE really is 0x4020F000. It may be set
differently if you started from an older config.

[sp} Already did this.

Also, the resulting binary should also be startable as a second stage
loader in which case you might get some stack trace if you have enabled
this in the first stage.

[sp] Okay, this could be the issue. I was always building as first stage
     bootloader only - as i was looking for the banner to appear.

     Will try using emulator tomorrow to debug further.

>
> BTW, I while merging this patch, I saw a warning that could be fixed
> before merging the patch into master.
>   8917ac1 : Applying: ARM: move exception vectors away from start of binary
>
> /home/premi/barebox/.git/rebase-apply/patch:236: new blank line at EOF.
> +
> warning: 1 line adds whitespace errors.

Ok, will fix.

I attached my binary MLO file. Could you check if it works for you? I
just checked this binary and it comes up with:

[sp] I will try tomorrow morning.

40V

barebox 2012.01.0-00204-g319f3a9 (Jan 16 2012 - 16:41:49)

Board: Texas Instrument's Beagle
NAND device: Manufacturer ID: 0x2c, Chip ID: 0xba ( )
Malloc space: 0x87bfff10 -> 0x87ffff0f (size  4 MB)
Stack space : 0x4020f000 -> 0x4020fc00 (size  3 kB)
booting from MMC1
could not read barebox.bin from sd card
booting failed

(I have no barebox.bin on my SD card, so 'booting failed' is ok)

Sascha

--
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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RE: [PATCH] omap3 towards thumb2 support

[Premi, Sanjeev]

[-- Attachment #1: Type: text/plain, Size: 3403 bytes --]

 

> -----Original Message-----
> From: barebox-bounces@lists.infradead.org 
> [mailto:barebox-bounces@lists.infradead.org] On Behalf Of 
> Premi, Sanjeev
> Sent: Monday, January 16, 2012 9:47 PM
> To: Sascha Hauer
> Cc: barebox@lists.infradead.org
> Subject: RE: [PATCH] omap3 towards thumb2 support
> 
> (responding via webmail. Won't be able to quote properly)
> ________________________________________
> From: Sascha Hauer [s.hauer@pengutronix.de]
> Sent: Monday, January 16, 2012 9:16 PM
> To: Premi, Sanjeev
> Cc: barebox@lists.infradead.org
> Subject: Re: [PATCH] omap3 towards thumb2 support
> 
> On Mon, Jan 16, 2012 at 12:42:36PM +0000, Premi, Sanjeev wrote:
> >
> > > -----Original Message-----
> > > From: barebox-bounces@lists.infradead.org
> > > [mailto:barebox-bounces@lists.infradead.org] On Behalf Of
> > > Premi, Sanjeev
> > > Sent: Monday, January 16, 2012 5:32 PM
> > > To: Sascha Hauer
> > > Cc: barebox@lists.infradead.org
> > > Subject: RE: [PATCH] omap3 towards thumb2 support
> > >
> >
> > [snip]
> >
> > > > >
> > > > > I was able to pull in your branch and encountered a minor
> > > > > issue - fixed by the patch at end of this mail.
> > > > >
> > > > > How can I enable thumb2? Didn't find aything obvious in
> > > > > omap3530_beagle_xload_defconfig.
> > > >
> > > > Did you merge the work/thumb2 branch into your branch? Then
> > > you should
> > > > find THUMB2_BAREBOX in menuconfig.
> > >
> > > Found it. I was searching in a "cached" version of the 
> file already
> > > in my editor. Will try immediately.
> > >
> >
> > I discarded the patches that I had manually merged last week and
> > pulled work/thumb2 instead.
> >
> > The size of MLO dropped from 47604 to 35052 bytes. However, 
> it didn't
> > boot successfully on the board. The MLO generated after removing
> > CONFIG_THUMB2_BAREBOX came up fine.
> 
> Please check that CONFIG_STACK_BASE really is 0x4020F000. It 
> may be set
> differently if you started from an older config.
> 
> [sp} Already did this.
> 
> Also, the resulting binary should also be startable as a second stage
> loader in which case you might get some stack trace if you 
> have enabled
> this in the first stage.
> 
> [sp] Okay, this could be the issue. I was always building as 
> first stage
>      bootloader only - as i was looking for the banner to appear.
> 
>      Will try using emulator tomorrow to debug further.
> 
> >
> > BTW, I while merging this patch, I saw a warning that could be fixed
> > before merging the patch into master.
> >   8917ac1 : Applying: ARM: move exception vectors away from 
> start of binary
> >
> > /home/premi/barebox/.git/rebase-apply/patch:236: new blank 
> line at EOF.
> > +
> > warning: 1 line adds whitespace errors.
> 
> Ok, will fix.
> 
> I attached my binary MLO file. Could you check if it works for you? I
> just checked this binary and it comes up with:
> 
> [sp] I will try tomorrow morning.

Sascha,
  Your MLO boots fine. But I couldn't make repeat success on either
  beagle or the omap3evem on my side.

  Each time there is an exception on entry of setup_auxcr() on both
  boards. See attached image.

  I noticed that the size of the generated MLO for beagle were different
  for us - 35224(yours) vs. 35572(mine).

  I am building with CodeSourcery 2011.03-41.

~sanjeev

[-- Attachment #2: barebox_err.jpg --]
[-- Type: image/jpeg, Size: 140279 bytes --]

[-- Attachment #3: Type: text/plain, Size: 149 bytes --]

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Re: [PATCH] omap3 towards thumb2 support

[Sascha Hauer]

On Tue, Jan 17, 2012 at 11:14:31AM +0000, Premi, Sanjeev wrote:
>  
> 
> > -----Original Message-----
> > From: barebox-bounces@lists.infradead.org 
> > [mailto:barebox-bounces@lists.infradead.org] On Behalf Of 
> > Premi, Sanjeev
> > Sent: Monday, January 16, 2012 9:47 PM
> > To: Sascha Hauer
> > Cc: barebox@lists.infradead.org
> > Subject: RE: [PATCH] omap3 towards thumb2 support
> > 
> > (responding via webmail. Won't be able to quote properly)
> > ________________________________________
> > From: Sascha Hauer [s.hauer@pengutronix.de]
> > Sent: Monday, January 16, 2012 9:16 PM
> > To: Premi, Sanjeev
> > Cc: barebox@lists.infradead.org
> > Subject: Re: [PATCH] omap3 towards thumb2 support
> > 
> > On Mon, Jan 16, 2012 at 12:42:36PM +0000, Premi, Sanjeev wrote:
> > >
> > > > -----Original Message-----
> > > > From: barebox-bounces@lists.infradead.org
> > > > [mailto:barebox-bounces@lists.infradead.org] On Behalf Of
> > > > Premi, Sanjeev
> > > > Sent: Monday, January 16, 2012 5:32 PM
> > > > To: Sascha Hauer
> > > > Cc: barebox@lists.infradead.org
> > > > Subject: RE: [PATCH] omap3 towards thumb2 support
> > > >
> > >
> > > [snip]
> > >
> > > > > >
> > > > > > I was able to pull in your branch and encountered a minor
> > > > > > issue - fixed by the patch at end of this mail.
> > > > > >
> > > > > > How can I enable thumb2? Didn't find aything obvious in
> > > > > > omap3530_beagle_xload_defconfig.
> > > > >
> > > > > Did you merge the work/thumb2 branch into your branch? Then
> > > > you should
> > > > > find THUMB2_BAREBOX in menuconfig.
> > > >
> > > > Found it. I was searching in a "cached" version of the 
> > file already
> > > > in my editor. Will try immediately.
> > > >
> > >
> > > I discarded the patches that I had manually merged last week and
> > > pulled work/thumb2 instead.
> > >
> > > The size of MLO dropped from 47604 to 35052 bytes. However, 
> > it didn't
> > > boot successfully on the board. The MLO generated after removing
> > > CONFIG_THUMB2_BAREBOX came up fine.
> > 
> > Please check that CONFIG_STACK_BASE really is 0x4020F000. It 
> > may be set
> > differently if you started from an older config.
> > 
> > [sp} Already did this.
> > 
> > Also, the resulting binary should also be startable as a second stage
> > loader in which case you might get some stack trace if you 
> > have enabled
> > this in the first stage.
> > 
> > [sp] Okay, this could be the issue. I was always building as 
> > first stage
> >      bootloader only - as i was looking for the banner to appear.
> > 
> >      Will try using emulator tomorrow to debug further.
> > 
> > >
> > > BTW, I while merging this patch, I saw a warning that could be fixed
> > > before merging the patch into master.
> > >   8917ac1 : Applying: ARM: move exception vectors away from 
> > start of binary
> > >
> > > /home/premi/barebox/.git/rebase-apply/patch:236: new blank 
> > line at EOF.
> > > +
> > > warning: 1 line adds whitespace errors.
> > 
> > Ok, will fix.
> > 
> > I attached my binary MLO file. Could you check if it works for you? I
> > just checked this binary and it comes up with:
> > 
> > [sp] I will try tomorrow morning.
> 
> Sascha,
>   Your MLO boots fine. But I couldn't make repeat success on either
>   beagle or the omap3evem on my side.
> 
>   Each time there is an exception on entry of setup_auxcr() on both
>   boards. See attached image.
> 
>   I noticed that the size of the generated MLO for beagle were different
>   for us - 35224(yours) vs. 35572(mine).
> 
>   I am building with CodeSourcery 2011.03-41.

Ok, got it. Please replace the setup_auxcr patch with the following one
(I also updated the work/omap3 branch). The problem was the missing
ENDPROC(setup_auxcr) directive which tells the assembler that
setup_auxcr is a function. With this the function is correctly called
with 'blx' instead of 'bl'. 'blx' is needed because setup_auxcr is
compiled in arm mode instead of thumb2 mode. Somehow my toolchain
got that right without ENDPROC but the codesourcery toolchain didn't.
With this patch the binary also works with the codesourcery toolchain.

Sascha

8<----------------------------------------------------

[PATCH] ARM omap3: reimplement setup_auxcr in pure asm

This function consists of only inline asm statements, so
use assembly in the first place. Also makes sure that the
function is compiled in arm mode.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/mach-omap/Makefile        |    2 +-
 arch/arm/mach-omap/auxcr.S         |   17 +++++++++++++++++
 arch/arm/mach-omap/omap3_generic.c |   20 +-------------------
 3 files changed, 19 insertions(+), 20 deletions(-)
 create mode 100644 arch/arm/mach-omap/auxcr.S

diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index b219613..87078ae 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -21,7 +21,7 @@
 #
 obj-$(CONFIG_ARCH_OMAP) += syslib.o
 obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o
-obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o
+obj-$(CONFIG_ARCH_OMAP3) += omap3_core.o omap3_generic.o auxcr.o
 obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
 obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
 obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
diff --git a/arch/arm/mach-omap/auxcr.S b/arch/arm/mach-omap/auxcr.S
new file mode 100644
index 0000000..5cc8a5f
--- /dev/null
+++ b/arch/arm/mach-omap/auxcr.S
@@ -0,0 +1,17 @@
+#include <linux/linkage.h>
+#include <asm/unified.h>
+
+.arm
+ENTRY(setup_auxcr)
+	mov	r12, #0x3
+	mrc	p15, 0, r0, c1, c0, 1
+	orr	r0, r0, #0x10		@ Enable ASA
+	orr	r0, r0, #1 << 5		@ Enable L1NEON
+	.word 0xE1600070		@ SMC
+	mov	r12, #0x2
+	mrc	p15, 1, r0, c9, c0, 2
+	@ Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround)
+	orr	r0, r0, #1 << 27
+	.word 0xE1600070		@ SMC
+	bx	lr
+ENDPROC(setup_auxcr)
diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c
index 7219e28..fe7363a 100644
--- a/arch/arm/mach-omap/omap3_generic.c
+++ b/arch/arm/mach-omap/omap3_generic.c
@@ -419,25 +419,7 @@ static void watchdog_init(void)
  *
  * @return void
  */
-static void setup_auxcr(void)
-{
-	unsigned long i;
-	volatile unsigned int j;
-	/* Save r0, r12 and restore them after usage */
-	__asm__ __volatile__("mov %0, r12":"=r"(j));
-	__asm__ __volatile__("mov %0, r0":"=r"(i));
-
-	/* GP Device ROM code API usage here */
-	/* r12 = AUXCR Write function and r0 value */
-	__asm__ __volatile__("mov r12, #0x3");
-	__asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
-	/* Enabling ASA */
-	__asm__ __volatile__("orr r0, r0, #0x10");
-	/* SMI instruction to call ROM Code API */
-	__asm__ __volatile__(".word 0xE1600070");
-	__asm__ __volatile__("mov r0, %0":"=r"(i));
-	__asm__ __volatile__("mov r12, %0":"=r"(j));
-}
+void setup_auxcr(void);
 
 /**
  * @brief Try to unlock the SRAM for general use
-- 
1.7.8.3

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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RE: [PATCH] omap3 towards thumb2 support

[Premi, Sanjeev]

> -----Original Message-----
> From: Sascha Hauer [mailto:s.hauer@pengutronix.de] 
> Sent: Tuesday, January 17, 2012 5:43 PM
> To: Premi, Sanjeev
> Cc: barebox@lists.infradead.org
> Subject: Re: [PATCH] omap3 towards thumb2 support
> 
> On Tue, Jan 17, 2012 at 11:14:31AM +0000, Premi, Sanjeev wrote:

[snip]

> > > 
> > > I attached my binary MLO file. Could you check if it 
> works for you? I
> > > just checked this binary and it comes up with:
> > > 
> > > [sp] I will try tomorrow morning.
> > 
> > Sascha,
> >   Your MLO boots fine. But I couldn't make repeat success on either
> >   beagle or the omap3evem on my side.
> > 
> >   Each time there is an exception on entry of setup_auxcr() on both
> >   boards. See attached image.
> > 
> >   I noticed that the size of the generated MLO for beagle 
> were different
> >   for us - 35224(yours) vs. 35572(mine).
> > 
> >   I am building with CodeSourcery 2011.03-41.
> 
> Ok, got it. Please replace the setup_auxcr patch with the 
> following one
> (I also updated the work/omap3 branch). The problem was the missing
> ENDPROC(setup_auxcr) directive which tells the assembler that
> setup_auxcr is a function. With this the function is correctly called
> with 'blx' instead of 'bl'. 'blx' is needed because setup_auxcr is
> compiled in arm mode instead of thumb2 mode. Somehow my toolchain
> got that right without ENDPROC but the codesourcery toolchain didn't.
> With this patch the binary also works with the codesourcery toolchain.
> 

I replaced the contents of auxcr.S and I am able to boot fine on the
OMAP3EVM.

BTW, I noticed that this file has no license header. Is this okay?

~sanjeev

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Re: [PATCH] omap3 towards thumb2 support

[Sascha Hauer]

On Tue, Jan 17, 2012 at 12:24:26PM +0000, Premi, Sanjeev wrote:
> > -----Original Message-----
> > From: Sascha Hauer [mailto:s.hauer@pengutronix.de] 
> > Sent: Tuesday, January 17, 2012 5:43 PM
> > To: Premi, Sanjeev
> > Cc: barebox@lists.infradead.org
> > Subject: Re: [PATCH] omap3 towards thumb2 support
> > 
> > On Tue, Jan 17, 2012 at 11:14:31AM +0000, Premi, Sanjeev wrote:
> 
> [snip]
> 
> > > > 
> > > > I attached my binary MLO file. Could you check if it 
> > works for you? I
> > > > just checked this binary and it comes up with:
> > > > 
> > > > [sp] I will try tomorrow morning.
> > > 
> > > Sascha,
> > >   Your MLO boots fine. But I couldn't make repeat success on either
> > >   beagle or the omap3evem on my side.
> > > 
> > >   Each time there is an exception on entry of setup_auxcr() on both
> > >   boards. See attached image.
> > > 
> > >   I noticed that the size of the generated MLO for beagle 
> > were different
> > >   for us - 35224(yours) vs. 35572(mine).
> > > 
> > >   I am building with CodeSourcery 2011.03-41.
> > 
> > Ok, got it. Please replace the setup_auxcr patch with the 
> > following one
> > (I also updated the work/omap3 branch). The problem was the missing
> > ENDPROC(setup_auxcr) directive which tells the assembler that
> > setup_auxcr is a function. With this the function is correctly called
> > with 'blx' instead of 'bl'. 'blx' is needed because setup_auxcr is
> > compiled in arm mode instead of thumb2 mode. Somehow my toolchain
> > got that right without ENDPROC but the codesourcery toolchain didn't.
> > With this patch the binary also works with the codesourcery toolchain.
> > 
> 
> I replaced the contents of auxcr.S and I am able to boot fine on the
> OMAP3EVM.
> 
> BTW, I noticed that this file has no license header. Is this okay?

Added one. Can I have your tested-by?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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RE: [PATCH] omap3 towards thumb2 support

[Premi, Sanjeev]

> -----Original Message-----
> From: Sascha Hauer [mailto:s.hauer@pengutronix.de] 
> Sent: Tuesday, January 17, 2012 6:41 PM
> To: Premi, Sanjeev
> Cc: barebox@lists.infradead.org
> Subject: Re: [PATCH] omap3 towards thumb2 support
> 
> On Tue, Jan 17, 2012 at 12:24:26PM +0000, Premi, Sanjeev wrote:
> > > -----Original Message-----
> > > From: Sascha Hauer [mailto:s.hauer@pengutronix.de] 
> > > Sent: Tuesday, January 17, 2012 5:43 PM
> > > To: Premi, Sanjeev
> > > Cc: barebox@lists.infradead.org
> > > Subject: Re: [PATCH] omap3 towards thumb2 support
> > > 
> > > On Tue, Jan 17, 2012 at 11:14:31AM +0000, Premi, Sanjeev wrote:
> > 
> > [snip]
> > 
> > > > > 
> > > > > I attached my binary MLO file. Could you check if it 
> > > works for you? I
> > > > > just checked this binary and it comes up with:
> > > > > 
> > > > > [sp] I will try tomorrow morning.
> > > > 
> > > > Sascha,
> > > >   Your MLO boots fine. But I couldn't make repeat 
> success on either
> > > >   beagle or the omap3evem on my side.
> > > > 
> > > >   Each time there is an exception on entry of 
> setup_auxcr() on both
> > > >   boards. See attached image.
> > > > 
> > > >   I noticed that the size of the generated MLO for beagle 
> > > were different
> > > >   for us - 35224(yours) vs. 35572(mine).
> > > > 
> > > >   I am building with CodeSourcery 2011.03-41.
> > > 
> > > Ok, got it. Please replace the setup_auxcr patch with the 
> > > following one
> > > (I also updated the work/omap3 branch). The problem was 
> the missing
> > > ENDPROC(setup_auxcr) directive which tells the assembler that
> > > setup_auxcr is a function. With this the function is 
> correctly called
> > > with 'blx' instead of 'bl'. 'blx' is needed because setup_auxcr is
> > > compiled in arm mode instead of thumb2 mode. Somehow my toolchain
> > > got that right without ENDPROC but the codesourcery 
> toolchain didn't.
> > > With this patch the binary also works with the 
> codesourcery toolchain.
> > > 
> > 
> > I replaced the contents of auxcr.S and I am able to boot fine on the
> > OMAP3EVM.
> > 
> > BTW, I noticed that this file has no license header. Is this okay?
> 
> Added one. Can I have your tested-by?

Tested-by: Sanjeev Premi <premi@ti.com>

> 
> Sascha
> 
> 
> -- 
> Pengutronix e.K.                           |                  
>            |
> Industrial Linux Solutions                 | 
> http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: 
> +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   
> +49-5121-206917-5555 |
> 
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