[PATCH 0/4] at91: some fixes

[PATCH 0/4] at91: some fixes

[Jean-Christophe PLAGNIOL-VILLARD]

HI,

	some fixe for at91

	they are needed for at91sam9n12 support

The following changes since commit c7a729aefe13104b6f3a9f2150a9e993bb510d43:

  Merge branch 'for-next/m25p80' (2012-11-21 11:54:34 +0100)

are available in the git repository at:


  git://git.jcrosoft.org/barebox.git delivery/at91_fixes

for you to fetch changes up to 02d37b5d4598cd3ffea4730aa027c8c04ab1f58d:

  Revert "mtd: atmel_nand: optimize read/write buffer functions" (2012-11-22 02:21:14 +0800)

----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (4):
      at91: fix timer rate
      atmel_nand: fix pmecc timeout
      at91: clock: check overclock for sam9260/9261/9263/9rl
      Revert "mtd: atmel_nand: optimize read/write buffer functions"

 arch/arm/mach-at91/at91sam926x_time.c |    7 ++++++-
 arch/arm/mach-at91/clock.c            |   12 ++++++++++++
 drivers/mtd/nand/atmel_nand.c         |   33 +++++++++++++++++++++++++--------
 drivers/mtd/nand/atmel_nand_ecc.h     |    2 +-
 4 files changed, 44 insertions(+), 10 deletions(-)

Best Regards,
J.

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[PATCH 1/4] at91: fix timer rate

[Jean-Christophe PLAGNIOL-VILLARD]

today the timer rate is hardcoded to 6MHz which is wrong the PIT rate is MCK / 16

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 arch/arm/mach-at91/at91sam926x_time.c |    7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 7411ad8..7425e0a 100644
--- a/arch/arm/mach-at91/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -34,6 +34,7 @@
 #include <mach/at91_rstc.h>
 #include <mach/io.h>
 #include <io.h>
+#include <linux/clk.h>
 
 uint64_t at91sam9_clocksource_read(void)
 {
@@ -48,16 +49,20 @@ static struct clocksource cs = {
 
 static int clocksource_init (void)
 {
+	u32 pit_rate;
+
 	/*
 	 * Enable PITC Clock
 	 * The clock is already enabled for system controller in boot
 	 */
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
 
+	pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
+
 	/* Enable PITC */
 	at91_sys_write(AT91_PIT_MR, 0xfffff | AT91_PIT_PITEN);
 
-	cs.mult = clocksource_hz2mult(1000000 * 6, cs.shift);
+	cs.mult = clocksource_hz2mult(pit_rate, cs.shift);
 
 	init_clock(&cs);
 
-- 
1.7.10.4


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[PATCH 2/4] atmel_nand: fix pmecc timeout

[Jean-Christophe PLAGNIOL-VILLARD]

the timeout is 100ms not 100ns

on sam9x5 the SoC is fast enough so we can not see it
but not on sam9n12

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/mtd/nand/atmel_nand_ecc.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h
index 34f481e..e39aada 100644
--- a/drivers/mtd/nand/atmel_nand_ecc.h
+++ b/drivers/mtd/nand/atmel_nand_ecc.h
@@ -146,6 +146,6 @@
 #define PMECC_LOOKUP_TABLE_SIZE_1024		0x4000
 
 /* Time out value for reading PMECC status register */
-#define PMECC_MAX_TIMEOUT_MS			100
+#define PMECC_MAX_TIMEOUT_MS			100 * MSECOND
 
 #endif
-- 
1.7.10.4


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[PATCH 3/4] at91: clock: check overclock for sam9260/9261/9263/9rl

[Jean-Christophe PLAGNIOL-VILLARD]

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 arch/arm/mach-at91/clock.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index bda02fd..fd9ba46 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -50,6 +50,12 @@
 
 #define cpu_has_300M_plla()	(cpu_is_at91sam9g10())
 
+#define cpu_has_240M_plla()	(cpu_is_at91sam9261() \
+				|| cpu_is_at91sam9263() \
+				|| cpu_is_at91sam9rl())
+
+#define cpu_has_210M_plla()	(cpu_is_at91sam9260())
+
 #define cpu_has_pllb()		(!(cpu_is_at91sam9rl() \
 				|| cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5()))
@@ -602,6 +608,12 @@ int at91_clock_init(unsigned long main_clock)
 	} else if (cpu_has_800M_plla()) {
 		if (plla.rate_hz > 800000000)
 			pll_overclock = 1;
+	} else if (cpu_has_240M_plla()) {
+		if (plla.rate_hz > 240000000)
+			pll_overclock = 1;
+	} else if (cpu_has_210M_plla()) {
+		if (plla.rate_hz > 210000000)
+			pll_overclock = 1;
 	} else {
 		if (plla.rate_hz > 209000000)
 			pll_overclock = 1;
-- 
1.7.10.4


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[PATCH 4/4] Revert "mtd: atmel_nand: optimize read/write buffer functions"

[Jean-Christophe PLAGNIOL-VILLARD]

As in the kernel we revert as this was supposed to work but does not yet
this may need more work on the smc to be able to use it
So for now revert it

This reverts commit 809f0f6327241504b5071622a8d573255f91a875.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 drivers/mtd/nand/atmel_nand.c |   33 +++++++++++++++++++++++++--------
 1 file changed, 25 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 0477178..69e8171 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -159,16 +159,30 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
  */
 static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
 {
-	struct nand_chip *chip = mtd->priv;
+	struct nand_chip	*nand_chip = mtd->priv;
 
-	memcpy_fromio(buf, chip->IO_ADDR_R, len);
+	readsb(nand_chip->IO_ADDR_R, buf, len);
+}
+
+static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len)
+{
+	struct nand_chip	*nand_chip = mtd->priv;
+
+	readsw(nand_chip->IO_ADDR_R, buf, len / 2);
 }
 
 static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
 {
-	struct nand_chip *chip = mtd->priv;
+	struct nand_chip	*nand_chip = mtd->priv;
 
-	memcpy_toio(chip->IO_ADDR_W, buf, len);
+	writesb(nand_chip->IO_ADDR_W, buf, len);
+}
+
+static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len)
+{
+	struct nand_chip	*nand_chip = mtd->priv;
+
+	writesw(nand_chip->IO_ADDR_W, buf, len / 2);
 }
 
 /*
@@ -1112,11 +1126,14 @@ static int __init atmel_nand_probe(struct device_d *dev)
 
 	nand_chip->chip_delay = 20;		/* 20us command delay time */
 
-	if (host->board->bus_width_16)		/* 16-bit bus width */
+	if (host->board->bus_width_16) {	/* 16-bit bus width */
 		nand_chip->options |= NAND_BUSWIDTH_16;
-
-	nand_chip->read_buf = atmel_read_buf;
-	nand_chip->write_buf = atmel_write_buf;
+		nand_chip->read_buf = atmel_read_buf16;
+		nand_chip->write_buf = atmel_write_buf16;
+	} else {
+		nand_chip->read_buf = atmel_read_buf;
+		nand_chip->write_buf = atmel_write_buf;
+	}
 
 	atmel_nand_enable(host);
 
-- 
1.7.10.4


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Re: [PATCH 4/4] Revert "mtd: atmel_nand: optimize read/write buffer functions"

[张忠山]

In message <1353686104-31295-4-git-send-email-plagnioj@jcrosoft.com> Jean-Christophe PLAGNIOL-VILLARD wrote:
> As in the kernel we revert as this was supposed to work but does not yet
> this may need more work on the smc to be able to use it
> So for now revert it
>
> This reverts commit 809f0f6327241504b5071622a8d573255f91a875.
>
> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> ---
>  drivers/mtd/nand/atmel_nand.c |   33 +++++++++++++++++++++++++--------
>  1 file changed, 25 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 0477178..69e8171 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -159,16 +159,30 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
>   */
>  static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
>  {
> -	struct nand_chip *chip = mtd->priv;
> +	struct nand_chip	*nand_chip = mtd->priv;
>
> -	memcpy_fromio(buf, chip->IO_ADDR_R, len);
> +	readsb(nand_chip->IO_ADDR_R, buf, len);
> +}
> +
> +static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len)
> +{
> +	struct nand_chip	*nand_chip = mtd->priv;
> +
> +	readsw(nand_chip->IO_ADDR_R, buf, len / 2);
>  }
>
>  static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
>  {
> -	struct nand_chip *chip = mtd->priv;
> +	struct nand_chip	*nand_chip = mtd->priv;
>
> -	memcpy_toio(chip->IO_ADDR_W, buf, len);
> +	writesb(nand_chip->IO_ADDR_W, buf, len);
> +}
> +
> +static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len)
> +{
> +	struct nand_chip	*nand_chip = mtd->priv;
> +
> +	writesw(nand_chip->IO_ADDR_W, buf, len / 2);
>  }
>
>  /*
> @@ -1112,11 +1126,14 @@ static int __init atmel_nand_probe(struct device_d *dev)
>
>  	nand_chip->chip_delay = 20;		/* 20us command delay time */
>
> -	if (host->board->bus_width_16)		/* 16-bit bus width */
> +	if (host->board->bus_width_16) {	/* 16-bit bus width */
>  		nand_chip->options |= NAND_BUSWIDTH_16;
> -
> -	nand_chip->read_buf = atmel_read_buf;
> -	nand_chip->write_buf = atmel_write_buf;
> +		nand_chip->read_buf = atmel_read_buf16;
> +		nand_chip->write_buf = atmel_write_buf16;
> +	} else {
> +		nand_chip->read_buf = atmel_read_buf;
> +		nand_chip->write_buf = atmel_write_buf;
> +	}
>
>  	atmel_nand_enable(host);
>
> --
> 1.7.10.4
>

This patch resolves my problem

-- 
Best Regards,
zzs



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Re: [PATCH 4/4] Revert "mtd: atmel_nand: optimize read/write buffer functions"

[Jean-Christophe PLAGNIOL-VILLARD]

On 11:42 Sat 24 Nov     , 张忠山 wrote:
> In message <1353686104-31295-4-git-send-email-plagnioj@jcrosoft.com> Jean-Christophe PLAGNIOL-VILLARD wrote:
> > As in the kernel we revert as this was supposed to work but does not yet
> > this may need more work on the smc to be able to use it
> > So for now revert it
> >
> > This reverts commit 809f0f6327241504b5071622a8d573255f91a875.
> >
> > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
> > ---
> >  drivers/mtd/nand/atmel_nand.c |   33 +++++++++++++++++++++++++--------
> >  1 file changed, 25 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> > index 0477178..69e8171 100644
> > --- a/drivers/mtd/nand/atmel_nand.c
> > +++ b/drivers/mtd/nand/atmel_nand.c
> > @@ -159,16 +159,30 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
> >   */
> >  static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
> >  {
> > -	struct nand_chip *chip = mtd->priv;
> > +	struct nand_chip	*nand_chip = mtd->priv;
> >
> > -	memcpy_fromio(buf, chip->IO_ADDR_R, len);
> > +	readsb(nand_chip->IO_ADDR_R, buf, len);
> > +}
> > +
> > +static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len)
> > +{
> > +	struct nand_chip	*nand_chip = mtd->priv;
> > +
> > +	readsw(nand_chip->IO_ADDR_R, buf, len / 2);
> >  }
> >
> >  static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
> >  {
> > -	struct nand_chip *chip = mtd->priv;
> > +	struct nand_chip	*nand_chip = mtd->priv;
> >
> > -	memcpy_toio(chip->IO_ADDR_W, buf, len);
> > +	writesb(nand_chip->IO_ADDR_W, buf, len);
> > +}
> > +
> > +static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len)
> > +{
> > +	struct nand_chip	*nand_chip = mtd->priv;
> > +
> > +	writesw(nand_chip->IO_ADDR_W, buf, len / 2);
> >  }
> >
> >  /*
> > @@ -1112,11 +1126,14 @@ static int __init atmel_nand_probe(struct device_d *dev)
> >
> >  	nand_chip->chip_delay = 20;		/* 20us command delay time */
> >
> > -	if (host->board->bus_width_16)		/* 16-bit bus width */
> > +	if (host->board->bus_width_16) {	/* 16-bit bus width */
> >  		nand_chip->options |= NAND_BUSWIDTH_16;
> > -
> > -	nand_chip->read_buf = atmel_read_buf;
> > -	nand_chip->write_buf = atmel_write_buf;
> > +		nand_chip->read_buf = atmel_read_buf16;
> > +		nand_chip->write_buf = atmel_write_buf16;
> > +	} else {
> > +		nand_chip->read_buf = atmel_read_buf;
> > +		nand_chip->write_buf = atmel_write_buf;
> > +	}
> >
> >  	atmel_nand_enable(host);
> >
> > --
> > 1.7.10.4
> >
> 
> This patch resolves my problem
I'm expecting to see your patches

Best Regards,
J.

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Re: [PATCH 4/4] Revert "mtd: atmel_nand: optimize read/write buffer functions"

[张忠山]

> >
> > This patch resolves my problem
> I'm expecting to see your patches
>

My first patch very simple:

------------------
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 0477178..a111463 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -155,23 +155,6 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
 }

 /*
- * Minimal-overhead PIO for data access.
- */
-static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
-{
-       struct nand_chip *chip = mtd->priv;
-
-       memcpy_fromio(buf, chip->IO_ADDR_R, len);
-}
-
-static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
-{
-       struct nand_chip *chip = mtd->priv;
-
-       memcpy_toio(chip->IO_ADDR_W, buf, len);
-}
-
-/*
  * Return number of ecc bytes per sector according to sector size and
  * correction capability
  *
@@ -1115,8 +1098,9 @@ static int __init atmel_nand_probe(struct device_d *dev)
        if (host->board->bus_width_16)          /* 16-bit bus width */
                nand_chip->options |= NAND_BUSWIDTH_16;

-       nand_chip->read_buf = atmel_read_buf;
-       nand_chip->write_buf = atmel_write_buf;
+       /* use default */
+       nand_chip->read_buf = NULL;
+       nand_chip->write_buf = NULL;

        atmel_nand_enable(host);
------------------

After seeing your patch, I suppose the flowing patch may be works.
The idea is use optimized read/write function when 2**ale >= pagesize
and 2**cle >= pagesize.

I can't test it because the ale = a7, cle = a6 on my board, but
pagesize is 2048

------------------
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 0477178..66cf5db 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1115,8 +1115,8 @@ static int __init atmel_nand_probe(struct device_d *dev)
        if (host->board->bus_width_16)          /* 16-bit bus width */
                nand_chip->options |= NAND_BUSWIDTH_16;

-       nand_chip->read_buf = atmel_read_buf;
-       nand_chip->write_buf = atmel_write_buf;
+       nand_chip->read_buf = NULL;
+       nand_chip->write_buf = NULL;

        atmel_nand_enable(host);

@@ -1151,6 +1151,11 @@ static int __init atmel_nand_probe(struct device_d *dev)
                        goto err_hw_ecc;
        }

+       if((1 << pdata->ale) >= mtd->writesize && (1 << pdata->cle) >= mtd->writesize) {
+               nand_chip->read_buf = atmel_read_buf;
+               nand_chip->write_buf = atmel_write_buf;
+       }
+
        /* second phase scan */
        if (nand_scan_tail(mtd)) {
                res = -ENXIO;
------------------

-- 
Best Regards,
zzs



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Re: [PATCH 4/4] Revert "mtd: atmel_nand: optimize read/write buffer functions"

[Jean-Christophe PLAGNIOL-VILLARD]

On 16:11 Sun 25 Nov     , 张忠山 wrote:
> > >
> > > This patch resolves my problem
> > I'm expecting to see your patches
> >
> 
> My first patch very simple:
your board patch

I'll be at the electronic market in SH tomorrow

Best Regards,
J.
> 
> ------------------
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 0477178..a111463 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -155,23 +155,6 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
>  }
> 
>  /*
> - * Minimal-overhead PIO for data access.
> - */
> -static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
> -{
> -       struct nand_chip *chip = mtd->priv;
> -
> -       memcpy_fromio(buf, chip->IO_ADDR_R, len);
> -}
> -
> -static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
> -{
> -       struct nand_chip *chip = mtd->priv;
> -
> -       memcpy_toio(chip->IO_ADDR_W, buf, len);
> -}
> -
> -/*
>   * Return number of ecc bytes per sector according to sector size and
>   * correction capability
>   *
> @@ -1115,8 +1098,9 @@ static int __init atmel_nand_probe(struct device_d *dev)
>         if (host->board->bus_width_16)          /* 16-bit bus width */
>                 nand_chip->options |= NAND_BUSWIDTH_16;
> 
> -       nand_chip->read_buf = atmel_read_buf;
> -       nand_chip->write_buf = atmel_write_buf;
> +       /* use default */
> +       nand_chip->read_buf = NULL;
> +       nand_chip->write_buf = NULL;
> 
>         atmel_nand_enable(host);
> ------------------
> 
> After seeing your patch, I suppose the flowing patch may be works.
> The idea is use optimized read/write function when 2**ale >= pagesize
> and 2**cle >= pagesize.
> 
> I can't test it because the ale = a7, cle = a6 on my board, but
> pagesize is 2048
> 
> ------------------
> diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
> index 0477178..66cf5db 100644
> --- a/drivers/mtd/nand/atmel_nand.c
> +++ b/drivers/mtd/nand/atmel_nand.c
> @@ -1115,8 +1115,8 @@ static int __init atmel_nand_probe(struct device_d *dev)
>         if (host->board->bus_width_16)          /* 16-bit bus width */
>                 nand_chip->options |= NAND_BUSWIDTH_16;
> 
> -       nand_chip->read_buf = atmel_read_buf;
> -       nand_chip->write_buf = atmel_write_buf;
> +       nand_chip->read_buf = NULL;
> +       nand_chip->write_buf = NULL;
> 
>         atmel_nand_enable(host);
> 
> @@ -1151,6 +1151,11 @@ static int __init atmel_nand_probe(struct device_d *dev)
>                         goto err_hw_ecc;
>         }
> 
> +       if((1 << pdata->ale) >= mtd->writesize && (1 << pdata->cle) >= mtd->writesize) {
> +               nand_chip->read_buf = atmel_read_buf;
> +               nand_chip->write_buf = atmel_write_buf;
> +       }
> +
>         /* second phase scan */
>         if (nand_scan_tail(mtd)) {
>                 res = -ENXIO;
> ------------------
> 
> -- 
> Best Regards,
> zzs
> 
> 

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barebox@lists.infradead.org
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Re: [PATCH 4/4] Revert "mtd: atmel_nand: optimize read/write buffer functions"

[张忠山]

In message <20121125193208.GZ8327@game.jcrosoft.org> Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 16:11 Sun 25 Nov     , 张忠山 wrote:
> > > >
> > > > This patch resolves my problem
> > > I'm expecting to see your patches
> > >
> >
> > My first patch very simple:
> your board patch
>
The flowing is my board patch, sorry for some chinese comments.
But my board patch had nothing about drivers!

------------------------------------
diff --git a/Makefile b/Makefile
index 05b8be5..eedad07 100644
--- a/Makefile
+++ b/Makefile
@@ -681,10 +681,29 @@ endef
 quiet_cmd_objcopy = OBJCOPY $@
       cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@

+ifeq ($(CONFIG_GREATFIRST),y)
+MD5SUM_VARNAME=__md5sum__
+quiet_cmd_md5sum = MD5SUM $@
+      cmd_md5sum = (addr=$$($(NM) $(basename $@) | grep $(MD5SUM_VARNAME) | sed -e 's%\([0-9a-fA-F]\+\) \+.*%0x\1%'); \
+                    if [ "$$addr" = "" ]; then echo Can\'t find $(MD5SUM_VARNAME); exit 1; fi; \
+                    addr=$$(($$addr - $(TEXT_BASE))); \
+                    sum=$$(md5sum -b $@ | sed -e 's%\(.*\) \+\*$@%\1%') && \
+                    dd ibs=1 count=$$addr status=noxfer < $@ > $@.md5; \
+		    echo -n $$sum >> $@.md5; \
+		    addr=$$(($$addr + 32)); \
+		    dd ibs=1 skip=$$addr status=noxfer < $@ >> $@.md5; \
+		    mv $@.md5 $@; \
+                    echo -n $$sum > $@.md5 )
+else
+cmd_md5sum =
+endif
+
 OBJCOPYFLAGS_barebox.bin = -O binary

 barebox.bin: barebox FORCE
 	$(call if_changed,objcopy)
+	$(call cmd,md5sum)
+
 ifndef CONFIG_PBL_IMAGE
 	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
 endif
diff --git a/arch/arm/boards/greatfirst/com9200/Makefile b/arch/arm/boards/greatfirst/com9200/Makefile
new file mode 100644
index 0000000..eafb716
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/Makefile
@@ -0,0 +1,4 @@
+# EXTRA_CFLAGS += -DPROJECT_NAME="$(PROJECT_NAME)" -DPROJECT_VERSION="$(PROJECT_VERSION)"
+
+obj-$(CONFIG_MACH_SSR600T) += basic_init.o tiny_init.o
+obj-$(CONFIG_MACH_SSR600)  += basic_init.o init.o
diff --git a/arch/arm/boards/greatfirst/com9200/basic_init.c b/arch/arm/boards/greatfirst/com9200/basic_init.c
new file mode 100644
index 0000000..3b21b5f
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/basic_init.c
@@ -0,0 +1,55 @@
+#include <common.h>
+#include <net.h>
+#include <init.h>
+#include <environment.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <io.h>
+#include <sizes.h>
+#include <asm/hardware.h>
+#include <mach/at91_pmc.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/io.h>
+
+
+static int mem_init(void)
+{
+	at91_add_device_sdram(64 * 1024 * 1024);
+
+	return 0;
+}
+mem_initcall(mem_init);
+
+static int console_init(void)
+{
+	at91_register_uart(0, 0);
+	return 0;
+}
+console_initcall(console_init);
+
+static struct at91_ether_platform_data ether_pdata = {
+	.flags = AT91SAM_ETHER_RMII,
+	.phy_addr = 0,
+};
+
+void init_eth_device(void)
+{
+	at91_add_device_eth(0, &ether_pdata);
+}
+
+/* 此数组名至少要被引用一次，nm 才能在文件 barebox 找到它 */
+const char __md5sum__[33] = {0};
+
+void init_ip(void)
+{
+	setenv("eth0.ipaddr", "192.168.0.13");
+	setenv("eth0.serverip", "192.168.0.12");
+
+	/* 保证引用 __md5sum__ */
+	printf("md5sum=%s\n", __md5sum__);
+}
+
diff --git a/arch/arm/boards/greatfirst/com9200/basic_init.h b/arch/arm/boards/greatfirst/com9200/basic_init.h
new file mode 100644
index 0000000..087f376
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/basic_init.h
@@ -0,0 +1,17 @@
+/* ---------------------------------------- HEADER GUARD ---------------------------------------- */
+#ifndef __BASIC_INIT__H__
+#define __BASIC_INIT__H__
+#ifdef __cplusplus
+extern "C" {
+#endif
+/* ---------------------------------------- HEADER GUARD ---------------------------------------- */
+
+void init_eth_device(void);
+void init_ip(void);
+
+/* ---------------------------------------- HEADER GUARD ---------------------------------------- */
+#ifdef __cplusplus
+}
+#endif
+#endif
+/* ---------------------------------------- HEADER GUARD ---------------------------------------- */
diff --git a/arch/arm/boards/greatfirst/com9200/config.h b/arch/arm/boards/greatfirst/com9200/config.h
new file mode 100644
index 0000000..bb66654
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/config.h
@@ -0,0 +1,71 @@
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
+
+#define MASTER_PLL_MUL		39
+#define MASTER_PLL_DIV		4
+
+/* clocks */
+#define CONFIG_SYS_MOR_VAL						\
+		(AT91_PMC_MOSCEN |					\
+		 (255 << 8))		/* Main Oscillator Start-up Time */
+#define CONFIG_SYS_PLLAR_VAL						\
+		(AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ \
+		 (0x3e << 8) |		/* PLL Counter */		\
+		 (0 << 14) |		/* Divider A */			\
+		 ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV))
+
+#define CONFIG_SYS_PLLBR_VAL	0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
+/* PCK/2 = MCK Master Clock from SLOW */
+#define	CONFIG_SYS_MCKR2_VAL1		\
+		(AT91_PMC_CSS_SLOW |	\
+		 AT91RM9200_PMC_MDIV_2) \
+
+/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
+#define	CONFIG_SYS_MCKR2_VAL2		\
+		(AT91_PMC_CSS_PLLA |	\
+		 AT91_PMC_PRES_1 |	\
+		 AT91RM9200_PMC_MDIV_3 |\
+		 AT91_PMC_PDIV_1)
+
+/* flash */
+#define CONFIG_SYS_EBI_CFGR_VAL	0x00000000
+#define CONFIG_SYS_SMC_CSR0_VAL							\
+		(AT91_SMC_NWS_(4) |	/* Number of Wait States */		\
+		 AT91_SMC_WSEN |	/* Wait State Enable */			\
+		 AT91_SMC_TDF_(2) |	/* Data Float Time */			\
+		 AT91_SMC_BAT |		/* Byte Access Type */			\
+		 AT91_SMC_DBW_16)	/* Data Bus Width */
+
+/* sdram */
+#define CONFIG_SYS_PIOC_ASR_VAL	0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
+#define CONFIG_SYS_PIOC_BSR_VAL	0x00000000
+#define CONFIG_SYS_PIOC_PDR_VAL	0xFFFF0000
+#define CONFIG_SYS_EBI_CSA_VAL							\
+		(AT91_EBI_CS0A_SMC |						\
+		 AT91_EBI_CS1A_SDRAMC |						\
+		 AT91_EBI_CS3A_SMC |						\
+		 AT91_EBI_CS4A_SMC)						\
+
+/* SDRAM */
+/* SDRAMC_MR Mode register */
+/* SDRAMC_CR - Configuration register*/
+#define CONFIG_SYS_SDRC_CR_VAL							\
+		(AT91_SDRAMC_NC_9 |						\
+		 AT91_SDRAMC_NR_13 |						\
+		 AT91_SDRAMC_NB_4 |						\
+		 AT91_SDRAMC_CAS_2 |						\
+		 (1 <<  8) |		/* Write Recovery Delay */		\
+		 (12 << 12) |		/* Row Cycle Delay */			\
+		 (8 << 16) |		/* Row Precharge Delay */		\
+		 (8 << 20) |		/* Row to Column Delay */		\
+		 (1 << 24) |		/* Active to Precharge Delay */		\
+		 (2 << 28))		/* Exit Self Refresh to Active Delay */
+
+#define CONFIG_SYS_SDRC_TR_VAL	0x000002E0 /* Write refresh rate */
+
+#define BOARD_NOR_FLASH_SIZE SZ_8M
+#define TEMP_MEM_BASE 0x20100000
+#define TEMP_MEM_SIZE SZ_16M
+#endif	/* __CONFIG_H */
diff --git a/arch/arm/boards/greatfirst/com9200/env/bin/dlrun b/arch/arm/boards/greatfirst/com9200/env/bin/dlrun
new file mode 100644
index 0000000..ff6da4d
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/env/bin/dlrun
@@ -0,0 +1,14 @@
+#!/bin/sh
+
+if [ $# -ge 1 ]; then
+	name="$1"
+else
+	name=zbarebox.bin
+fi
+
+cd /
+if [ -e "/dev/tempmem" ]; then
+	tftp ${global.prj.name}-${global.prj.ver}/$name /dev/tempmem && go /dev/tempmem
+else
+	tftp ${global.prj.name}-${global.prj.ver}/$name && ./$name
+fi
diff --git a/arch/arm/boards/greatfirst/com9200/env/bin/init b/arch/arm/boards/greatfirst/com9200/env/bin/init
new file mode 100644
index 0000000..5086357
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/env/bin/init
@@ -0,0 +1,15 @@
+#!/bin/sh
+
+export PATH=/env/bin
+
+# automount tftp server based on $eth0.serverip
+mkdir -p /mnt/tftp
+automount /mnt/tftp 'mount -t tftp $eth0.serverip /mnt/tftp'
+
+nor_parts="256k(barebox),128k(bareboxenv),3M(kernel),-(root)"
+if [ -e /dev/nor0 -a -n "$nor_parts" ]; then
+	addpart /dev/nor0 $nor_parts
+fi
+
+# set a fancy prompt (if support is compiled in)
+PS1="\e[1;31m[barebox@\h]:\w\e[0m\n# "
diff --git a/arch/arm/boards/greatfirst/com9200/env/bin/update b/arch/arm/boards/greatfirst/com9200/env/bin/update
new file mode 100644
index 0000000..29bb990
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/env/bin/update
@@ -0,0 +1,13 @@
+#!/bin/sh
+
+cd /
+target="/dev/nor0.barebox"
+if [ ! -e $target ]; then
+	echo error update $target not exist!
+	exit 1
+else
+	erase $target && tftp ${global.prj.name}-${global.prj.ver}/zbarebox.bin $target && echo Update OK
+	exit 0
+fi
+echo Update Fail
+exit 1
diff --git a/arch/arm/boards/greatfirst/com9200/init.c b/arch/arm/boards/greatfirst/com9200/init.c
new file mode 100644
index 0000000..73107bf
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/init.c
@@ -0,0 +1,164 @@
+#include <common.h>
+#include <net.h>
+#include <init.h>
+#include <environment.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <io.h>
+#include <sizes.h>
+#include <asm/hardware.h>
+#include <mach/at91_pmc.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/io.h>
+
+#include <globalvar.h>
+#include <linux/stringify.h>
+#include <mach/at91rm9200_mc.h>
+
+#include "basic_init.h"
+
+static void nor_hw_init(void)
+{
+	/* 如果 barebox 在 flash 中启动，这里的代码重复了
+	 * arch/arm/mach-at91/at91rm9200_lowlevel_init.c:reset() 中的工作，但是如果使用
+	 * boot.bin->boot-zbarebox.bin 引导话，因为这两个程序中没有初始化 flash(ncs0) 的代码，所以这
+	 * 里的代码就是必需的了
+	 */
+	/* EBI Chip Select Assignment Register
+	 * 将 cs0 置为静态存储器控制器
+	 */
+	at91_sys_write(AT91_EBI_CSA, (at91_sys_read(AT91_EBI_CSA) & ~AT91_EBI_CS0A) | AT91_EBI_CS0A_SMC);
+
+	/* EBI Configuration Register
+	 * 设置 D15..0 上拉电阻
+	 */
+	at91_sys_write(AT91_EBI_CFGR, CONFIG_SYS_EBI_CFGR_VAL);
+
+	/* SMC2_CSR[0]: 16bit, 2 TDF, 4 WS */
+	at91_sys_write(AT91_SMC_CSR(0), CONFIG_SYS_SMC_CSR0_VAL);
+}
+
+static void add_nor_device(void)
+{
+	nor_hw_init();
+
+	add_cfi_flash_device(0, AT91_CHIPSELECT_0, BOARD_NOR_FLASH_SIZE, 0);
+
+/* 	if (IS_ENABLED(CONFIG_DRIVER_CFI) && cdev_by_name("nor0")) {
+ * 		devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self");
+ * 		devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0");
+ * 	}
+ */
+}
+
+#ifdef CONFIG_LED_GPIO
+struct gpio_led ek_leds[] = {
+	{
+		.gpio		= AT91_PIN_PC14,
+		.active_low	= 1,
+		.led = {
+			.name = "DS2-green",
+		},
+	}, {
+		.gpio		= AT91_PIN_PC15,
+		.active_low	= 1,
+		.led = {
+			.name = "DS3-yellow",
+		},
+	}, {
+		.gpio		= AT91_PIN_PC13,
+		.active_low	= 1,
+		.led = {
+			.name = "DS4-red",
+		},
+	}, {
+		.gpio		= AT91_PIN_PC12,
+		.active_low	= 1,
+		.led = {
+			.name = "DS5-yellow",
+		},
+	},
+};
+
+static void add_led_device(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(ek_leds); i++) {
+		at91_set_gpio_output(ek_leds[i].gpio, ek_leds[i].active_low);
+		led_gpio_register(&ek_leds[i]);
+	}
+	led_set_trigger(LED_TRIGGER_HEARTBEAT, &ek_leds[0].led);
+}
+#else
+static void add_led_device(void) {}
+#endif
+
+static struct atmel_nand_data nand_pdata = {
+	.ale		= 7,
+	.cle		= 6,
+/*	.det_pin	= ... not connected */
+	.rdy_pin	= AT91_PIN_PC2,
+	.enable_pin	= AT91_PIN_PC0,
+#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
+	.bus_width_16	= 1,
+#else
+	.bus_width_16	= 0,
+#endif
+	/* on flash bad block table */
+/* 	.on_flash_bbt	= 1,
+ */
+};
+
+static void add_nand_device(void)
+{
+	at91_add_device_nand(&nand_pdata);
+}
+
+
+static int devices_init(void)
+{
+	init_eth_device();
+
+	add_led_device();
+	add_nor_device();
+	add_nand_device();
+
+	armlinux_set_bootparams((void *)(AT91_CHIPSELECT_1 + 0x100));
+	armlinux_set_architecture(MACH_TYPE_SSR600);
+
+	return 0;
+}
+device_initcall(devices_init);
+
+static int my_init_env(void)
+{
+	globalvar_add_simple("prj.name");
+	globalvar_add_simple("prj.ver");
+	globalvar_add_simple("tmpmem.base");
+	globalvar_add_simple("tmpmem.size");
+	setenv("global.prj.name", __stringify(PROJECT_NAME));
+	setenv("global.prj.ver", __stringify(PROJECT_VERSION));
+	setenv("global.tmpmem.base", __stringify(TEMP_MEM_BASE));
+	setenv("global.tmpmem.size", __stringify(TEMP_MEM_SIZE));
+
+	/* 也可以在脚本中用 ``addpart -n /dev/mem 16M@0x20100000(tempmem)'' 添加此设备 */
+	add_mem_device("tempmem", TEMP_MEM_BASE, TEMP_MEM_SIZE, IORESOURCE_MEM_WRITEABLE);
+
+	return 0;
+}
+late_initcall(my_init_env);
+
+/* 注意： barebox 按照声明的逆序来调用同一段中的函数, 所以将其放在最后面 */
+static int late_init(void)
+{
+	init_ip();
+
+	return 0;
+}
+late_initcall(late_init);
+
diff --git a/arch/arm/boards/greatfirst/com9200/tiny_init.c b/arch/arm/boards/greatfirst/com9200/tiny_init.c
new file mode 100644
index 0000000..9cdc5d7
--- /dev/null
+++ b/arch/arm/boards/greatfirst/com9200/tiny_init.c
@@ -0,0 +1,50 @@
+#include <common.h>
+#include <net.h>
+#include <init.h>
+#include <environment.h>
+#include <asm/armlinux.h>
+#include <generated/mach-types.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <io.h>
+#include <sizes.h>
+#include <asm/hardware.h>
+#include <mach/at91_pmc.h>
+#include <mach/board.h>
+#include <mach/gpio.h>
+#include <mach/io.h>
+
+#include <linux/stringify.h>
+#include "basic_init.h"
+
+static int devices_init(void)
+{
+	init_eth_device();
+
+	return 0;
+}
+device_initcall(devices_init);
+
+#define FILENAME "zbarebox.bin"
+#define RUNADDR "0x21000000"
+#define DL "tftp "__stringify(PROJECT_NAME)"-"__stringify(PROJECT_VERSION)"/"FILENAME
+#define CP "memcpy -s"FILENAME" 0 "RUNADDR
+#define RUN "go "RUNADDR
+/* 注意： barebox 按照声明的逆序来调用同一段中的函数 */
+static int late_init(void)
+{
+	int ret;
+
+	init_ip();
+
+	ret = run_command(DL, 0);
+	if(!ret)
+		ret = run_command(CP, 0);
+	if(!ret)
+		ret = run_command(RUN, 0);
+
+	return 0;
+}
+late_initcall(late_init);
+
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 2999473..ff5e682 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -12,6 +12,9 @@ targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S \
 extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern zbarebox.map

 ifeq ($(CONFIG_GREATFIRST),y)
+quiet_cmd_addmd5sum = ADDMD5SUM $@
+      cmd_addmd5sum = ( cp $@ $@.bak; cat $(objtree)/barebox.bin.md5 >> $@ )
+
 CPFILENAME = $(TFTP_ROOT_DIR)/$(PROJECT_NAME)-$(PROJECT_VERSION)/$(if $(CONFIG_TINY),boot-)$(notdir $@)
 DEFCFGNAME = $(PROJECT_NAME)$(if $(CONFIG_TINY),t)$(if $(CONFIG_BOARD_CPU),-$(CONFIG_BOARD_CPU))_defconfig
 GFPOSTPROC = \
@@ -21,11 +24,13 @@ GFPOSTPROC = \
 	   echo "  FILE-SIZE: $$actual bytes" 1>&2
 else
 GFPOSTPROC  = :
+cmd_addmd5sum =
 endif

 $(obj)/zbarebox.bin:	$(obj)/zbarebox FORCE
 	$(call if_changed,objcopy)
 	$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+	$(call cmd,addmd5sum)
 	@$(GFPOSTPROC)
 	$(Q)$(kecho) '  Barebox: $@ is ready'
------------------------------------

-- 
Best Regards,
zzs



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barebox@lists.infradead.org
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Re: [PATCH 0/4] at91: some fixes

[Sascha Hauer]

On Fri, Nov 23, 2012 at 04:52:24PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> HI,
> 
> 	some fixe for at91
> 
> 	they are needed for at91sam9n12 support
> 
> The following changes since commit c7a729aefe13104b6f3a9f2150a9e993bb510d43:
> 
>   Merge branch 'for-next/m25p80' (2012-11-21 11:54:34 +0100)
> 
> are available in the git repository at:
> 
> 
>   git://git.jcrosoft.org/barebox.git delivery/at91_fixes

Applied, thanks

Sascha

> 
> for you to fetch changes up to 02d37b5d4598cd3ffea4730aa027c8c04ab1f58d:
> 
>   Revert "mtd: atmel_nand: optimize read/write buffer functions" (2012-11-22 02:21:14 +0800)
> 
> ----------------------------------------------------------------
> Jean-Christophe PLAGNIOL-VILLARD (4):
>       at91: fix timer rate
>       atmel_nand: fix pmecc timeout
>       at91: clock: check overclock for sam9260/9261/9263/9rl
>       Revert "mtd: atmel_nand: optimize read/write buffer functions"
> 
>  arch/arm/mach-at91/at91sam926x_time.c |    7 ++++++-
>  arch/arm/mach-at91/clock.c            |   12 ++++++++++++
>  drivers/mtd/nand/atmel_nand.c         |   33 +++++++++++++++++++++++++--------
>  drivers/mtd/nand/atmel_nand_ecc.h     |    2 +-
>  4 files changed, 44 insertions(+), 10 deletions(-)
> 
> Best Regards,
> J.
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
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