* [PATCH 0/6] at91: mux cleanup and switch to gpiolib
@ 2012-12-20 14:29 Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
2012-12-22 18:39 ` [PATCH 0/6] at91: mux cleanup and " Sascha Hauer
0 siblings, 2 replies; 8+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-12-20 14:29 UTC (permalink / raw)
To: barebox
Hi,
this patch series update the mux api of the at91 and use a part of the
pinctrl from the kernel and switch tot hte gpiolib
we also drop the fact taht a gpio is invalid if 0
This pull depends on the gpiolib one
The following changes since commit b1e244b763731fb16fee15a93f45fc8c5455628a:
gpiolib: add command to dump the current gpio status (2012-12-18 23:09:05 +0800)
are available in the git repository at:
git://git.jcrosoft.org/barebox.git delivery/at91_gpio
for you to fetch changes up to 35fc9a4f9eb6eff72aa0bed5cad052f7e11a03ab:
at91: switch to gpiolib (2012-12-18 23:09:08 +0800)
----------------------------------------------------------------
Jean-Christophe PLAGNIOL-VILLARD (6):
at91: use gpio_is_valid to check gpio
at91: use -EINVAL for invalid gpio
at91: drop PIN_BASE offset for gpio
at91: gpio: switch to device driver
at91: gpio: switch to ops
at91: switch to gpiolib
arch/arm/Kconfig | 2 +-
arch/arm/boards/at91rm9200ek/init.c | 1 +
arch/arm/boards/at91sam9260ek/init.c | 3 +-
arch/arm/boards/at91sam9261ek/init.c | 2 +-
arch/arm/boards/at91sam9263ek/init.c | 4 +-
arch/arm/boards/at91sam9m10g45ek/init.c | 2 +-
arch/arm/boards/at91sam9n12ek/init.c | 4 +-
arch/arm/boards/at91sam9x5ek/init.c | 2 +-
arch/arm/boards/dss11/init.c | 3 +-
arch/arm/boards/mmccpu/init.c | 2 +-
arch/arm/boards/pm9261/init.c | 2 +-
arch/arm/boards/pm9263/init.c | 4 +-
arch/arm/boards/pm9g45/init.c | 6 +-
arch/arm/boards/qil-a9260/init.c | 4 +-
arch/arm/boards/tny-a926x/init.c | 4 +-
arch/arm/boards/usb-a926x/init.c | 3 +-
arch/arm/mach-at91/at91rm9200.c | 46 ++++++-------
arch/arm/mach-at91/at91rm9200_devices.c | 10 +--
arch/arm/mach-at91/at91sam9260.c | 34 ++++------
arch/arm/mach-at91/at91sam9260_devices.c | 14 ++--
arch/arm/mach-at91/at91sam9261.c | 36 ++++------
arch/arm/mach-at91/at91sam9261_devices.c | 14 ++--
arch/arm/mach-at91/at91sam9263.c | 44 +++++-------
arch/arm/mach-at91/at91sam9263_devices.c | 16 ++---
arch/arm/mach-at91/at91sam9g45.c | 43 +++++-------
arch/arm/mach-at91/at91sam9g45_devices.c | 14 ++--
arch/arm/mach-at91/at91sam9n12.c | 38 +++++------
arch/arm/mach-at91/at91sam9n12_devices.c | 14 ++--
arch/arm/mach-at91/at91sam9x5.c | 38 +++++------
arch/arm/mach-at91/at91sam9x5_devices.c | 14 ++--
arch/arm/mach-at91/generic.h | 12 ++++
arch/arm/mach-at91/gpio.c | 530 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------------------------------------
arch/arm/mach-at91/include/mach/board.h | 12 ++--
arch/arm/mach-at91/include/mach/gpio.h | 402 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------
drivers/mtd/nand/atmel_nand.c | 4 +-
drivers/usb/gadget/at91_udc.c | 4 +-
36 files changed, 773 insertions(+), 614 deletions(-)
Best Regards,
J.
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/6] at91: use gpio_is_valid to check gpio
2012-12-20 14:29 [PATCH 0/6] at91: mux cleanup and switch to gpiolib Jean-Christophe PLAGNIOL-VILLARD
@ 2012-12-20 14:31 ` Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 2/6] at91: use -EINVAL for invalid gpio Jean-Christophe PLAGNIOL-VILLARD
` (4 more replies)
2012-12-22 18:39 ` [PATCH 0/6] at91: mux cleanup and " Sascha Hauer
1 sibling, 5 replies; 8+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-12-20 14:31 UTC (permalink / raw)
To: barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/mach-at91/at91rm9200_devices.c | 10 +++++-----
arch/arm/mach-at91/at91sam9260_devices.c | 14 +++++++-------
arch/arm/mach-at91/at91sam9261_devices.c | 14 +++++++-------
arch/arm/mach-at91/at91sam9263_devices.c | 16 ++++++++--------
arch/arm/mach-at91/at91sam9g45_devices.c | 14 +++++++-------
arch/arm/mach-at91/at91sam9n12_devices.c | 14 +++++++-------
arch/arm/mach-at91/at91sam9x5_devices.c | 14 +++++++-------
drivers/mtd/nand/atmel_nand.c | 4 ++--
drivers/usb/gadget/at91_udc.c | 2 +-
9 files changed, 51 insertions(+), 51 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 4751664..4109172 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -54,12 +54,12 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
#ifdef CONFIG_USB_GADGET_DRIVER_AT91
void __init at91_add_device_udc(struct at91_udc_data *data)
{
- if (data->vbus_pin > 0) {
+ if (gpio_is_valid(data->vbus_pin)) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
- if (data->pullup_pin > 0)
+ if (gpio_is_valid(data->pullup_pin))
at91_set_gpio_output(data->pullup_pin, 0);
add_generic_device("at91_udc", DEVICE_ID_DYNAMIC, NULL, AT91RM9200_BASE_UDP,
@@ -134,15 +134,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
);
/* enable pin */
- if (data->enable_pin)
+ if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
- if (data->rdy_pin)
+ if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
- if (data->det_pin)
+ if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 04a9c5f..a893a95 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -59,7 +59,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
#ifdef CONFIG_USB_GADGET_DRIVER_AT91
void __init at91_add_device_udc(struct at91_udc_data *data)
{
- if (data->vbus_pin > 0) {
+ if (gpio_is_valid(data->vbus_pin)) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
@@ -137,15 +137,15 @@ void at91_add_device_nand(struct atmel_nand_data *data)
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* enable pin */
- if (data->enable_pin)
+ if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
- if (data->rdy_pin)
+ if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
- if (data->det_pin)
+ if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", 0, nand_resources,
@@ -221,7 +221,7 @@ void __init at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata
cs_pin = pdata->chipselect[i];
/* enable chip-select pin */
- if (cs_pin > 0)
+ if (gpio_is_valid(cs_pin))
at91_set_gpio_output(cs_pin, 1);
}
@@ -346,12 +346,12 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
return;
/* input/irq */
- if (data->detect_pin) {
+ if (gpio_is_valid(data->detect_pin)) {
at91_set_gpio_input(data->detect_pin, 1);
at91_set_deglitch(data->detect_pin, 1);
}
- if (data->wp_pin)
+ if (gpio_is_valid(data->wp_pin))
at91_set_gpio_input(data->wp_pin, 1);
/* CLK */
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 68d75c3..becd25f 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -62,7 +62,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
#ifdef CONFIG_USB_GADGET_DRIVER_AT91
void __init at91_add_device_udc(struct at91_udc_data *data)
{
- if (data->vbus_pin > 0) {
+ if (gpio_is_valid(data->vbus_pin)) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
@@ -86,15 +86,15 @@ void at91_add_device_nand(struct atmel_nand_data *data)
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* enable pin */
- if (data->enable_pin)
+ if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
- if (data->rdy_pin)
+ if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
- if (data->det_pin)
+ if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
@@ -172,7 +172,7 @@ void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
cs_pin = pdata->chipselect[i];
/* enable chip-select pin */
- if (cs_pin > 0)
+ if (gpio_is_valid(cs_pin))
at91_set_gpio_output(cs_pin, 1);
}
@@ -260,12 +260,12 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
return;
/* input/irq */
- if (data->detect_pin) {
+ if (gpio_is_valid(data->detect_pin)) {
at91_set_gpio_input(data->detect_pin, 1);
at91_set_deglitch(data->detect_pin, 1);
}
- if (data->wp_pin)
+ if (gpio_is_valid(data->wp_pin))
at91_set_gpio_input(data->wp_pin, 1);
/* CLK */
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index fcd157d..b72cc5a 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -49,7 +49,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
/* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) {
- if (data->vbus_pin[i])
+ if (gpio_is_valid(data->vbus_pin[i]))
at91_set_gpio_output(data->vbus_pin[i], 0);
}
@@ -67,7 +67,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
#ifdef CONFIG_USB_GADGET_DRIVER_AT91
void __init at91_add_device_udc(struct at91_udc_data *data)
{
- if (data->vbus_pin > 0) {
+ if (gpio_is_valid(data->vbus_pin)) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
@@ -139,15 +139,15 @@ void at91_add_device_nand(struct atmel_nand_data *data)
at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
/* enable pin */
- if (data->enable_pin)
+ if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
- if (data->rdy_pin)
+ if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
- if (data->det_pin)
+ if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", DEVICE_ID_DYNAMIC, nand_resources,
@@ -222,7 +222,7 @@ void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
cs_pin = pdata->chipselect[i];
/* enable chip-select pin */
- if (cs_pin > 0)
+ if (gpio_is_valid(cs_pin))
at91_set_gpio_output(cs_pin, 1);
}
@@ -310,12 +310,12 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
return;
/* input/irq */
- if (data->detect_pin) {
+ if (gpio_is_valid(data->detect_pin)) {
at91_set_gpio_input(data->detect_pin, 1);
at91_set_deglitch(data->detect_pin, 1);
}
- if (data->wp_pin)
+ if (gpio_is_valid(data->wp_pin))
at91_set_gpio_input(data->wp_pin, 1);
if (mmc_id == 0) { /* MCI0 */
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 2529404..c5f99b1 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -43,7 +43,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
/* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) {
- if (data->vbus_pin[i])
+ if (gpio_is_valid(data->vbus_pin[i]))
at91_set_gpio_output(data->vbus_pin[i], 0);
}
@@ -115,15 +115,15 @@ void at91_add_device_nand(struct atmel_nand_data *data)
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* enable pin */
- if (data->enable_pin)
+ if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
- if (data->rdy_pin)
+ if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
- if (data->det_pin)
+ if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", DEVICE_ID_DYNAMIC, nand_resources,
@@ -256,12 +256,12 @@ void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
return;
/* input/irq */
- if (data->detect_pin) {
+ if (gpio_is_valid(data->detect_pin)) {
at91_set_gpio_input(data->detect_pin, 1);
at91_set_deglitch(data->detect_pin, 1);
}
- if (data->wp_pin)
+ if (gpio_is_valid(data->wp_pin))
at91_set_gpio_input(data->wp_pin, 1);
if (mmc_id == 0) { /* MCI0 */
@@ -348,7 +348,7 @@ void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
cs_pin = pdata->chipselect[i];
/* enable chip-select pin */
- if (cs_pin > 0)
+ if (gpio_is_valid(cs_pin))
at91_set_gpio_output(cs_pin, 1);
}
diff --git a/arch/arm/mach-at91/at91sam9n12_devices.c b/arch/arm/mach-at91/at91sam9n12_devices.c
index 33baf41..3f41f3e 100644
--- a/arch/arm/mach-at91/at91sam9n12_devices.c
+++ b/arch/arm/mach-at91/at91sam9n12_devices.c
@@ -45,7 +45,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
/* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) {
- if (data->vbus_pin[i])
+ if (gpio_is_valid(data->vbus_pin[i]))
at91_set_gpio_output(data->vbus_pin[i], 0);
}
@@ -63,7 +63,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
#ifdef CONFIG_USB_GADGET_DRIVER_AT91
void __init at91_add_device_udc(struct at91_udc_data *data)
{
- if (data->vbus_pin > 0) {
+ if (gpio_is_valid(data->vbus_pin)) {
at91_set_gpio_input(data->vbus_pin, 0);
at91_set_deglitch(data->vbus_pin, 1);
}
@@ -87,11 +87,11 @@ void __init at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *da
return;
/* input/irq */
- if (data->detect_pin) {
+ if (gpio_is_valid(data->detect_pin)) {
at91_set_gpio_input(data->detect_pin, 1);
at91_set_deglitch(data->detect_pin, 1);
}
- if (data->wp_pin)
+ if (gpio_is_valid(data->wp_pin))
at91_set_gpio_input(data->wp_pin, 1);
/* CLK */
@@ -167,15 +167,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
at91_sys_write(AT91_MATRIX_EBICSA, csa);
/* enable pin */
- if (data->enable_pin)
+ if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
- if (data->rdy_pin)
+ if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
- if (data->det_pin)
+ if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
/* configure NANDOE */
diff --git a/arch/arm/mach-at91/at91sam9x5_devices.c b/arch/arm/mach-at91/at91sam9x5_devices.c
index c2b64e9..e92fa0d 100644
--- a/arch/arm/mach-at91/at91sam9x5_devices.c
+++ b/arch/arm/mach-at91/at91sam9x5_devices.c
@@ -44,7 +44,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
/* Enable VBus control for UHP ports */
for (i = 0; i < data->ports; i++) {
- if (data->vbus_pin[i])
+ if (gpio_is_valid(data->vbus_pin[i]))
at91_set_gpio_output(data->vbus_pin[i], 0);
}
@@ -137,11 +137,11 @@ void __init at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *da
return;
/* input/irq */
- if (data->detect_pin) {
+ if (gpio_is_valid(data->detect_pin)) {
at91_set_gpio_input(data->detect_pin, 1);
at91_set_deglitch(data->detect_pin, 1);
}
- if (data->wp_pin)
+ if (gpio_is_valid(data->wp_pin))
at91_set_gpio_input(data->wp_pin, 1);
if (mmc_id == 0) { /* MCI0 */
@@ -226,15 +226,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data)
data->pmecc_lookup_table_offset = 0x8000;
/* enable pin */
- if (data->enable_pin)
+ if (gpio_is_valid(data->enable_pin))
at91_set_gpio_output(data->enable_pin, 1);
/* ready/busy pin */
- if (data->rdy_pin)
+ if (gpio_is_valid(data->rdy_pin))
at91_set_gpio_input(data->rdy_pin, 1);
/* card detect pin */
- if (data->det_pin)
+ if (gpio_is_valid(data->det_pin))
at91_set_gpio_input(data->det_pin, 1);
add_generic_device_res("atmel_nand", 0, nand_resources,
@@ -336,7 +336,7 @@ void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
cs_pin = pdata->chipselect[i];
/* enable chip-select pin */
- if (cs_pin > 0)
+ if (gpio_is_valid(cs_pin))
at91_set_gpio_output(cs_pin, 1);
}
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 69e8171..7e0de51 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1114,7 +1114,7 @@ static int __init atmel_nand_probe(struct device_d *dev)
nand_chip->IO_ADDR_W = host->io_base;
nand_chip->cmd_ctrl = atmel_nand_cmd_ctrl;
- if (host->board->rdy_pin)
+ if (gpio_is_valid(host->board->rdy_pin))
nand_chip->dev_ready = atmel_nand_device_ready;
nand_chip->ecc.mode = NAND_ECC_SOFT;
@@ -1137,7 +1137,7 @@ static int __init atmel_nand_probe(struct device_d *dev)
atmel_nand_enable(host);
- if (host->board->det_pin) {
+ if (gpio_is_valid(host->board->det_pin)) {
if (gpio_get_value(host->board->det_pin)) {
printk("No SmartMedia card inserted.\n");
res = ENXIO;
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 80d6de0..a2cd99b 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1496,7 +1496,7 @@ static int __init at91udc_probe(struct device_d *dev)
at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff);
clk_disable(udc->iclk);
- if (udc->board.vbus_pin > 0) {
+ if (gpio_is_valid(udc->board.vbus_pin)) {
/*
* Get the initial state of VBUS - we cannot expect
* a pending interrupt.
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/6] at91: use -EINVAL for invalid gpio
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
@ 2012-12-20 14:31 ` Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 3/6] at91: drop PIN_BASE offset for gpio Jean-Christophe PLAGNIOL-VILLARD
` (3 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-12-20 14:31 UTC (permalink / raw)
To: barebox
switch gpio type from u8 to int in the data struct
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/boards/at91rm9200ek/init.c | 1 +
arch/arm/boards/at91sam9260ek/init.c | 3 ++-
arch/arm/boards/at91sam9261ek/init.c | 2 +-
arch/arm/boards/at91sam9263ek/init.c | 2 +-
arch/arm/boards/at91sam9m10g45ek/init.c | 2 +-
arch/arm/boards/at91sam9n12ek/init.c | 4 ++--
arch/arm/boards/at91sam9x5ek/init.c | 2 +-
arch/arm/boards/dss11/init.c | 3 ++-
arch/arm/boards/pm9261/init.c | 2 +-
arch/arm/boards/pm9263/init.c | 2 +-
arch/arm/boards/pm9g45/init.c | 4 ++--
arch/arm/boards/qil-a9260/init.c | 4 ++--
arch/arm/boards/tny-a926x/init.c | 4 ++--
arch/arm/boards/usb-a926x/init.c | 3 ++-
arch/arm/mach-at91/include/mach/board.h | 12 ++++++------
15 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/arch/arm/boards/at91rm9200ek/init.c b/arch/arm/boards/at91rm9200ek/init.c
index f5d242f..a40d3b9 100644
--- a/arch/arm/boards/at91rm9200ek/init.c
+++ b/arch/arm/boards/at91rm9200ek/init.c
@@ -47,6 +47,7 @@ mem_initcall(at91rm9200ek_mem_init);
static struct at91_usbh_data ek_usbh_data = {
.ports = 2,
+ .vbus_pin = { -EINVAL, -EINVAL },
};
#ifdef CONFIG_LED_GPIO
diff --git a/arch/arm/boards/at91sam9260ek/init.c b/arch/arm/boards/at91sam9260ek/init.c
index e9bfee6..5816a1d 100644
--- a/arch/arm/boards/at91sam9260ek/init.c
+++ b/arch/arm/boards/at91sam9260ek/init.c
@@ -59,7 +59,7 @@ static void ek_set_board_type(void)
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PC13,
.enable_pin = AT91_PIN_PC14,
#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
@@ -187,6 +187,7 @@ static void ek_usb_add_device_mci(void) {}
*/
static struct at91_usbh_data __initdata ek_usbh_data = {
.ports = 2,
+ .vbus_pin = { -EINVAL, -EINVAL },
};
/*
diff --git a/arch/arm/boards/at91sam9261ek/init.c b/arch/arm/boards/at91sam9261ek/init.c
index 8842cfe..0020c92 100644
--- a/arch/arm/boards/at91sam9261ek/init.c
+++ b/arch/arm/boards/at91sam9261ek/init.c
@@ -42,7 +42,7 @@
static struct atmel_nand_data nand_pdata = {
.ale = 22,
.cle = 21,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PC15,
.enable_pin = AT91_PIN_PC14,
#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
diff --git a/arch/arm/boards/at91sam9263ek/init.c b/arch/arm/boards/at91sam9263ek/init.c
index 45a30fd..50e4009 100644
--- a/arch/arm/boards/at91sam9263ek/init.c
+++ b/arch/arm/boards/at91sam9263ek/init.c
@@ -40,7 +40,7 @@
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PA22,
.enable_pin = AT91_PIN_PD15,
#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c b/arch/arm/boards/at91sam9m10g45ek/init.c
index 4b6d5c4..7d01d96 100644
--- a/arch/arm/boards/at91sam9m10g45ek/init.c
+++ b/arch/arm/boards/at91sam9m10g45ek/init.c
@@ -63,7 +63,7 @@ static void ek_set_board_revision(void)
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PC8,
.enable_pin = AT91_PIN_PC14,
#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
diff --git a/arch/arm/boards/at91sam9n12ek/init.c b/arch/arm/boards/at91sam9n12ek/init.c
index 3d4ab5b..51c4fb0 100644
--- a/arch/arm/boards/at91sam9n12ek/init.c
+++ b/arch/arm/boards/at91sam9n12ek/init.c
@@ -44,7 +44,7 @@
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
- .det_pin = 0,
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PD5,
.enable_pin = AT91_PIN_PD4,
.ecc_mode = NAND_ECC_HW,
@@ -186,7 +186,7 @@ static void ek_add_device_spi(void)
*/
static struct at91_udc_data __initdata ek_udc_data = {
.vbus_pin = AT91_PIN_PB16,
- .pullup_pin = 0, /* pull-up driven by UDC */
+ .pullup_pin = -EINVAL, /* pull-up driven by UDC */
};
struct gpio_led leds[] = {
diff --git a/arch/arm/boards/at91sam9x5ek/init.c b/arch/arm/boards/at91sam9x5ek/init.c
index ba5bc47..39765e0 100644
--- a/arch/arm/boards/at91sam9x5ek/init.c
+++ b/arch/arm/boards/at91sam9x5ek/init.c
@@ -53,7 +53,7 @@ struct w1_gpio_platform_data w1_pdata = {
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
- .det_pin = 0,
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PD5,
.enable_pin = AT91_PIN_PD4,
.ecc_mode = NAND_ECC_HW,
diff --git a/arch/arm/boards/dss11/init.c b/arch/arm/boards/dss11/init.c
index aacef33..27c1ec7 100644
--- a/arch/arm/boards/dss11/init.c
+++ b/arch/arm/boards/dss11/init.c
@@ -38,7 +38,7 @@
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.ecc_mode = NAND_ECC_HW,
.rdy_pin = AT91_PIN_PC13,
.enable_pin = AT91_PIN_PC14,
@@ -117,6 +117,7 @@ static struct atmel_mci_platform_data dss11_mci_data = {
static struct at91_usbh_data dss11_usbh_data = {
.ports = 2,
+ .vbus_pin = { -EINVAL, -EINVAL },
};
static int dss11_mem_init(void)
diff --git a/arch/arm/boards/pm9261/init.c b/arch/arm/boards/pm9261/init.c
index 6d2ac98..a91fa7a 100644
--- a/arch/arm/boards/pm9261/init.c
+++ b/arch/arm/boards/pm9261/init.c
@@ -47,7 +47,7 @@ struct w1_gpio_platform_data w1_pdata = {
static struct atmel_nand_data nand_pdata = {
.ale = 22,
.cle = 21,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PA16,
.enable_pin = AT91_PIN_PC14,
#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
diff --git a/arch/arm/boards/pm9263/init.c b/arch/arm/boards/pm9263/init.c
index 486df9a..6a92a67 100644
--- a/arch/arm/boards/pm9263/init.c
+++ b/arch/arm/boards/pm9263/init.c
@@ -47,7 +47,7 @@ struct w1_gpio_platform_data w1_pdata = {
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PB30,
.enable_pin = AT91_PIN_PD15,
#if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
diff --git a/arch/arm/boards/pm9g45/init.c b/arch/arm/boards/pm9g45/init.c
index a79b128..a974139 100644
--- a/arch/arm/boards/pm9g45/init.c
+++ b/arch/arm/boards/pm9g45/init.c
@@ -46,7 +46,7 @@ struct w1_gpio_platform_data w1_pdata = {
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PD3,
.enable_pin = AT91_PIN_PC14,
.bus_width_16 = 0,
@@ -102,7 +102,7 @@ static void pm9g45_add_device_mci(void) {}
#ifdef CONFIG_USB_OHCI_AT91
static struct at91_usbh_data __initdata usbh_data = {
.ports = 2,
- .vbus_pin = { AT91_PIN_PD0, 0x0 },
+ .vbus_pin = { AT91_PIN_PD0, -EINVAL },
};
static void __init pm9g45_add_device_usbh(void)
diff --git a/arch/arm/boards/qil-a9260/init.c b/arch/arm/boards/qil-a9260/init.c
index 3bec4e2..a06566c 100644
--- a/arch/arm/boards/qil-a9260/init.c
+++ b/arch/arm/boards/qil-a9260/init.c
@@ -32,7 +32,7 @@
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
- .det_pin = 0,
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PC13,
.enable_pin = AT91_PIN_PC14,
.on_flash_bbt = 1,
@@ -120,7 +120,7 @@ static void qil_a9260_phy_reset(void)
*/
static struct at91_udc_data __initdata ek_udc_data = {
.vbus_pin = AT91_PIN_PC5,
- .pullup_pin = 0, /* pull-up driven by UDC */
+ .pullup_pin = -EINVAL, /* pull-up driven by UDC */
};
static void __init qil_a9260_add_device_mb(void)
diff --git a/arch/arm/boards/tny-a926x/init.c b/arch/arm/boards/tny-a926x/init.c
index 98f1d2b..e30cccf 100644
--- a/arch/arm/boards/tny-a926x/init.c
+++ b/arch/arm/boards/tny-a926x/init.c
@@ -52,7 +52,7 @@ static void tny_a9260_set_board_type(void)
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
- .det_pin = 0,
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PC13,
.enable_pin = AT91_PIN_PC14,
.on_flash_bbt = 1,
@@ -132,7 +132,7 @@ static void __init ek_add_device_macb(void) {}
*/
static struct at91_udc_data __initdata ek_udc_data = {
.vbus_pin = AT91_PIN_PB30,
- .pullup_pin = 0, /* pull-up driven by UDC */
+ .pullup_pin = -EINVAL, /* pull-up driven by UDC */
};
static struct spi_eeprom eeprom = {
diff --git a/arch/arm/boards/usb-a926x/init.c b/arch/arm/boards/usb-a926x/init.c
index 5190aca..dd136da 100644
--- a/arch/arm/boards/usb-a926x/init.c
+++ b/arch/arm/boards/usb-a926x/init.c
@@ -55,7 +55,7 @@ static void usb_a9260_set_board_type(void)
static struct atmel_nand_data nand_pdata = {
.ale = 21,
.cle = 22,
-/* .det_pin = ... not connected */
+ .det_pin = -EINVAL,
.rdy_pin = AT91_PIN_PC13,
.enable_pin = AT91_PIN_PC14,
.on_flash_bbt = 1,
@@ -208,6 +208,7 @@ static void usb_a9260_add_device_mci(void) {}
static struct at91_usbh_data ek_usbh_data = {
.ports = 2,
+ .vbus_pin = { -EINVAL, -EINVAL },
};
/*
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h
index d4a3e3b..b18f1c0 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -28,7 +28,7 @@
/* USB Host */
struct at91_usbh_data {
u8 ports; /* number of ports on root hub */
- u8 vbus_pin[2]; /* port power-control pin */
+ int vbus_pin[2]; /* port power-control pin */
};
extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data);
@@ -46,9 +46,9 @@ extern void __init at91_add_device_udc(struct at91_udc_data *data);
/* NAND / SmartMedia */
struct atmel_nand_data {
- u8 enable_pin; /* chip enable */
- u8 det_pin; /* card detect */
- u8 rdy_pin; /* ready/busy */
+ int enable_pin; /* chip enable */
+ int det_pin; /* card detect */
+ int rdy_pin; /* ready/busy */
u8 ale; /* address line number connected to ALE */
u8 cle; /* address line number connected to CLE */
u8 bus_width_16; /* buswidth is 16 bit */
@@ -148,8 +148,8 @@ struct atmel_mci_platform_data {
unsigned slot_b;
unsigned bus_width;
unsigned host_caps; /* MCI_MODE_* from mci.h */
- unsigned detect_pin;
- unsigned wp_pin;
+ int detect_pin;
+ int wp_pin;
};
void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data);
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/6] at91: drop PIN_BASE offset for gpio
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 2/6] at91: use -EINVAL for invalid gpio Jean-Christophe PLAGNIOL-VILLARD
@ 2012-12-20 14:31 ` Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 4/6] at91: gpio: switch to device driver Jean-Christophe PLAGNIOL-VILLARD
` (2 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-12-20 14:31 UTC (permalink / raw)
To: barebox
so 0 is a valid gpio as cleanned in the kernel
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/mach-at91/gpio.c | 2 -
arch/arm/mach-at91/include/mach/gpio.h | 530 ++++++++++++++++----------------
2 files changed, 263 insertions(+), 269 deletions(-)
rewrite arch/arm/mach-at91/include/mach/gpio.h (73%)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index c35f00e..cd0136f 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -38,7 +38,6 @@ static struct at91_gpio_bank *gpio;
static inline void __iomem *pin_to_controller(unsigned pin)
{
- pin -= PIN_BASE;
pin /= 32;
if (likely(pin < gpio_banks))
return gpio[pin].regbase;
@@ -48,7 +47,6 @@ static inline void __iomem *pin_to_controller(unsigned pin)
static inline unsigned pin_to_mask(unsigned pin)
{
- pin -= PIN_BASE;
return 1 << (pin % 32);
}
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
dissimilarity index 73%
index fa695a6..200a852 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -1,267 +1,263 @@
-/*
- * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h]
- *
- * Copyright (C) 2005 HP Labs
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#ifndef __ASM_ARCH_AT91_GPIO_H
-#define __ASM_ARCH_AT91_GPIO_H
-
-#include <io.h>
-#include <asm-generic/errno.h>
-#include <mach/at91_pio.h>
-#include <mach/hardware.h>
-
-#define PIN_BASE 32
-
-/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
-
-#define ARCH_NR_GPIOS 256
-
-static inline int gpio_is_valid(int gpio)
-{
- if (gpio < 1)
- return 0;
- if (gpio < ARCH_NR_GPIOS)
- return 1;
- return 0;
-}
-
-#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0)
-#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1)
-#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2)
-#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3)
-#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4)
-#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5)
-#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6)
-#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7)
-#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8)
-#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9)
-#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10)
-#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11)
-#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12)
-#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13)
-#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14)
-#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15)
-#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16)
-#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17)
-#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18)
-#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19)
-#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20)
-#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21)
-#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22)
-#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23)
-#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24)
-#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25)
-#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26)
-#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27)
-#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28)
-#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29)
-#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30)
-#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31)
-
-#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0)
-#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1)
-#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2)
-#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3)
-#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4)
-#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5)
-#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6)
-#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7)
-#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8)
-#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9)
-#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10)
-#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11)
-#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12)
-#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13)
-#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14)
-#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15)
-#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16)
-#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17)
-#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18)
-#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19)
-#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20)
-#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21)
-#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22)
-#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23)
-#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24)
-#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25)
-#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26)
-#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27)
-#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28)
-#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29)
-#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30)
-#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31)
-
-#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0)
-#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1)
-#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2)
-#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3)
-#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4)
-#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5)
-#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6)
-#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7)
-#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8)
-#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9)
-#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10)
-#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11)
-#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12)
-#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13)
-#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14)
-#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15)
-#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16)
-#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17)
-#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18)
-#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19)
-#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20)
-#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21)
-#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22)
-#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23)
-#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24)
-#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25)
-#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26)
-#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27)
-#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28)
-#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29)
-#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30)
-#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31)
-
-#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0)
-#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1)
-#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2)
-#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3)
-#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4)
-#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5)
-#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6)
-#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7)
-#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8)
-#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9)
-#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10)
-#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11)
-#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12)
-#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13)
-#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14)
-#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15)
-#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16)
-#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17)
-#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18)
-#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19)
-#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20)
-#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21)
-#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22)
-#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23)
-#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24)
-#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25)
-#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26)
-#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27)
-#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28)
-#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29)
-#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30)
-#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31)
-
-#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0)
-#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1)
-#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2)
-#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3)
-#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4)
-#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5)
-#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6)
-#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7)
-#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8)
-#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9)
-#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10)
-#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11)
-#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12)
-#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13)
-#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14)
-#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15)
-#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16)
-#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17)
-#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18)
-#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19)
-#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20)
-#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21)
-#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22)
-#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23)
-#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24)
-#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25)
-#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26)
-#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27)
-#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28)
-#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29)
-#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30)
-#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31)
-
-/*
- * mux the pin to the "GPIO" peripheral role.
- */
-int at91_set_GPIO_periph(unsigned pin, int use_pullup);
-
-
-/*
- * mux the pin to the "A" internal peripheral role.
- */
-int at91_set_A_periph(unsigned pin, int use_pullup);
-
-/*
- * mux the pin to the "B" internal peripheral role.
- */
-int at91_set_B_periph(unsigned pin, int use_pullup);
-/*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
- * configure it for an input.
- */
-int at91_set_gpio_input(unsigned pin, int use_pullup);
-
-/*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
- * and configure it for an output.
- */
-int at91_set_gpio_output(unsigned pin, int value);
-
-/*
- * enable/disable the glitch filter; mostly used with IRQ handling.
- */
-int at91_set_deglitch(unsigned pin, int is_on);
-
-/*
- * enable/disable the multi-driver; This is only valid for output and
- * allows the output pin to run as an open collector output.
- */
-int at91_set_multi_drive(unsigned pin, int is_on);
-
-/*
- * assuming the pin is muxed as a gpio output, set its value.
- */
-int at91_set_gpio_value(unsigned pin, int value);
-
-extern int at91_set_C_periph(unsigned pin, int use_pullup);
-extern int at91_set_D_periph(unsigned pin, int use_pullup);
-extern int at91_set_debounce(unsigned pin, int is_on, int div);
-extern int at91_set_pulldown(unsigned pin, int is_on);
-extern int at91_disable_schmitt_trig(unsigned pin);
-
-/*
- * read the pin's value (works even if it's not muxed as a gpio).
- */
-int at91_get_gpio_value(unsigned pin);
-
-struct at91_gpio_bank {
- void __iomem *regbase; /* base of register bank */
- struct clk *clock;
-};
-
-extern int at91_gpio_init(struct at91_gpio_bank *data, int nr_banks);
-
-extern int gpio_direction_input(unsigned gpio);
-extern int gpio_direction_output(unsigned gpio, int value);
-#define gpio_get_value at91_get_gpio_value
-#define gpio_set_value at91_set_gpio_value
-
-#endif /* __ASM_ARCH_AT91SAM9_GPIO_H */
+/*
+ * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h]
+ *
+ * Copyright (C) 2005 HP Labs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_ARCH_AT91_GPIO_H
+#define __ASM_ARCH_AT91_GPIO_H
+
+#include <io.h>
+#include <asm-generic/errno.h>
+#include <mach/at91_pio.h>
+#include <mach/hardware.h>
+
+#define ARCH_NR_GPIOS 256
+
+static inline int gpio_is_valid(int gpio)
+{
+ if (gpio < 0)
+ return 0;
+ if (gpio < ARCH_NR_GPIOS)
+ return 1;
+ return 0;
+}
+
+#define AT91_PIN_PA0 (0x00 + 0)
+#define AT91_PIN_PA1 (0x00 + 1)
+#define AT91_PIN_PA2 (0x00 + 2)
+#define AT91_PIN_PA3 (0x00 + 3)
+#define AT91_PIN_PA4 (0x00 + 4)
+#define AT91_PIN_PA5 (0x00 + 5)
+#define AT91_PIN_PA6 (0x00 + 6)
+#define AT91_PIN_PA7 (0x00 + 7)
+#define AT91_PIN_PA8 (0x00 + 8)
+#define AT91_PIN_PA9 (0x00 + 9)
+#define AT91_PIN_PA10 (0x00 + 10)
+#define AT91_PIN_PA11 (0x00 + 11)
+#define AT91_PIN_PA12 (0x00 + 12)
+#define AT91_PIN_PA13 (0x00 + 13)
+#define AT91_PIN_PA14 (0x00 + 14)
+#define AT91_PIN_PA15 (0x00 + 15)
+#define AT91_PIN_PA16 (0x00 + 16)
+#define AT91_PIN_PA17 (0x00 + 17)
+#define AT91_PIN_PA18 (0x00 + 18)
+#define AT91_PIN_PA19 (0x00 + 19)
+#define AT91_PIN_PA20 (0x00 + 20)
+#define AT91_PIN_PA21 (0x00 + 21)
+#define AT91_PIN_PA22 (0x00 + 22)
+#define AT91_PIN_PA23 (0x00 + 23)
+#define AT91_PIN_PA24 (0x00 + 24)
+#define AT91_PIN_PA25 (0x00 + 25)
+#define AT91_PIN_PA26 (0x00 + 26)
+#define AT91_PIN_PA27 (0x00 + 27)
+#define AT91_PIN_PA28 (0x00 + 28)
+#define AT91_PIN_PA29 (0x00 + 29)
+#define AT91_PIN_PA30 (0x00 + 30)
+#define AT91_PIN_PA31 (0x00 + 31)
+
+#define AT91_PIN_PB0 (0x20 + 0)
+#define AT91_PIN_PB1 (0x20 + 1)
+#define AT91_PIN_PB2 (0x20 + 2)
+#define AT91_PIN_PB3 (0x20 + 3)
+#define AT91_PIN_PB4 (0x20 + 4)
+#define AT91_PIN_PB5 (0x20 + 5)
+#define AT91_PIN_PB6 (0x20 + 6)
+#define AT91_PIN_PB7 (0x20 + 7)
+#define AT91_PIN_PB8 (0x20 + 8)
+#define AT91_PIN_PB9 (0x20 + 9)
+#define AT91_PIN_PB10 (0x20 + 10)
+#define AT91_PIN_PB11 (0x20 + 11)
+#define AT91_PIN_PB12 (0x20 + 12)
+#define AT91_PIN_PB13 (0x20 + 13)
+#define AT91_PIN_PB14 (0x20 + 14)
+#define AT91_PIN_PB15 (0x20 + 15)
+#define AT91_PIN_PB16 (0x20 + 16)
+#define AT91_PIN_PB17 (0x20 + 17)
+#define AT91_PIN_PB18 (0x20 + 18)
+#define AT91_PIN_PB19 (0x20 + 19)
+#define AT91_PIN_PB20 (0x20 + 20)
+#define AT91_PIN_PB21 (0x20 + 21)
+#define AT91_PIN_PB22 (0x20 + 22)
+#define AT91_PIN_PB23 (0x20 + 23)
+#define AT91_PIN_PB24 (0x20 + 24)
+#define AT91_PIN_PB25 (0x20 + 25)
+#define AT91_PIN_PB26 (0x20 + 26)
+#define AT91_PIN_PB27 (0x20 + 27)
+#define AT91_PIN_PB28 (0x20 + 28)
+#define AT91_PIN_PB29 (0x20 + 29)
+#define AT91_PIN_PB30 (0x20 + 30)
+#define AT91_PIN_PB31 (0x20 + 31)
+
+#define AT91_PIN_PC0 (0x40 + 0)
+#define AT91_PIN_PC1 (0x40 + 1)
+#define AT91_PIN_PC2 (0x40 + 2)
+#define AT91_PIN_PC3 (0x40 + 3)
+#define AT91_PIN_PC4 (0x40 + 4)
+#define AT91_PIN_PC5 (0x40 + 5)
+#define AT91_PIN_PC6 (0x40 + 6)
+#define AT91_PIN_PC7 (0x40 + 7)
+#define AT91_PIN_PC8 (0x40 + 8)
+#define AT91_PIN_PC9 (0x40 + 9)
+#define AT91_PIN_PC10 (0x40 + 10)
+#define AT91_PIN_PC11 (0x40 + 11)
+#define AT91_PIN_PC12 (0x40 + 12)
+#define AT91_PIN_PC13 (0x40 + 13)
+#define AT91_PIN_PC14 (0x40 + 14)
+#define AT91_PIN_PC15 (0x40 + 15)
+#define AT91_PIN_PC16 (0x40 + 16)
+#define AT91_PIN_PC17 (0x40 + 17)
+#define AT91_PIN_PC18 (0x40 + 18)
+#define AT91_PIN_PC19 (0x40 + 19)
+#define AT91_PIN_PC20 (0x40 + 20)
+#define AT91_PIN_PC21 (0x40 + 21)
+#define AT91_PIN_PC22 (0x40 + 22)
+#define AT91_PIN_PC23 (0x40 + 23)
+#define AT91_PIN_PC24 (0x40 + 24)
+#define AT91_PIN_PC25 (0x40 + 25)
+#define AT91_PIN_PC26 (0x40 + 26)
+#define AT91_PIN_PC27 (0x40 + 27)
+#define AT91_PIN_PC28 (0x40 + 28)
+#define AT91_PIN_PC29 (0x40 + 29)
+#define AT91_PIN_PC30 (0x40 + 30)
+#define AT91_PIN_PC31 (0x40 + 31)
+
+#define AT91_PIN_PD0 (0x60 + 0)
+#define AT91_PIN_PD1 (0x60 + 1)
+#define AT91_PIN_PD2 (0x60 + 2)
+#define AT91_PIN_PD3 (0x60 + 3)
+#define AT91_PIN_PD4 (0x60 + 4)
+#define AT91_PIN_PD5 (0x60 + 5)
+#define AT91_PIN_PD6 (0x60 + 6)
+#define AT91_PIN_PD7 (0x60 + 7)
+#define AT91_PIN_PD8 (0x60 + 8)
+#define AT91_PIN_PD9 (0x60 + 9)
+#define AT91_PIN_PD10 (0x60 + 10)
+#define AT91_PIN_PD11 (0x60 + 11)
+#define AT91_PIN_PD12 (0x60 + 12)
+#define AT91_PIN_PD13 (0x60 + 13)
+#define AT91_PIN_PD14 (0x60 + 14)
+#define AT91_PIN_PD15 (0x60 + 15)
+#define AT91_PIN_PD16 (0x60 + 16)
+#define AT91_PIN_PD17 (0x60 + 17)
+#define AT91_PIN_PD18 (0x60 + 18)
+#define AT91_PIN_PD19 (0x60 + 19)
+#define AT91_PIN_PD20 (0x60 + 20)
+#define AT91_PIN_PD21 (0x60 + 21)
+#define AT91_PIN_PD22 (0x60 + 22)
+#define AT91_PIN_PD23 (0x60 + 23)
+#define AT91_PIN_PD24 (0x60 + 24)
+#define AT91_PIN_PD25 (0x60 + 25)
+#define AT91_PIN_PD26 (0x60 + 26)
+#define AT91_PIN_PD27 (0x60 + 27)
+#define AT91_PIN_PD28 (0x60 + 28)
+#define AT91_PIN_PD29 (0x60 + 29)
+#define AT91_PIN_PD30 (0x60 + 30)
+#define AT91_PIN_PD31 (0x60 + 31)
+
+#define AT91_PIN_PE0 (0x80 + 0)
+#define AT91_PIN_PE1 (0x80 + 1)
+#define AT91_PIN_PE2 (0x80 + 2)
+#define AT91_PIN_PE3 (0x80 + 3)
+#define AT91_PIN_PE4 (0x80 + 4)
+#define AT91_PIN_PE5 (0x80 + 5)
+#define AT91_PIN_PE6 (0x80 + 6)
+#define AT91_PIN_PE7 (0x80 + 7)
+#define AT91_PIN_PE8 (0x80 + 8)
+#define AT91_PIN_PE9 (0x80 + 9)
+#define AT91_PIN_PE10 (0x80 + 10)
+#define AT91_PIN_PE11 (0x80 + 11)
+#define AT91_PIN_PE12 (0x80 + 12)
+#define AT91_PIN_PE13 (0x80 + 13)
+#define AT91_PIN_PE14 (0x80 + 14)
+#define AT91_PIN_PE15 (0x80 + 15)
+#define AT91_PIN_PE16 (0x80 + 16)
+#define AT91_PIN_PE17 (0x80 + 17)
+#define AT91_PIN_PE18 (0x80 + 18)
+#define AT91_PIN_PE19 (0x80 + 19)
+#define AT91_PIN_PE20 (0x80 + 20)
+#define AT91_PIN_PE21 (0x80 + 21)
+#define AT91_PIN_PE22 (0x80 + 22)
+#define AT91_PIN_PE23 (0x80 + 23)
+#define AT91_PIN_PE24 (0x80 + 24)
+#define AT91_PIN_PE25 (0x80 + 25)
+#define AT91_PIN_PE26 (0x80 + 26)
+#define AT91_PIN_PE27 (0x80 + 27)
+#define AT91_PIN_PE28 (0x80 + 28)
+#define AT91_PIN_PE29 (0x80 + 29)
+#define AT91_PIN_PE30 (0x80 + 30)
+#define AT91_PIN_PE31 (0x80 + 31)
+
+/*
+ * mux the pin to the "GPIO" peripheral role.
+ */
+int at91_set_GPIO_periph(unsigned pin, int use_pullup);
+
+
+/*
+ * mux the pin to the "A" internal peripheral role.
+ */
+int at91_set_A_periph(unsigned pin, int use_pullup);
+
+/*
+ * mux the pin to the "B" internal peripheral role.
+ */
+int at91_set_B_periph(unsigned pin, int use_pullup);
+/*
+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
+ * configure it for an input.
+ */
+int at91_set_gpio_input(unsigned pin, int use_pullup);
+
+/*
+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
+ * and configure it for an output.
+ */
+int at91_set_gpio_output(unsigned pin, int value);
+
+/*
+ * enable/disable the glitch filter; mostly used with IRQ handling.
+ */
+int at91_set_deglitch(unsigned pin, int is_on);
+
+/*
+ * enable/disable the multi-driver; This is only valid for output and
+ * allows the output pin to run as an open collector output.
+ */
+int at91_set_multi_drive(unsigned pin, int is_on);
+
+/*
+ * assuming the pin is muxed as a gpio output, set its value.
+ */
+int at91_set_gpio_value(unsigned pin, int value);
+
+extern int at91_set_C_periph(unsigned pin, int use_pullup);
+extern int at91_set_D_periph(unsigned pin, int use_pullup);
+extern int at91_set_debounce(unsigned pin, int is_on, int div);
+extern int at91_set_pulldown(unsigned pin, int is_on);
+extern int at91_disable_schmitt_trig(unsigned pin);
+
+/*
+ * read the pin's value (works even if it's not muxed as a gpio).
+ */
+int at91_get_gpio_value(unsigned pin);
+
+struct at91_gpio_bank {
+ void __iomem *regbase; /* base of register bank */
+ struct clk *clock;
+};
+
+extern int at91_gpio_init(struct at91_gpio_bank *data, int nr_banks);
+
+extern int gpio_direction_input(unsigned gpio);
+extern int gpio_direction_output(unsigned gpio, int value);
+#define gpio_get_value at91_get_gpio_value
+#define gpio_set_value at91_set_gpio_value
+
+#endif /* __ASM_ARCH_AT91SAM9_GPIO_H */
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 4/6] at91: gpio: switch to device driver
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 2/6] at91: use -EINVAL for invalid gpio Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 3/6] at91: drop PIN_BASE offset for gpio Jean-Christophe PLAGNIOL-VILLARD
@ 2012-12-20 14:31 ` Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 5/6] at91: gpio: switch to ops Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 6/6] at91: switch to gpiolib Jean-Christophe PLAGNIOL-VILLARD
4 siblings, 0 replies; 8+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-12-20 14:31 UTC (permalink / raw)
To: barebox
this is the first step to prepare the switch to the gpiolib
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/mach-at91/at91rm9200.c | 46 ++++++++++-----------
arch/arm/mach-at91/at91sam9260.c | 34 +++++++---------
arch/arm/mach-at91/at91sam9261.c | 36 +++++++---------
arch/arm/mach-at91/at91sam9263.c | 44 ++++++++------------
arch/arm/mach-at91/at91sam9g45.c | 43 ++++++++------------
arch/arm/mach-at91/at91sam9n12.c | 38 ++++++++---------
arch/arm/mach-at91/at91sam9x5.c | 38 ++++++++---------
arch/arm/mach-at91/generic.h | 12 ++++++
arch/arm/mach-at91/gpio.c | 70 +++++++++++++++++++++++++++-----
arch/arm/mach-at91/include/mach/gpio.h | 7 ----
10 files changed, 189 insertions(+), 179 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 5e3fdeb..e298c97 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -157,6 +157,13 @@ static struct clk *periph_clocks[] __initdata = {
// irq0 .. irq6
};
+static struct clk_lookup periph_clocks_lookups[] = {
+ CLKDEV_DEV_ID("at91rm9200-gpio0", &pioA_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio1", &pioB_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio2", &pioC_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio3", &pioD_clk),
+};
+
static struct clk_lookup usart_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "atmel_usart0", &mck),
CLKDEV_CON_DEV_ID("usart", "atmel_usart1", &usart0_clk),
@@ -201,6 +208,8 @@ static void __init at91rm9200_register_clocks(void)
for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
clk_register(periph_clocks[i]);
+ clkdev_add_table(periph_clocks_lookups,
+ ARRAY_SIZE(periph_clocks_lookups));
clkdev_add_table(usart_clocks_lookups,
ARRAY_SIZE(usart_clocks_lookups));
@@ -211,27 +220,6 @@ static void __init at91rm9200_register_clocks(void)
}
/* --------------------------------------------------------------------
- * GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91rm9200_gpio[] = {
- {
- .regbase = IOMEM(AT91_BASE_PIOA),
- .clock = &pioA_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOB),
- .clock = &pioB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOC),
- .clock = &pioC_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOD),
- .clock = &pioD_clk,
- }
-};
-
-
-/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
static int __init at91rm9200_initialize(void)
@@ -243,10 +231,18 @@ static int __init at91rm9200_initialize(void)
/* Register the processor-specific clocks */
at91rm9200_register_clocks();
- /* Initialize GPIO subsystem */
- at91_gpio_init(at91rm9200_gpio, ARRAY_SIZE(at91rm9200_gpio));
-
return 0;
}
-
core_initcall(at91rm9200_initialize);
+
+static int at91rm9200_gpio_init(void)
+{
+ /* Register GPIO subsystem */
+ at91_add_rm9200_gpio(0, AT91_BASE_PIOA);
+ at91_add_rm9200_gpio(1, AT91_BASE_PIOB);
+ at91_add_rm9200_gpio(2, AT91_BASE_PIOC);
+ at91_add_rm9200_gpio(3, AT91_BASE_PIOD);
+
+ return 0;
+}
+postcore_initcall(at91rm9200_gpio_init);
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index cf9e511..6c741f8 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -172,6 +172,9 @@ static struct clk *periph_clocks[] = {
static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi0", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi1", &spi1_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio0", &pioA_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio1", &pioB_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio2", &pioC_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@@ -217,23 +220,6 @@ static void __init at91sam9260_register_clocks(void)
clk_register(&pck1);
}
-/* --------------------------------------------------------------------
- * GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91sam9260_gpio[] = {
- {
- .regbase = IOMEM(AT91_BASE_PIOA),
- .clock = &pioA_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOB),
- .clock = &pioB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOC),
- .clock = &pioC_clk,
- }
-};
-
static int at91sam9260_initialize(void)
{
/* Init clock subsystem */
@@ -242,9 +228,17 @@ static int at91sam9260_initialize(void)
/* Register the processor-specific clocks */
at91sam9260_register_clocks();
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9260_gpio, 3);
return 0;
}
-
core_initcall(at91sam9260_initialize);
+
+static int at91sam9260_gpio_init(void)
+{
+ /* Register GPIO subsystem */
+ at91_add_rm9200_gpio(0, AT91_BASE_PIOA);
+ at91_add_rm9200_gpio(1, AT91_BASE_PIOB);
+ at91_add_rm9200_gpio(2, AT91_BASE_PIOC);
+
+ return 0;
+}
+postcore_initcall(at91sam9260_gpio_init);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index d20b250..b57e119 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -136,6 +136,9 @@ static struct clk *periph_clocks[] = {
static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi0", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi1", &spi1_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio0", &pioA_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio1", &pioB_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio2", &pioC_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@@ -209,25 +212,6 @@ static void at91sam9261_register_clocks(void)
clk_register(&hck1);
}
-
-/* --------------------------------------------------------------------
- * GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91sam9261_gpio[] = {
- {
- .regbase = IOMEM(AT91_BASE_PIOA),
- .clock = &pioA_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOB),
- .clock = &pioB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOC),
- .clock = &pioC_clk,
- }
-};
-
-
static int at91sam9261_initialize(void)
{
/* Init clock subsystem */
@@ -236,9 +220,17 @@ static int at91sam9261_initialize(void)
/* Register the processor-specific clocks */
at91sam9261_register_clocks();
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9261_gpio, 3);
return 0;
}
-
core_initcall(at91sam9261_initialize);
+
+static int at91sam9261_gpio_init(void)
+{
+ /* Register GPIO subsystem */
+ at91_add_rm9200_gpio(0, AT91_BASE_PIOA);
+ at91_add_rm9200_gpio(1, AT91_BASE_PIOB);
+ at91_add_rm9200_gpio(2, AT91_BASE_PIOC);
+
+ return 0;
+}
+postcore_initcall(at91sam9261_gpio_init);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index b3116d3..a4387ee 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -168,6 +168,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci1", &mmc1_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi0", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi1", &spi1_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio0", &pioA_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio1", &pioB_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio2", &pioCDE_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio3", &pioCDE_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio4", &pioCDE_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@@ -224,29 +229,6 @@ static void __init at91sam9263_register_clocks(void)
clk_register(&pck3);
}
-/* --------------------------------------------------------------------
- * GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91sam9263_gpio[] = {
- {
- .regbase = IOMEM(AT91_BASE_PIOA),
- .clock = &pioA_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOB),
- .clock = &pioB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOC),
- .clock = &pioCDE_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOD),
- .clock = &pioCDE_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOE),
- .clock = &pioCDE_clk,
- }
-};
-
static int at91sam9263_initialize(void)
{
/* Init clock subsystem */
@@ -255,9 +237,19 @@ static int at91sam9263_initialize(void)
/* Register the processor-specific clocks */
at91sam9263_register_clocks();
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9263_gpio, 5);
return 0;
}
-
core_initcall(at91sam9263_initialize);
+
+static int at91sam9263_gpio_init(void)
+{
+ /* Register GPIO subsystem */
+ at91_add_rm9200_gpio(0, AT91_BASE_PIOA);
+ at91_add_rm9200_gpio(1, AT91_BASE_PIOB);
+ at91_add_rm9200_gpio(2, AT91_BASE_PIOC);
+ at91_add_rm9200_gpio(3, AT91_BASE_PIOD);
+ at91_add_rm9200_gpio(4, AT91_BASE_PIOE);
+
+ return 0;
+}
+postcore_initcall(at91sam9263_gpio_init);
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index a6717f1..c3a3158 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -190,6 +190,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci1", &mmc1_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi0", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi1", &spi1_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio0", &pioA_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio1", &pioB_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio2", &pioC_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio3", &pioDE_clk),
+ CLKDEV_DEV_ID("at91rm9200-gpio4", &pioDE_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@@ -236,29 +241,6 @@ static void __init at91sam9g45_register_clocks(void)
clk_register(&pck1);
}
-/* --------------------------------------------------------------------
- * GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91sam9g45_gpio[] = {
- {
- .regbase = IOMEM(AT91_BASE_PIOA),
- .clock = &pioA_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOB),
- .clock = &pioB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOC),
- .clock = &pioC_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOD),
- .clock = &pioDE_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOE),
- .clock = &pioDE_clk,
- }
-};
-
static int at91sam9g45_initialize(void)
{
/* Init clock subsystem */
@@ -267,9 +249,20 @@ static int at91sam9g45_initialize(void)
/* Register the processor-specific clocks */
at91sam9g45_register_clocks();
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9g45_gpio, 5);
return 0;
}
core_initcall(at91sam9g45_initialize);
+
+static int at91sam9g45_gpio_init(void)
+{
+ /* Register GPIO subsystem */
+ at91_add_rm9200_gpio(0, AT91_BASE_PIOA);
+ at91_add_rm9200_gpio(1, AT91_BASE_PIOB);
+ at91_add_rm9200_gpio(2, AT91_BASE_PIOC);
+ at91_add_rm9200_gpio(3, AT91_BASE_PIOD);
+ at91_add_rm9200_gpio(4, AT91_BASE_PIOE);
+
+ return 0;
+}
+postcore_initcall(at91sam9g45_gpio_init);
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index b74a72a..3ddaa7d 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -150,6 +150,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_ID("ohci_clk", &uhpfs_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi0", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi1", &spi1_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio0", &pioAB_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio1", &pioAB_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio2", &pioCD_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio3", &pioCD_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@@ -195,26 +199,6 @@ static void __init at91sam9n12_register_clocks(void)
}
/* --------------------------------------------------------------------
- * GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91sam9n12_gpio[] = {
- {
- .regbase = IOMEM(AT91_BASE_PIOA),
- .clock = &pioAB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOB),
- .clock = &pioAB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOC),
- .clock = &pioCD_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOD),
- .clock = &pioCD_clk,
- }
-};
-
-/* --------------------------------------------------------------------
* AT91SAM9N12 processor initialization
* -------------------------------------------------------------------- */
@@ -226,8 +210,18 @@ static int at91sam9n12_initialize(void)
/* Register the processor-specific clocks */
at91sam9n12_register_clocks();
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9n12_gpio, 4);
return 0;
}
core_initcall(at91sam9n12_initialize);
+
+static int at91sam9n12_gpio_init(void)
+{
+ /* Register GPIO subsystem */
+ at91_add_sam9x5_gpio(0, AT91_BASE_PIOA);
+ at91_add_sam9x5_gpio(1, AT91_BASE_PIOB);
+ at91_add_sam9x5_gpio(2, AT91_BASE_PIOC);
+ at91_add_sam9x5_gpio(3, AT91_BASE_PIOD);
+
+ return 0;
+}
+postcore_initcall(at91sam9n12_gpio_init);
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 7c7d997..b4c582f 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -209,6 +209,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi1", &spi1_clk),
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci0", &mmc0_clk),
CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci1", &mmc1_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio0", &pioAB_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio1", &pioAB_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio2", &pioCD_clk),
+ CLKDEV_DEV_ID("at91sam9x5-gpio3", &pioCD_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@@ -280,26 +284,6 @@ static void __init at91sam9x5_register_clocks(void)
}
/* --------------------------------------------------------------------
- * GPIO
- * -------------------------------------------------------------------- */
-
-static struct at91_gpio_bank at91sam9x5_gpio[] = {
- {
- .regbase = IOMEM(AT91_BASE_PIOA),
- .clock = &pioAB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOB),
- .clock = &pioAB_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOC),
- .clock = &pioCD_clk,
- }, {
- .regbase = IOMEM(AT91_BASE_PIOD),
- .clock = &pioCD_clk,
- }
-};
-
-/* --------------------------------------------------------------------
* AT91SAM9x5 processor initialization
* -------------------------------------------------------------------- */
@@ -311,8 +295,18 @@ static int at91sam9x5_initialize(void)
/* Register the processor-specific clocks */
at91sam9x5_register_clocks();
- /* Register GPIO subsystem */
- at91_gpio_init(at91sam9x5_gpio, 4);
return 0;
}
core_initcall(at91sam9x5_initialize);
+
+static int at91sam9x5_gpio_init(void)
+{
+ /* Register GPIO subsystem */
+ at91_add_sam9x5_gpio(0, AT91_BASE_PIOA);
+ at91_add_sam9x5_gpio(1, AT91_BASE_PIOB);
+ at91_add_sam9x5_gpio(2, AT91_BASE_PIOC);
+ at91_add_sam9x5_gpio(3, AT91_BASE_PIOD);
+
+ return 0;
+}
+postcore_initcall(at91sam9x5_gpio_init);
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 768c91f..57f2a84 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -10,3 +10,15 @@
/* Clocks */
extern int __init at91_clock_init(unsigned long main_clock);
+
+static inline struct device_d *at91_add_rm9200_gpio(int id, resource_size_t start)
+{
+ return add_generic_device("at91rm9200-gpio", id, NULL, start, 512,
+ IORESOURCE_MEM, NULL);
+}
+
+static inline struct device_d *at91_add_sam9x5_gpio(int id, resource_size_t start)
+{
+ return add_generic_device("at91sam9x5-gpio", id, NULL, start, 512,
+ IORESOURCE_MEM, NULL);
+}
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index cd0136f..acaf740 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -19,28 +19,37 @@
#include <common.h>
#include <linux/clk.h>
+#include <linux/err.h>
#include <errno.h>
#include <io.h>
#include <mach/gpio.h>
#include <mach/io.h>
#include <mach/cpu.h>
#include <gpio.h>
+#include <init.h>
+#include <driver.h>
+
+#define AT91_PIO3 1
+#define MAX_GPIO_BANKS 5
static int gpio_banks;
static int cpu_has_pio3;
-static struct at91_gpio_bank *gpio;
/*
* Functionnality can change with newer chips
*/
+struct at91_gpio_chip {
+ void __iomem *regbase; /* PIO bank virtual address */
+};
+static struct at91_gpio_chip gpio_chip[MAX_GPIO_BANKS];
static inline void __iomem *pin_to_controller(unsigned pin)
{
pin /= 32;
if (likely(pin < gpio_banks))
- return gpio[pin].regbase;
+ return gpio_chip[pin].regbase;
return NULL;
}
@@ -350,19 +359,60 @@ EXPORT_SYMBOL(gpio_direction_output);
/*--------------------------------------------------------------------------*/
-int at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
+static int at91_gpio_probe(struct device_d *dev)
{
- unsigned i;
+ struct at91_gpio_chip *at91_gpio = &gpio_chip[dev->id];
+ struct clk *clk;
+ int ret;
+
+ BUG_ON(dev->id > MAX_GPIO_BANKS);
+
+ ret = dev_get_drvdata(dev, (unsigned long *)&cpu_has_pio3);
+ if (ret) {
+ dev_err(dev, "dev_get_drvdata failed: %d\n", ret);
+ return ret;
+ }
- gpio = data;
- gpio_banks = nr_banks;
+ clk = clk_get(dev, NULL);
+ if (IS_ERR(clk)) {
+ ret = PTR_ERR(clk);
+ dev_err(dev, "clock not found: %d\n", ret);
+ return ret;
+ }
- for (i = 0; i < nr_banks; i++, data++) {
- /* enable PIO controller's clock */
- clk_enable(data->clock);
+ ret = clk_enable(clk);
+ if (ret < 0) {
+ dev_err(dev, "clock failed to enable: %d\n", ret);
+ clk_put(clk);
+ return ret;
}
- cpu_has_pio3 = cpu_is_at91sam9x5() || cpu_is_at91sam9n12();
+ gpio_banks = max(gpio_banks, dev->id + 1);
+ at91_gpio->regbase = dev_request_mem_region(dev, 0);
return 0;
}
+
+static struct platform_device_id at91_gpio_ids[] = {
+ {
+ .name = "at91rm9200-gpio",
+ .driver_data = (unsigned long)0,
+ }, {
+ .name = "at91sam9x5-gpio",
+ .driver_data = (unsigned long)AT91_PIO3,
+ }, {
+ /* sentinel */
+ },
+};
+
+static struct driver_d at91_gpio_driver = {
+ .name = "at91-gpio",
+ .probe = at91_gpio_probe,
+ .id_table = at91_gpio_ids,
+};
+
+static int at91_gpio_init(void)
+{
+ return platform_driver_register(&at91_gpio_driver);
+}
+postcore_initcall(at91_gpio_init);
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 200a852..eef7bd2 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -248,13 +248,6 @@ extern int at91_disable_schmitt_trig(unsigned pin);
*/
int at91_get_gpio_value(unsigned pin);
-struct at91_gpio_bank {
- void __iomem *regbase; /* base of register bank */
- struct clk *clock;
-};
-
-extern int at91_gpio_init(struct at91_gpio_bank *data, int nr_banks);
-
extern int gpio_direction_input(unsigned gpio);
extern int gpio_direction_output(unsigned gpio, int value);
#define gpio_get_value at91_get_gpio_value
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 5/6] at91: gpio: switch to ops
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
` (2 preceding siblings ...)
2012-12-20 14:31 ` [PATCH 4/6] at91: gpio: switch to device driver Jean-Christophe PLAGNIOL-VILLARD
@ 2012-12-20 14:31 ` Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 6/6] at91: switch to gpiolib Jean-Christophe PLAGNIOL-VILLARD
4 siblings, 0 replies; 8+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-12-20 14:31 UTC (permalink / raw)
To: barebox
imported from the kernel
this allow to simplify the mux implemtation and will simplify the gpio support
from bare_init or pbl
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/mach-at91/gpio.c | 388 +++++++++++++++++++++-----------
arch/arm/mach-at91/include/mach/gpio.h | 48 +++-
2 files changed, 293 insertions(+), 143 deletions(-)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index acaf740..5962b2a 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -1,6 +1,6 @@
/*
- *
- * (c) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ * Copyright (C) 2005 HP Labs
+ * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -29,144 +29,248 @@
#include <init.h>
#include <driver.h>
-#define AT91_PIO3 1
-#define MAX_GPIO_BANKS 5
+#define MAX_GPIO_BANKS 5
+#define MAX_NB_GPIO_PER_BANK 32
-static int gpio_banks;
-static int cpu_has_pio3;
+static int gpio_banks = 0;
/*
* Functionnality can change with newer chips
*/
-
struct at91_gpio_chip {
+ struct device_d *dev;
void __iomem *regbase; /* PIO bank virtual address */
+ struct at91_pinctrl_mux_ops *ops; /* ops */
};
static struct at91_gpio_chip gpio_chip[MAX_GPIO_BANKS];
-static inline void __iomem *pin_to_controller(unsigned pin)
+static inline unsigned pin_to_bank(unsigned pin)
+{
+ return pin / MAX_NB_GPIO_PER_BANK;
+}
+
+static inline unsigned pin_to_bank_offset(unsigned pin)
{
- pin /= 32;
+ return pin % MAX_NB_GPIO_PER_BANK;
+}
+
+static inline struct at91_gpio_chip *pin_to_controller(unsigned pin)
+{
+ pin /= MAX_NB_GPIO_PER_BANK;
if (likely(pin < gpio_banks))
- return gpio_chip[pin].regbase;
+ return &gpio_chip[pin];
return NULL;
}
static inline unsigned pin_to_mask(unsigned pin)
{
- return 1 << (pin % 32);
+ return 1 << pin_to_bank_offset(pin);
}
-/*
- * mux the pin to the "GPIO" peripheral role.
+/**
+ * struct at91_pinctrl_mux_ops - describes an At91 mux ops group
+ * on new IP with support for periph C and D the way to mux in
+ * periph A and B has changed
+ * So provide the right call back
+ * if not present means the IP does not support it
+ * @mux_A_periph: mux as periph A
+ * @mux_B_periph: mux as periph B
+ * @mux_C_periph: mux as periph C
+ * @mux_D_periph: mux as periph D
+ * @set_deglitch: enable/disable deglitch
+ * @set_debounce: enable/disable debounce
+ * @set_pulldown: enable/disable pulldown
+ * @disable_schmitt_trig: disable schmitt trigger
*/
-int at91_set_GPIO_periph(unsigned pin, int use_pullup)
-{
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
+struct at91_pinctrl_mux_ops {
+ void (*mux_A_periph)(void __iomem *pio, unsigned mask);
+ void (*mux_B_periph)(void __iomem *pio, unsigned mask);
+ void (*mux_C_periph)(void __iomem *pio, unsigned mask);
+ void (*mux_D_periph)(void __iomem *pio, unsigned mask);
+ void (*set_deglitch)(void __iomem *pio, unsigned mask, bool in_on);
+ void (*set_debounce)(void __iomem *pio, unsigned mask, bool in_on, u32 div);
+ void (*set_pulldown)(void __iomem *pio, unsigned mask, bool in_on);
+ void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
+};
- if (!pio)
- return -EINVAL;
+static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask)
+{
__raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_PER);
- return 0;
}
-EXPORT_SYMBOL(at91_set_GPIO_periph);
-/*
- * mux the pin to the "A" internal peripheral role.
- */
-int at91_set_A_periph(unsigned pin, int use_pullup)
+static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on)
{
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
+ __raw_writel(mask, pio + (on ? PIO_PUER : PIO_PUDR));
+}
- if (!pio)
- return -EINVAL;
+static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on)
+{
+ __raw_writel(mask, pio + (on ? PIO_MDER : PIO_MDDR));
+}
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- if (cpu_has_pio3) {
- __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask,
- pio + PIO_ABCDSR1);
- __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
- pio + PIO_ABCDSR2);
- } else {
- __raw_writel(mask, pio + PIO_ASR);
- }
- __raw_writel(mask, pio + PIO_PDR);
- return 0;
+static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask)
+{
+ __raw_writel(mask, pio + PIO_ASR);
}
-EXPORT_SYMBOL(at91_set_A_periph);
-/*
- * mux the pin to the "B" internal peripheral role.
- */
-int at91_set_B_periph(unsigned pin, int use_pullup)
+static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask)
{
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
+ __raw_writel(mask, pio + PIO_BSR);
+}
- if (!pio)
- return -EINVAL;
+static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask)
+{
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- if (cpu_has_pio3) {
- __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask,
- pio + PIO_ABCDSR1);
- __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
- pio + PIO_ABCDSR2);
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask,
+ pio + PIO_ABCDSR1);
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
+ pio + PIO_ABCDSR2);
+}
+
+static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask)
+{
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask,
+ pio + PIO_ABCDSR1);
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR2) & ~mask,
+ pio + PIO_ABCDSR2);
+}
+
+static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask)
+{
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
+}
+
+static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask)
+{
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
+ __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
+}
+
+static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
+{
+ __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
+}
+
+static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
+{
+ if (is_on)
+ __raw_writel(mask, pio + PIO_IFSCDR);
+ at91_mux_set_deglitch(pio, mask, is_on);
+}
+
+static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
+ bool is_on, u32 div)
+{
+ if (is_on) {
+ __raw_writel(mask, pio + PIO_IFSCER);
+ __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
+ __raw_writel(mask, pio + PIO_IFER);
} else {
- __raw_writel(mask, pio + PIO_BSR);
+ __raw_writel(mask, pio + PIO_IFDR);
}
- __raw_writel(mask, pio + PIO_PDR);
- return 0;
}
-EXPORT_SYMBOL(at91_set_B_periph);
-/*
- * mux the pin to the "C" internal peripheral role.
- */
-int at91_set_C_periph(unsigned pin, int use_pullup)
+static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
{
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
+ __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
+}
- if (!pio || !cpu_has_pio3)
- return -EINVAL;
+static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
+{
+ __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
+}
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(__raw_readl(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
- __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
+static struct at91_pinctrl_mux_ops at91rm9200_ops = {
+ .mux_A_periph = at91_mux_set_A_periph,
+ .mux_B_periph = at91_mux_set_B_periph,
+ .set_deglitch = at91_mux_set_deglitch,
+};
+
+static struct at91_pinctrl_mux_ops at91sam9x5_ops = {
+ .mux_A_periph = at91_mux_pio3_set_A_periph,
+ .mux_B_periph = at91_mux_pio3_set_B_periph,
+ .mux_C_periph = at91_mux_pio3_set_C_periph,
+ .mux_D_periph = at91_mux_pio3_set_D_periph,
+ .set_deglitch = at91_mux_pio3_set_deglitch,
+ .set_debounce = at91_mux_pio3_set_debounce,
+ .set_pulldown = at91_mux_pio3_set_pulldown,
+ .disable_schmitt_trig = at91_mux_pio3_disable_schmitt_trig,
+};
+
+static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask)
+{
__raw_writel(mask, pio + PIO_PDR);
- return 0;
}
-EXPORT_SYMBOL(at91_set_C_periph);
-/*
- * mux the pin to the "C" internal peripheral role.
- */
-int at91_set_D_periph(unsigned pin, int use_pullup)
+static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask)
{
- void __iomem *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
+ __raw_writel(mask, pio + PIO_PER);
+}
- if (!pio || !cpu_has_pio3)
+static void at91_mux_gpio_input(void __iomem *pio, unsigned mask, bool input)
+{
+ __raw_writel(mask, pio + (input ? PIO_ODR : PIO_OER));
+}
+
+int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup)
+{
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
+ unsigned mask = pin_to_mask(pin);
+ int bank = pin_to_bank(pin);
+ struct device_d *dev = at91_gpio->dev;
+
+ if (!at91_gpio)
return -EINVAL;
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(__raw_readl(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
- __raw_writel(__raw_readl(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
- __raw_writel(mask, pio + PIO_PDR);
+ pio = at91_gpio->regbase;
+ if (!pio)
+ return -EINVAL;
+
+ at91_mux_disable_interrupt(pio, mask);
+
+ pin %= MAX_NB_GPIO_PER_BANK;
+ if (mux) {
+ dev_dbg(dev, "pio%c%d configured as periph%c with pullup = %d\n",
+ bank + 'A', pin, mux - 1 + 'A', use_pullup);
+ } else {
+ dev_dbg(dev, "pio%c%d configured as gpio with pullup = %d\n",
+ bank + 'A', pin, use_pullup);
+ }
+
+ switch(mux) {
+ case AT91_MUX_GPIO:
+ at91_mux_gpio_enable(pio, mask);
+ break;
+ case AT91_MUX_PERIPH_A:
+ at91_gpio->ops->mux_A_periph(pio, mask);
+ break;
+ case AT91_MUX_PERIPH_B:
+ at91_gpio->ops->mux_B_periph(pio, mask);
+ break;
+ case AT91_MUX_PERIPH_C:
+ if (!at91_gpio->ops->mux_C_periph)
+ return -EINVAL;
+ at91_gpio->ops->mux_C_periph(pio, mask);
+ break;
+ case AT91_MUX_PERIPH_D:
+ if (!at91_gpio->ops->mux_D_periph)
+ return -EINVAL;
+ at91_gpio->ops->mux_D_periph(pio, mask);
+ break;
+ }
+ if (mux)
+ at91_mux_gpio_disable(pio, mask);
+
+ if (use_pullup >= 0)
+ at91_mux_set_pullup(pio, mask, use_pullup);
+
return 0;
}
-EXPORT_SYMBOL(at91_set_D_periph);
+EXPORT_SYMBOL(at91_mux_pin);
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
@@ -174,19 +278,22 @@ EXPORT_SYMBOL(at91_set_D_periph);
*/
int at91_set_gpio_input(unsigned pin, int use_pullup)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
+ int ret;
- if (!pio)
- return -EINVAL;
+ ret = at91_mux_pin(pin, AT91_MUX_GPIO, use_pullup);
+ if (ret)
+ return ret;
+
+ dev_dbg(at91_gpio->dev, "pio%c%d configured as input\n",
+ pin_to_bank(pin) + 'A', pin_to_bank_offset(pin));
+
+ at91_mux_gpio_input(pio, mask, true);
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_ODR);
- __raw_writel(mask, pio + PIO_PER);
return 0;
}
-EXPORT_SYMBOL(at91_set_gpio_input);
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral),
@@ -194,17 +301,20 @@ EXPORT_SYMBOL(at91_set_gpio_input);
*/
int at91_set_gpio_output(unsigned pin, int value)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
+ int ret;
- if (!pio)
- return -EINVAL;
+ ret = at91_mux_pin(pin, AT91_MUX_GPIO, -1);
+ if (ret)
+ return ret;
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + PIO_PUDR);
+ dev_dbg(at91_gpio->dev, "pio%c%d configured as output val = %d\n",
+ pin_to_bank(pin) + 'A', pin_to_bank_offset(pin), value);
+
+ at91_mux_gpio_input(pio, mask, false);
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- __raw_writel(mask, pio + PIO_OER);
- __raw_writel(mask, pio + PIO_PER);
return 0;
}
EXPORT_SYMBOL(at91_set_gpio_output);
@@ -214,15 +324,14 @@ EXPORT_SYMBOL(at91_set_gpio_output);
*/
int at91_set_deglitch(unsigned pin, int is_on)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
- if (cpu_has_pio3 && is_on)
- __raw_writel(mask, pio + PIO_IFSCDR);
- __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
+ at91_gpio->ops->set_deglitch(pio, mask, is_on);
return 0;
}
EXPORT_SYMBOL(at91_set_deglitch);
@@ -232,19 +341,14 @@ EXPORT_SYMBOL(at91_set_deglitch);
*/
int at91_set_debounce(unsigned pin, int is_on, int div)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
- if (!pio || !cpu_has_pio3)
+ if (!pio || !at91_gpio->ops->set_debounce)
return -EINVAL;
- if (is_on) {
- __raw_writel(mask, pio + PIO_IFSCER);
- __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
- __raw_writel(mask, pio + PIO_IFER);
- } else {
- __raw_writel(mask, pio + PIO_IFDR);
- }
+ at91_gpio->ops->set_debounce(pio, mask, is_on, div);
return 0;
}
EXPORT_SYMBOL(at91_set_debounce);
@@ -255,13 +359,14 @@ EXPORT_SYMBOL(at91_set_debounce);
*/
int at91_set_multi_drive(unsigned pin, int is_on)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
if (!pio)
return -EINVAL;
- __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
+ at91_mux_set_multidrive(pio, mask, is_on);
return 0;
}
EXPORT_SYMBOL(at91_set_multi_drive);
@@ -272,15 +377,16 @@ EXPORT_SYMBOL(at91_set_multi_drive);
*/
int at91_set_pulldown(unsigned pin, int is_on)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
- if (!pio || !cpu_has_pio3)
+ if (!pio || !at91_gpio->ops->set_pulldown)
return -EINVAL;
/* Disable pull-up anyway */
- __raw_writel(mask, pio + PIO_PUDR);
- __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
+ at91_mux_set_pullup(pio, mask, 0);
+ at91_gpio->ops->set_pulldown(pio, mask, is_on);
return 0;
}
EXPORT_SYMBOL(at91_set_pulldown);
@@ -290,13 +396,14 @@ EXPORT_SYMBOL(at91_set_pulldown);
*/
int at91_disable_schmitt_trig(unsigned pin)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
- if (!pio || !cpu_has_pio3)
+ if (!pio || !at91_gpio->ops->disable_schmitt_trig)
return -EINVAL;
- __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
+ at91_gpio->ops->disable_schmitt_trig(pio, mask);
return 0;
}
EXPORT_SYMBOL(at91_disable_schmitt_trig);
@@ -306,7 +413,8 @@ EXPORT_SYMBOL(at91_disable_schmitt_trig);
*/
int at91_set_gpio_value(unsigned pin, int value)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
if (!pio)
@@ -321,7 +429,8 @@ EXPORT_SYMBOL(at91_set_gpio_value);
*/
int at91_get_gpio_value(unsigned pin)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
u32 pdsr;
@@ -334,25 +443,27 @@ EXPORT_SYMBOL(at91_get_gpio_value);
int gpio_direction_input(unsigned pin)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
if (!pio || !(__raw_readl(pio + PIO_PSR) & mask))
return -EINVAL;
- __raw_writel(mask, pio + PIO_ODR);
+ at91_mux_gpio_input(pio, mask, true);
return 0;
}
EXPORT_SYMBOL(gpio_direction_input);
int gpio_direction_output(unsigned pin, int value)
{
- void __iomem *pio = pin_to_controller(pin);
+ struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
+ void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
if (!pio || !(__raw_readl(pio + PIO_PSR) & mask))
return -EINVAL;
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- __raw_writel(mask, pio + PIO_OER);
+ at91_mux_gpio_input(pio, mask, false);
return 0;
}
EXPORT_SYMBOL(gpio_direction_output);
@@ -361,13 +472,15 @@ EXPORT_SYMBOL(gpio_direction_output);
static int at91_gpio_probe(struct device_d *dev)
{
- struct at91_gpio_chip *at91_gpio = &gpio_chip[dev->id];
+ struct at91_gpio_chip *at91_gpio;
struct clk *clk;
int ret;
BUG_ON(dev->id > MAX_GPIO_BANKS);
- ret = dev_get_drvdata(dev, (unsigned long *)&cpu_has_pio3);
+ at91_gpio = &gpio_chip[dev->id];
+
+ ret = dev_get_drvdata(dev, (unsigned long *)&at91_gpio->ops);
if (ret) {
dev_err(dev, "dev_get_drvdata failed: %d\n", ret);
return ret;
@@ -387,6 +500,7 @@ static int at91_gpio_probe(struct device_d *dev)
return ret;
}
+ at91_gpio->dev = dev;
gpio_banks = max(gpio_banks, dev->id + 1);
at91_gpio->regbase = dev_request_mem_region(dev, 0);
@@ -396,10 +510,10 @@ static int at91_gpio_probe(struct device_d *dev)
static struct platform_device_id at91_gpio_ids[] = {
{
.name = "at91rm9200-gpio",
- .driver_data = (unsigned long)0,
+ .driver_data = (unsigned long)&at91rm9200_ops,
}, {
.name = "at91sam9x5-gpio",
- .driver_data = (unsigned long)AT91_PIO3,
+ .driver_data = (unsigned long)&at91sam9x5_ops,
}, {
/* sentinel */
},
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index eef7bd2..16060b1 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -194,21 +194,59 @@ static inline int gpio_is_valid(int gpio)
#define AT91_PIN_PE30 (0x80 + 30)
#define AT91_PIN_PE31 (0x80 + 31)
+enum at91_mux {
+ AT91_MUX_GPIO = 0,
+ AT91_MUX_PERIPH_A = 1,
+ AT91_MUX_PERIPH_B = 2,
+ AT91_MUX_PERIPH_C = 3,
+ AT91_MUX_PERIPH_D = 4,
+};
+
/*
- * mux the pin to the "GPIO" peripheral role.
+ * mux the pin
*/
-int at91_set_GPIO_periph(unsigned pin, int use_pullup);
+int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup);
+/*
+ * mux the pin to the "GPIO" peripheral role.
+ */
+static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup)
+{
+ return at91_mux_pin(pin, AT91_MUX_GPIO, use_pullup);
+}
/*
* mux the pin to the "A" internal peripheral role.
*/
-int at91_set_A_periph(unsigned pin, int use_pullup);
+static inline int at91_set_A_periph(unsigned pin, int use_pullup)
+{
+ return at91_mux_pin(pin, AT91_MUX_PERIPH_A, use_pullup);
+}
/*
* mux the pin to the "B" internal peripheral role.
*/
-int at91_set_B_periph(unsigned pin, int use_pullup);
+static inline int at91_set_B_periph(unsigned pin, int use_pullup)
+{
+ return at91_mux_pin(pin, AT91_MUX_PERIPH_B, use_pullup);
+}
+
+/*
+ * mux the pin to the "C" internal peripheral role.
+ */
+static inline int at91_set_C_periph(unsigned pin, int use_pullup)
+{
+ return at91_mux_pin(pin, AT91_MUX_PERIPH_C, use_pullup);
+}
+
+/*
+ * mux the pin to the "C" internal peripheral role.
+ */
+static inline int at91_set_D_periph(unsigned pin, int use_pullup)
+{
+ return at91_mux_pin(pin, AT91_MUX_PERIPH_D, use_pullup);
+}
+
/*
* mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
* configure it for an input.
@@ -237,8 +275,6 @@ int at91_set_multi_drive(unsigned pin, int is_on);
*/
int at91_set_gpio_value(unsigned pin, int value);
-extern int at91_set_C_periph(unsigned pin, int use_pullup);
-extern int at91_set_D_periph(unsigned pin, int use_pullup);
extern int at91_set_debounce(unsigned pin, int is_on, int div);
extern int at91_set_pulldown(unsigned pin, int is_on);
extern int at91_disable_schmitt_trig(unsigned pin);
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 6/6] at91: switch to gpiolib
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
` (3 preceding siblings ...)
2012-12-20 14:31 ` [PATCH 5/6] at91: gpio: switch to ops Jean-Christophe PLAGNIOL-VILLARD
@ 2012-12-20 14:31 ` Jean-Christophe PLAGNIOL-VILLARD
4 siblings, 0 replies; 8+ messages in thread
From: Jean-Christophe PLAGNIOL-VILLARD @ 2012-12-20 14:31 UTC (permalink / raw)
To: barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
arch/arm/Kconfig | 2 +-
arch/arm/boards/at91sam9263ek/init.c | 2 +-
arch/arm/boards/mmccpu/init.c | 2 +-
arch/arm/boards/pm9263/init.c | 2 +-
arch/arm/boards/pm9g45/init.c | 2 +-
arch/arm/mach-at91/gpio.c | 118 +++++++++++++++++++-------------
arch/arm/mach-at91/include/mach/gpio.h | 25 +------
drivers/usb/gadget/at91_udc.c | 2 +-
8 files changed, 78 insertions(+), 77 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 2b5446b..f567531 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -26,7 +26,7 @@ choice
config ARCH_AT91
bool "Atmel AT91"
- select GENERIC_GPIO
+ select GPIOLIB
select CLKDEV_LOOKUP
select HAS_DEBUG_LL
select HAVE_MACH_ARM_HEAD
diff --git a/arch/arm/boards/at91sam9263ek/init.c b/arch/arm/boards/at91sam9263ek/init.c
index 50e4009..7334bae 100644
--- a/arch/arm/boards/at91sam9263ek/init.c
+++ b/arch/arm/boards/at91sam9263ek/init.c
@@ -176,7 +176,7 @@ static int at91sam9263ek_devices_init(void)
* 0 - disable
*/
at91_set_gpio_output(AT91_PIN_PB27, 1);
- at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
+ gpio_set_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
ek_add_device_nand();
at91_add_device_eth(0, &macb_pdata);
diff --git a/arch/arm/boards/mmccpu/init.c b/arch/arm/boards/mmccpu/init.c
index 67bfcea..1e6bbab 100644
--- a/arch/arm/boards/mmccpu/init.c
+++ b/arch/arm/boards/mmccpu/init.c
@@ -54,7 +54,7 @@ static int mmccpu_devices_init(void)
* 0 - disable
*/
at91_set_gpio_output(AT91_PIN_PB27, 1);
- at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
+ gpio_set_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
at91_add_device_eth(0, &macb_pdata);
add_cfi_flash_device(0, AT91_CHIPSELECT_0, 0, 0);
diff --git a/arch/arm/boards/pm9263/init.c b/arch/arm/boards/pm9263/init.c
index 6a92a67..f719c65 100644
--- a/arch/arm/boards/pm9263/init.c
+++ b/arch/arm/boards/pm9263/init.c
@@ -102,7 +102,7 @@ static void pm9263_phy_init(void)
* 0 - disable
*/
at91_set_gpio_output(AT91_PIN_PB27, 1);
- at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
+ gpio_set_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */
}
static void pm9263_add_device_eth(void)
diff --git a/arch/arm/boards/pm9g45/init.c b/arch/arm/boards/pm9g45/init.c
index a974139..fabe97b 100644
--- a/arch/arm/boards/pm9g45/init.c
+++ b/arch/arm/boards/pm9g45/init.c
@@ -126,7 +126,7 @@ static void pm9g45_phy_init(void)
* 0 - disable
*/
at91_set_gpio_output(AT91_PIN_PD2, 1);
- at91_set_gpio_value(AT91_PIN_PD2, 1);
+ gpio_set_value(AT91_PIN_PD2, 1);
}
static void pm9g45_add_device_eth(void)
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 5962b2a..9e71324 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -38,11 +38,13 @@ static int gpio_banks = 0;
* Functionnality can change with newer chips
*/
struct at91_gpio_chip {
- struct device_d *dev;
+ struct gpio_chip chip;
void __iomem *regbase; /* PIO bank virtual address */
struct at91_pinctrl_mux_ops *ops; /* ops */
};
+#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
+
static struct at91_gpio_chip gpio_chip[MAX_GPIO_BANKS];
static inline unsigned pin_to_bank(unsigned pin)
@@ -221,7 +223,7 @@ int at91_mux_pin(unsigned pin, enum at91_mux mux, int use_pullup)
void __iomem *pio = at91_gpio->regbase;
unsigned mask = pin_to_mask(pin);
int bank = pin_to_bank(pin);
- struct device_d *dev = at91_gpio->dev;
+ struct device_d *dev = at91_gpio->chip.dev;
if (!at91_gpio)
return -EINVAL;
@@ -287,7 +289,7 @@ int at91_set_gpio_input(unsigned pin, int use_pullup)
if (ret)
return ret;
- dev_dbg(at91_gpio->dev, "pio%c%d configured as input\n",
+ dev_dbg(at91_gpio->chip.dev, "pio%c%d configured as input\n",
pin_to_bank(pin) + 'A', pin_to_bank_offset(pin));
at91_mux_gpio_input(pio, mask, true);
@@ -310,7 +312,7 @@ int at91_set_gpio_output(unsigned pin, int value)
if (ret)
return ret;
- dev_dbg(at91_gpio->dev, "pio%c%d configured as output val = %d\n",
+ dev_dbg(at91_gpio->chip.dev, "pio%c%d configured as output val = %d\n",
pin_to_bank(pin) + 'A', pin_to_bank_offset(pin), value);
at91_mux_gpio_input(pio, mask, false);
@@ -408,67 +410,79 @@ int at91_disable_schmitt_trig(unsigned pin)
}
EXPORT_SYMBOL(at91_disable_schmitt_trig);
-/*
- * assuming the pin is muxed as a gpio output, set its value.
- */
-int at91_set_gpio_value(unsigned pin, int value)
+/*--------------------------------------------------------------------------*/
+
+static int at91_gpio_get(struct gpio_chip *chip, unsigned offset)
{
- struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
- void __iomem *pio = at91_gpio->regbase;
- unsigned mask = pin_to_mask(pin);
+ struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
+ void __iomem *pio = at91_gpio->regbase;
+ unsigned mask = 1 << offset;
+ u32 pdsr;
+
+ pdsr = __raw_readl(pio + PIO_PDSR);
+ return (pdsr & mask) != 0;
+}
+
+static void at91_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
+ void __iomem *pio = at91_gpio->regbase;
+ unsigned mask = 1 << offset;
- if (!pio)
- return -EINVAL;
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- return 0;
}
-EXPORT_SYMBOL(at91_set_gpio_value);
-/*
- * read the pin's value (works even if it's not muxed as a gpio).
- */
-int at91_get_gpio_value(unsigned pin)
+static int at91_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+ int value)
{
- struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
- void __iomem *pio = at91_gpio->regbase;
- unsigned mask = pin_to_mask(pin);
- u32 pdsr;
+ struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
+ void __iomem *pio = at91_gpio->regbase;
+ unsigned mask = 1 << offset;
- if (!pio)
- return -EINVAL;
- pdsr = __raw_readl(pio + PIO_PDSR);
- return (pdsr & mask) != 0;
+ __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
+ __raw_writel(mask, pio + PIO_OER);
+
+ return 0;
}
-EXPORT_SYMBOL(at91_get_gpio_value);
-int gpio_direction_input(unsigned pin)
+static int at91_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
- struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
- void __iomem *pio = at91_gpio->regbase;
- unsigned mask = pin_to_mask(pin);
+ struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
+ void __iomem *pio = at91_gpio->regbase;
+ unsigned mask = 1 << offset;
+
+ __raw_writel(mask, pio + PIO_ODR);
- if (!pio || !(__raw_readl(pio + PIO_PSR) & mask))
- return -EINVAL;
- at91_mux_gpio_input(pio, mask, true);
return 0;
}
-EXPORT_SYMBOL(gpio_direction_input);
-int gpio_direction_output(unsigned pin, int value)
+static int at91_gpio_request(struct gpio_chip *chip, unsigned offset)
{
- struct at91_gpio_chip *at91_gpio = pin_to_controller(pin);
- void __iomem *pio = at91_gpio->regbase;
- unsigned mask = pin_to_mask(pin);
+ struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip);
+ void __iomem *pio = at91_gpio->regbase;
+ unsigned mask = 1 << offset;
+
+ dev_dbg(chip->dev, "%s:%d pio%c%d(%d)\n", __func__, __LINE__,
+ 'A' + pin_to_bank(chip->base), offset, chip->base + offset);
+ at91_mux_gpio_enable(pio, mask);
- if (!pio || !(__raw_readl(pio + PIO_PSR) & mask))
- return -EINVAL;
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- at91_mux_gpio_input(pio, mask, false);
return 0;
}
-EXPORT_SYMBOL(gpio_direction_output);
-/*--------------------------------------------------------------------------*/
+static void at91_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+ dev_dbg(chip->dev, "%s:%d pio%c%d(%d)\n", __func__, __LINE__,
+ 'A' + pin_to_bank(chip->base), offset, chip->base + offset);
+}
+
+static struct gpio_ops at91_gpio_ops = {
+ .request = at91_gpio_request,
+ .free = at91_gpio_free,
+ .direction_input = at91_gpio_direction_input,
+ .direction_output = at91_gpio_direction_output,
+ .get = at91_gpio_get,
+ .set = at91_gpio_set,
+};
static int at91_gpio_probe(struct device_d *dev)
{
@@ -500,10 +514,20 @@ static int at91_gpio_probe(struct device_d *dev)
return ret;
}
- at91_gpio->dev = dev;
gpio_banks = max(gpio_banks, dev->id + 1);
at91_gpio->regbase = dev_request_mem_region(dev, 0);
+ at91_gpio->chip.ops = &at91_gpio_ops;
+ at91_gpio->chip.ngpio = MAX_NB_GPIO_PER_BANK;
+ at91_gpio->chip.dev = dev;
+ at91_gpio->chip.base = dev->id * MAX_NB_GPIO_PER_BANK;
+
+ ret = gpiochip_add(&at91_gpio->chip);
+ if (ret) {
+ dev_err(dev, "couldn't add gpiochip, ret = %d\n", ret);
+ return ret;
+ }
+
return 0;
}
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 16060b1..eb64bd4 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -17,18 +17,10 @@
#include <asm-generic/errno.h>
#include <mach/at91_pio.h>
#include <mach/hardware.h>
+#include <asm-generic/gpio.h>
#define ARCH_NR_GPIOS 256
-static inline int gpio_is_valid(int gpio)
-{
- if (gpio < 0)
- return 0;
- if (gpio < ARCH_NR_GPIOS)
- return 1;
- return 0;
-}
-
#define AT91_PIN_PA0 (0x00 + 0)
#define AT91_PIN_PA1 (0x00 + 1)
#define AT91_PIN_PA2 (0x00 + 2)
@@ -270,23 +262,8 @@ int at91_set_deglitch(unsigned pin, int is_on);
*/
int at91_set_multi_drive(unsigned pin, int is_on);
-/*
- * assuming the pin is muxed as a gpio output, set its value.
- */
-int at91_set_gpio_value(unsigned pin, int value);
-
extern int at91_set_debounce(unsigned pin, int is_on, int div);
extern int at91_set_pulldown(unsigned pin, int is_on);
extern int at91_disable_schmitt_trig(unsigned pin);
-/*
- * read the pin's value (works even if it's not muxed as a gpio).
- */
-int at91_get_gpio_value(unsigned pin);
-
-extern int gpio_direction_input(unsigned gpio);
-extern int gpio_direction_output(unsigned gpio, int value);
-#define gpio_get_value at91_get_gpio_value
-#define gpio_set_value at91_set_gpio_value
-
#endif /* __ASM_ARCH_AT91SAM9_GPIO_H */
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index a2cd99b..8a678f9 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -1501,7 +1501,7 @@ static int __init at91udc_probe(struct device_d *dev)
* Get the initial state of VBUS - we cannot expect
* a pending interrupt.
*/
- udc->vbus = at91_get_gpio_value(udc->board.vbus_pin);
+ udc->vbus = gpio_get_value(udc->board.vbus_pin);
DBG(udc, "VBUS detection: host:%s \n",
udc->vbus ? "present":"absent");
} else {
--
1.7.10.4
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/6] at91: mux cleanup and switch to gpiolib
2012-12-20 14:29 [PATCH 0/6] at91: mux cleanup and switch to gpiolib Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
@ 2012-12-22 18:39 ` Sascha Hauer
1 sibling, 0 replies; 8+ messages in thread
From: Sascha Hauer @ 2012-12-22 18:39 UTC (permalink / raw)
To: Jean-Christophe PLAGNIOL-VILLARD; +Cc: barebox
On Thu, Dec 20, 2012 at 03:29:02PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote:
> Hi,
>
> this patch series update the mux api of the at91 and use a part of the
> pinctrl from the kernel and switch tot hte gpiolib
>
> we also drop the fact taht a gpio is invalid if 0
>
> This pull depends on the gpiolib one
>
> The following changes since commit b1e244b763731fb16fee15a93f45fc8c5455628a:
>
> gpiolib: add command to dump the current gpio status (2012-12-18 23:09:05 +0800)
Applied, thanks
Sascha
>
> are available in the git repository at:
>
> git://git.jcrosoft.org/barebox.git delivery/at91_gpio
>
> for you to fetch changes up to 35fc9a4f9eb6eff72aa0bed5cad052f7e11a03ab:
>
> at91: switch to gpiolib (2012-12-18 23:09:08 +0800)
>
> ----------------------------------------------------------------
> Jean-Christophe PLAGNIOL-VILLARD (6):
> at91: use gpio_is_valid to check gpio
> at91: use -EINVAL for invalid gpio
> at91: drop PIN_BASE offset for gpio
> at91: gpio: switch to device driver
> at91: gpio: switch to ops
> at91: switch to gpiolib
>
> arch/arm/Kconfig | 2 +-
> arch/arm/boards/at91rm9200ek/init.c | 1 +
> arch/arm/boards/at91sam9260ek/init.c | 3 +-
> arch/arm/boards/at91sam9261ek/init.c | 2 +-
> arch/arm/boards/at91sam9263ek/init.c | 4 +-
> arch/arm/boards/at91sam9m10g45ek/init.c | 2 +-
> arch/arm/boards/at91sam9n12ek/init.c | 4 +-
> arch/arm/boards/at91sam9x5ek/init.c | 2 +-
> arch/arm/boards/dss11/init.c | 3 +-
> arch/arm/boards/mmccpu/init.c | 2 +-
> arch/arm/boards/pm9261/init.c | 2 +-
> arch/arm/boards/pm9263/init.c | 4 +-
> arch/arm/boards/pm9g45/init.c | 6 +-
> arch/arm/boards/qil-a9260/init.c | 4 +-
> arch/arm/boards/tny-a926x/init.c | 4 +-
> arch/arm/boards/usb-a926x/init.c | 3 +-
> arch/arm/mach-at91/at91rm9200.c | 46 ++++++-------
> arch/arm/mach-at91/at91rm9200_devices.c | 10 +--
> arch/arm/mach-at91/at91sam9260.c | 34 ++++------
> arch/arm/mach-at91/at91sam9260_devices.c | 14 ++--
> arch/arm/mach-at91/at91sam9261.c | 36 ++++------
> arch/arm/mach-at91/at91sam9261_devices.c | 14 ++--
> arch/arm/mach-at91/at91sam9263.c | 44 +++++-------
> arch/arm/mach-at91/at91sam9263_devices.c | 16 ++---
> arch/arm/mach-at91/at91sam9g45.c | 43 +++++-------
> arch/arm/mach-at91/at91sam9g45_devices.c | 14 ++--
> arch/arm/mach-at91/at91sam9n12.c | 38 +++++------
> arch/arm/mach-at91/at91sam9n12_devices.c | 14 ++--
> arch/arm/mach-at91/at91sam9x5.c | 38 +++++------
> arch/arm/mach-at91/at91sam9x5_devices.c | 14 ++--
> arch/arm/mach-at91/generic.h | 12 ++++
> arch/arm/mach-at91/gpio.c | 530 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----------------------------------------------
> arch/arm/mach-at91/include/mach/board.h | 12 ++--
> arch/arm/mach-at91/include/mach/gpio.h | 402 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-------------------------------------------------------
> drivers/mtd/nand/atmel_nand.c | 4 +-
> drivers/usb/gadget/at91_udc.c | 4 +-
> 36 files changed, 773 insertions(+), 614 deletions(-)
>
> Best Regards,
> J.
>
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2012-12-22 18:39 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-12-20 14:29 [PATCH 0/6] at91: mux cleanup and switch to gpiolib Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 1/6] at91: use gpio_is_valid to check gpio Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 2/6] at91: use -EINVAL for invalid gpio Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 3/6] at91: drop PIN_BASE offset for gpio Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 4/6] at91: gpio: switch to device driver Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 5/6] at91: gpio: switch to ops Jean-Christophe PLAGNIOL-VILLARD
2012-12-20 14:31 ` [PATCH 6/6] at91: switch to gpiolib Jean-Christophe PLAGNIOL-VILLARD
2012-12-22 18:39 ` [PATCH 0/6] at91: mux cleanup and " Sascha Hauer
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox