mail archive of the barebox mailing list
 help / color / mirror / Atom feed
* [PATCH v2 1/2] net/phy: add driver for atheros PHYs
@ 2013-12-02 18:21 Lucas Stach
  2013-12-02 18:21 ` [PATCH v2 2/2] ARM: i.MX6: add initial support for SolidRun Cubox-i Carrier-1 Lucas Stach
  2013-12-03 10:36 ` [PATCH v2 1/2] net/phy: add driver for atheros PHYs Sascha Hauer
  0 siblings, 2 replies; 3+ messages in thread
From: Lucas Stach @ 2013-12-02 18:21 UTC (permalink / raw)
  To: barebox

Based on Linux kernel 3.12 driver.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/net/phy/Kconfig  |   5 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/at803x.c | 121 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 127 insertions(+)
 create mode 100644 drivers/net/phy/at803x.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index b6ac9ee75076..83966f997f27 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -8,6 +8,11 @@ if PHYLIB
 
 comment "MII PHY device drivers"
 
+config AT803X_PHY
+	bool "Driver for Atheros AT803X PHYs"
+	---help---
+	  Currently supports the AT8030, AT8031 and AT8035 PHYs.
+
 config MICREL_PHY
 	bool "Driver for Micrel PHYs"
 	---help---
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 5f8191d8a7f5..47e2b423319f 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -1,3 +1,4 @@
 obj-y += phy.o mdio_bus.o
+obj-$(CONFIG_AT803X_PHY)	+= at803x.o
 obj-$(CONFIG_MICREL_PHY)	+= micrel.o
 obj-$(CONFIG_SMSC_PHY)		+= smsc.o
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
new file mode 100644
index 000000000000..a244c87cbafa
--- /dev/null
+++ b/drivers/net/phy/at803x.c
@@ -0,0 +1,121 @@
+/*
+ * drivers/net/phy/at803x.c
+ *
+ * Driver for Atheros 803x PHY
+ *
+ * Author: Matus Ujhelyi <ujhelyi.m@gmail.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <linux/phy.h>
+#include <linux/string.h>
+
+#define AT803X_INTR_ENABLE			0x12
+#define AT803X_INTR_STATUS			0x13
+#define AT803X_WOL_ENABLE			0x01
+#define AT803X_DEVICE_ADDR			0x03
+#define AT803X_LOC_MAC_ADDR_0_15_OFFSET		0x804C
+#define AT803X_LOC_MAC_ADDR_16_31_OFFSET	0x804B
+#define AT803X_LOC_MAC_ADDR_32_47_OFFSET	0x804A
+#define AT803X_MMD_ACCESS_CONTROL		0x0D
+#define AT803X_MMD_ACCESS_CONTROL_DATA		0x0E
+#define AT803X_FUNC_DATA			0x4003
+#define AT803X_DEBUG_ADDR			0x1D
+#define AT803X_DEBUG_DATA			0x1E
+#define AT803X_DEBUG_SYSTEM_MODE_CTRL		0x05
+#define AT803X_DEBUG_RGMII_TX_CLK_DLY		(1 << 8)
+
+static int at803x_config_init(struct phy_device *phydev)
+{
+	int val;
+	int ret;
+	u32 features;
+
+	features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI |
+		   SUPPORTED_FIBRE | SUPPORTED_BNC;
+
+	val = phy_read(phydev, MII_BMSR);
+	if (val < 0)
+		return val;
+
+	if (val & BMSR_ANEGCAPABLE)
+		features |= SUPPORTED_Autoneg;
+	if (val & BMSR_100FULL)
+		features |= SUPPORTED_100baseT_Full;
+	if (val & BMSR_100HALF)
+		features |= SUPPORTED_100baseT_Half;
+	if (val & BMSR_10FULL)
+		features |= SUPPORTED_10baseT_Full;
+	if (val & BMSR_10HALF)
+		features |= SUPPORTED_10baseT_Half;
+
+	if (val & BMSR_ESTATEN) {
+		val = phy_read(phydev, MII_ESTATUS);
+		if (val < 0)
+			return val;
+
+		if (val & ESTATUS_1000_TFULL)
+			features |= SUPPORTED_1000baseT_Full;
+		if (val & ESTATUS_1000_THALF)
+			features |= SUPPORTED_1000baseT_Half;
+	}
+
+	phydev->supported = features;
+	phydev->advertising = features;
+
+	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
+		ret = phy_write(phydev, AT803X_DEBUG_ADDR,
+				AT803X_DEBUG_SYSTEM_MODE_CTRL);
+		if (ret)
+			return ret;
+		ret = phy_write(phydev, AT803X_DEBUG_DATA,
+				AT803X_DEBUG_RGMII_TX_CLK_DLY);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static struct phy_driver at803x_driver[] = {
+{
+	/* ATHEROS 8035 */
+	.phy_id		= 0x004dd072,
+	.phy_id_mask	= 0xffffffef,
+	.drv.name	= "Atheros 8035 ethernet",
+	.config_init	= at803x_config_init,
+	.features	= PHY_GBIT_FEATURES,
+	.config_aneg	= &genphy_config_aneg,
+	.read_status	= &genphy_read_status,
+}, {
+	/* ATHEROS 8030 */
+	.phy_id		= 0x004dd076,
+	.phy_id_mask	= 0xffffffef,
+	.drv.name	= "Atheros 8030 ethernet",
+	.config_init	= at803x_config_init,
+	.features	= PHY_GBIT_FEATURES,
+	.config_aneg	= &genphy_config_aneg,
+	.read_status	= &genphy_read_status,
+}, {
+	/* ATHEROS 8031 */
+	.phy_id		= 0x004dd074,
+	.phy_id_mask	= 0xffffffef,
+	.drv.name	= "Atheros 8031 ethernet",
+	.config_init	= at803x_config_init,
+	.features	= PHY_GBIT_FEATURES,
+	.config_aneg	= &genphy_config_aneg,
+	.read_status	= &genphy_read_status,
+} };
+
+static int atheros_phy_init(void)
+{
+	return phy_drivers_register(at803x_driver,
+				    ARRAY_SIZE(at803x_driver));
+}
+fs_initcall(atheros_phy_init);
-- 
1.8.4.3


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH v2 2/2] ARM: i.MX6: add initial support for SolidRun Cubox-i Carrier-1
  2013-12-02 18:21 [PATCH v2 1/2] net/phy: add driver for atheros PHYs Lucas Stach
@ 2013-12-02 18:21 ` Lucas Stach
  2013-12-03 10:36 ` [PATCH v2 1/2] net/phy: add driver for atheros PHYs Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Lucas Stach @ 2013-12-02 18:21 UTC (permalink / raw)
  To: barebox

Tested to work:
- MMC
- USB
- Ethernet

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
v2:
- move barebox partition setup into DT
- rename flash header to avoid naming collision
- enable ethernet (needs commit "ARM: i.mx53: Parse Reset GPIO pin
  in FEC driver from Devicetree", which is already in -next)
---
 arch/arm/boards/Makefile                           |   1 +
 arch/arm/boards/solidrun-carrier-1/Makefile        |   3 +
 arch/arm/boards/solidrun-carrier-1/board.c         |  89 ++++++++++++++++
 .../flash-header-solidrun-carrier-1.imxcfg         |  79 ++++++++++++++
 arch/arm/boards/solidrun-carrier-1/lowlevel.c      |  18 ++++
 arch/arm/configs/imx_v7_defconfig                  |   2 +
 arch/arm/dts/Makefile                              |   4 +-
 arch/arm/dts/imx6dl-cubox-i-carrier-1.dts          | 116 +++++++++++++++++++++
 arch/arm/dts/imx6qdl-microsom-ar8035.dtsi          |  58 +++++++++++
 arch/arm/dts/imx6qdl-microsom.dtsi                 |  84 +++++++++++++++
 arch/arm/mach-imx/Kconfig                          |   4 +
 images/Makefile.imx                                |   5 +
 12 files changed, 462 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boards/solidrun-carrier-1/Makefile
 create mode 100644 arch/arm/boards/solidrun-carrier-1/board.c
 create mode 100644 arch/arm/boards/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg
 create mode 100644 arch/arm/boards/solidrun-carrier-1/lowlevel.c
 create mode 100644 arch/arm/dts/imx6dl-cubox-i-carrier-1.dts
 create mode 100644 arch/arm/dts/imx6qdl-microsom-ar8035.dtsi
 create mode 100644 arch/arm/dts/imx6qdl-microsom.dtsi

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index c273f0cb1e56..822ffd6347e5 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_MACH_SAMA5D3XEK)			+= sama5d3xek/
 obj-$(CONFIG_MACH_SCB9328)			+= scb9328/
 obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES)		+= ebv-socrates/
 obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT)	+= terasic-sockit/
+obj-$(CONFIG_MACH_SOLIDRUN_CARRIER1)	+= solidrun-carrier-1/
 obj-$(CONFIG_MACH_TNY_A9260)			+= tny-a926x/
 obj-$(CONFIG_MACH_TNY_A9263)			+= tny-a926x/
 obj-$(CONFIG_MACH_TNY_A9G20)			+= tny-a926x/
diff --git a/arch/arm/boards/solidrun-carrier-1/Makefile b/arch/arm/boards/solidrun-carrier-1/Makefile
new file mode 100644
index 000000000000..d243c8f1a3c5
--- /dev/null
+++ b/arch/arm/boards/solidrun-carrier-1/Makefile
@@ -0,0 +1,3 @@
+obj-y += board.o flash-header-solidrun-carrier-1.dcd.o
+extra-y += flash-header-solidrun-carrier-1.dcd.S flash-header-solidrun-carrier-1.dcd
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/solidrun-carrier-1/board.c b/arch/arm/boards/solidrun-carrier-1/board.c
new file mode 100644
index 000000000000..97c7440e0b4b
--- /dev/null
+++ b/arch/arm/boards/solidrun-carrier-1/board.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/armlinux.h>
+#include <asm/io.h>
+#include <bootsource.h>
+#include <common.h>
+#include <environment.h>
+#include <envfs.h>
+#include <gpio.h>
+#include <init.h>
+#include <mach/generic.h>
+#include <mach/imx6-regs.h>
+#include <mach/imx6.h>
+#include <mfd/imx6q-iomuxc-gpr.h>
+#include <sizes.h>
+#include <linux/phy.h>
+
+static int ar8035_phy_fixup(struct phy_device *dev)
+{
+	u16 val;
+
+	/* Ar803x phy SmartEEE feature cause link status generates glitch,
+	 * which cause ethernet link down/up issue, so disable SmartEEE
+	 */
+	phy_write(dev, 0xd, 0x3);
+	phy_write(dev, 0xe, 0x805d);
+	phy_write(dev, 0xd, 0x4003);
+
+	val = phy_read(dev, 0xe);
+	phy_write(dev, 0xe, val & ~(1 << 8));
+
+	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
+	phy_write(dev, 0xd, 0x7);
+	phy_write(dev, 0xe, 0x8016);
+	phy_write(dev, 0xd, 0x4007);
+
+	val = phy_read(dev, 0xe);
+	val &= 0xffe3;
+	val |= 0x18;
+	phy_write(dev, 0xe, val);
+
+	/* introduce tx clock delay */
+	phy_write(dev, 0x1d, 0x5);
+	val = phy_read(dev, 0x1e);
+	val |= 0x0100;
+	phy_write(dev, 0x1e, val);
+
+	return 0;
+}
+
+static int carrier1_device_init(void)
+{
+	if (!of_machine_is_compatible("solidrun,cubox-i-carrier-1"))
+			return 0;
+
+	phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup);
+
+	/* enable USB VBUS */
+	gpio_direction_output(IMX_GPIO_NR(3, 22), 1);
+	gpio_direction_output(IMX_GPIO_NR(1, 0), 1);
+
+	return 0;
+}
+device_initcall(carrier1_device_init);
+
+static int carrier1_lwl_init(void)
+{
+	if (!of_machine_is_compatible("solidrun,cubox-i-carrier-1"))
+		return 0;
+
+	barebox_set_hostname("carrier-1");
+
+	imx6_init_lowlevel();
+
+	return 0;
+}
+postcore_initcall(carrier1_lwl_init);
diff --git a/arch/arm/boards/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg b/arch/arm/boards/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg
new file mode 100644
index 000000000000..b1856b49ce1b
--- /dev/null
+++ b/arch/arm/boards/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg
@@ -0,0 +1,79 @@
+loadaddr 0x10000000
+soc imx6
+dcdofs 0x400
+wm 32 0x020e0774 0x000c0000
+wm 32 0x020e0754 0x00000000
+wm 32 0x020e04ac 0x00000030
+wm 32 0x020e04b0 0x00000030
+wm 32 0x020e0464 0x00000030
+wm 32 0x020e0490 0x00000030
+wm 32 0x020e074c 0x00000030
+wm 32 0x020e0494 0x00000030
+wm 32 0x020e04a4 0x00003000
+wm 32 0x020e04a8 0x00003000
+wm 32 0x020e04a0 0x00000000
+wm 32 0x020e04b4 0x00003030
+wm 32 0x020e04b8 0x00003030
+wm 32 0x020e076c 0x00000030
+wm 32 0x020e0750 0x00000000
+wm 32 0x020e04bc 0x00000030
+wm 32 0x020e04c0 0x00000030
+wm 32 0x020e04c4 0x00000030
+wm 32 0x020e04c8 0x00000030
+wm 32 0x020e04cc 0x00000000
+wm 32 0x020e04d0 0x00000000
+wm 32 0x020e04d4 0x00000000
+wm 32 0x020e04d8 0x00000000
+wm 32 0x020e0760 0x00000000
+wm 32 0x020e0764 0x00000030
+wm 32 0x020e0770 0x00000030
+wm 32 0x020e0778 0x00000030
+wm 32 0x020e077c 0x00000030
+wm 32 0x020e0780 0x00000000
+wm 32 0x020e0784 0x00000000
+wm 32 0x020e078c 0x00000000
+wm 32 0x020e0748 0x00000000
+wm 32 0x020e0470 0x00000030
+wm 32 0x020e0474 0x00000030
+wm 32 0x020e0478 0x00000030
+wm 32 0x020e047c 0x00000030
+wm 32 0x020e0480 0x00000000
+wm 32 0x020e0484 0x00000000
+wm 32 0x020e0488 0x00000000
+wm 32 0x020e048c 0x00000000
+wm 32 0x021b0800 0xa1390003
+wm 32 0x021b4800 0xa1390003
+wm 32 0x021b080c 0x000F0011
+wm 32 0x021b0810 0x000E000F
+wm 32 0x021b083c 0x42240229
+wm 32 0x021b0840 0x021a0219
+wm 32 0x021b0848 0x4e4f5150
+wm 32 0x021b0850 0x35363136
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b48b8 0x00000800
+wm 32 0x021b0004 0x0002002d
+wm 32 0x021b0008 0x00333030
+wm 32 0x021b000c 0x40445323
+wm 32 0x021b0010 0xb68e8c63
+wm 32 0x021b0014 0x01ff00db
+wm 32 0x021b0018 0x00001740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026d2
+wm 32 0x021b0030 0x00440e21
+wm 32 0x021b0040 0x00000017
+wm 32 0x021b0400 0x11420000
+wm 32 0x021b0000 0x83190000
+wm 32 0x021b001c 0x04008032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00428031
+wm 32 0x021b001c 0x07208030
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b0020 0x00005800
+wm 32 0x021b0818 0x00000007
+wm 32 0x021b0004 0x0002556d
+wm 32 0x021b0404 0x00011006
+wm 32 0x021b001c 0x00000000
diff --git a/arch/arm/boards/solidrun-carrier-1/lowlevel.c b/arch/arm/boards/solidrun-carrier-1/lowlevel.c
new file mode 100644
index 000000000000..21bc7870a5f5
--- /dev/null
+++ b/arch/arm/boards/solidrun-carrier-1/lowlevel.c
@@ -0,0 +1,18 @@
+#include <common.h>
+#include <sizes.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+
+extern char __dtb_imx6dl_cubox_i_carrier_1_start[];
+
+ENTRY_FUNCTION(start_imx6dl_cubox_i_carrier_1)(void)
+{
+	uint32_t fdt;
+
+	__barebox_arm_head();
+
+	arm_cpu_lowlevel_init();
+
+	fdt = (uint32_t)__dtb_imx6dl_cubox_i_carrier_1_start - get_runtime_offset();
+	barebox_arm_entry(0x10000000, SZ_512M, fdt);
+}
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index 10bdda6802c7..04791409d24d 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -8,6 +8,7 @@ CONFIG_MACH_DFI_FS700_M60=y
 CONFIG_MACH_REALQ7=y
 CONFIG_MACH_GK802=y
 CONFIG_MACH_TQMA6X=y
+CONFIG_MACH_SOLIDRUN_CARRIER1=y
 CONFIG_IMX_IIM=y
 CONFIG_IMX_IIM_FUSE_BLOW=y
 CONFIG_IMX_OCOTP=y
@@ -87,6 +88,7 @@ CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_OFDEVICE=y
 CONFIG_OF_BAREBOX_DRIVERS=y
+CONFIG_AT803X_PHY=y
 CONFIG_DRIVER_NET_FEC_IMX=y
 CONFIG_NET_USB=y
 CONFIG_NET_USB_ASIX=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 511adf45e4f7..c58d245ada12 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -9,7 +9,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \
 	imx6q-sabresd.dtb \
 	imx6dl-mba6x.dtb \
 	imx6q-mba6x.dtb \
-	imx6q-phytec-pbab01.dtb
+	imx6q-phytec-pbab01.dtb \
+	imx6dl-cubox-i-carrier-1.dtb
 dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \
 	socfpga_cyclone5_socrates.dtb
@@ -33,6 +34,7 @@ pbl-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o
 pbl-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o
 pbl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o
 pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o
+pbl-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += imx6dl-cubox-i-carrier-1.dtb.o
 
 .SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S
 .SECONDARY: $(patsubst %,$(obj)/%.S,$(dtb-y))
diff --git a/arch/arm/dts/imx6dl-cubox-i-carrier-1.dts b/arch/arm/dts/imx6dl-cubox-i-carrier-1.dts
new file mode 100644
index 000000000000..20c863fdfcea
--- /dev/null
+++ b/arch/arm/dts/imx6dl-cubox-i-carrier-1.dts
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2013 Russell King
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License version 2.
+ */
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-microsom.dtsi"
+#include "imx6qdl-microsom-ar8035.dtsi"
+
+/ {
+	model = "SolidRun Cubox-i DL/Solo Carrier-1 Board";
+	compatible = "solidrun,cubox-i-carrier-1", "fsl,imx6dl";
+	
+	chosen {
+		linux,stdout-path = &uart1;
+		
+		environment@0 {
+			compatible = "barebox,environment";
+			device-path = &usdhc2, "partname:barebox-environment";
+		};
+	};
+	
+	memory {
+		reg = <0x10000000 0x20000000>;
+	};
+
+	ir_recv: ir-receiver {
+		compatible = "gpio-ir-receiver";
+		gpios = <&gpio1 2 1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_carrier1_gpio1_2>;
+	};
+
+	codec: spdif-transmitter {
+		compatible = "linux,spdif-dit";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_carrier1_spdif>;
+	};
+
+	sound-spdif {
+		compatible = "fsl,imx-audio-spdif";
+		model = "imx-spdif";
+		/* IMX6 doesn't implement this yet */
+		spdif-controller = <&spdif>;
+		spdif-out;
+	};
+};
+
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1_1>;
+
+	/*
+	 * Not fitted on Carrier-1 board... yet
+	status = "okay";
+
+	rtc: pcf8523@68 {
+		compatible = "nxp,pcf8523";
+		reg = <0x68>;
+	};
+	 */
+};
+
+&iomuxc {
+	carrier1 {
+		pinctrl_carrier1_gpio1_2: carrier1-gpio1_2 {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
+			>;
+		};
+
+		pinctrl_carrier1_spdif: carrier1-spdif {
+			fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>;
+		};
+
+		pinctrl_carrier1_usdhc2: carrier1-usdhc2 {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
+				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
+				MX6QDL_PAD_GPIO_4__SD2_CD_B    0x1f071
+			>;
+		};
+	};
+};
+
+&spdif {
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_carrier1_usdhc2>;
+	vmmc-supply = <&reg_3p3v>;
+	fsl,cd-controller;
+	status = "okay";
+	
+	#address-cells = <1>;
+	#size-cells = <1>;
+	
+	partition@0 {
+		label = "barebox";
+		reg = <0x0 0x80000>;
+	};
+
+	partition@1 {
+		label = "barebox-environment";
+		reg = <0x80000 0x80000>;
+	};
+};
diff --git a/arch/arm/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/dts/imx6qdl-microsom-ar8035.dtsi
new file mode 100644
index 000000000000..c1be487dfc62
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-microsom-ar8035.dtsi
@@ -0,0 +1,58 @@
+/*
+ * Copyright 2013 Russell King
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License version 2.
+ *
+ * This describes the hookup for an AR8035 to the IMX6 on the Cubox-i
+ * MicroSOM.
+ *
+ * FIXME: we need to configure PLL_ENET to produce 25MHz, but there
+ * doesn't seem to be a way to do that yet from DT.  (Writing 0x2000
+ * to 0x020c80e0 phys will do this.)
+ */
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
+	phy-mode = "rgmii";
+	phy-reset-duration = <2>;
+	phy-reset-gpios = <&gpio4 15 0>;
+	status = "okay";
+};
+
+&iomuxc {
+	enet {
+		pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				/* AR8035 reset */
+				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0
+				/* AR8035 interrupt */
+				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x80000000
+				/* GPIO16 -> AR8035 25MHz */
+				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0xc0000000
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x80000000
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
+				/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1
+				/* AR8035 pin strapping: IO voltage: pull up */
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+				/* AR8035 pin strapping: PHYADDR#0: pull down */
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x130b0
+				/* AR8035 pin strapping: PHYADDR#1: pull down */
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x130b0
+				/* AR8035 pin strapping: MODE#1: pull up */
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
+				/* AR8035 pin strapping: MODE#3: pull up */
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
+				/* AR8035 pin strapping: MODE#0: pull down */
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x130b0
+			>;
+		};
+	};
+};
diff --git a/arch/arm/dts/imx6qdl-microsom.dtsi b/arch/arm/dts/imx6qdl-microsom.dtsi
new file mode 100644
index 000000000000..1d6d56d3303a
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-microsom.dtsi
@@ -0,0 +1,84 @@
+/*
+ * Copyright 2013 Russell King
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License version 2.
+ */
+/ {
+	regulators {
+		compatible = "simple-bus";
+
+		reg_3p3v: 3p3v {
+			compatible = "regulator-fixed";
+			regulator-name = "3P3V";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_usb_h1_vbus: usb_h1_vbus {
+			compatible = "regulator-fixed";
+			regulator-name = "usb_h1_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio1 0 0>;
+			enable-active-high;
+		};
+
+		reg_usb_otg_vbus: usb_otg_vbus {
+			compatible = "regulator-fixed";
+			regulator-name = "usb_otg_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio3 22 0>;
+			enable-active-high;
+		};
+	};
+};
+
+&can1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_microsom_flexcan1>;
+	status = "okay";
+};
+
+&iomuxc {
+	microsom {
+		pinctrl_microsom_flexcan1: microsom-flexcan1 {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
+				MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
+			>;
+		};
+
+		pinctrl_microsom_usbotg: microsom-usbotg {
+			/*
+			 * Similar to pinctrl_usbotg_2, but we want it
+			 * pulled down for a fixed host connection.
+			 */
+			fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
+		};
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1_1>;
+	status = "okay";
+};
+
+&usbotg {
+	phy_type = "utmi";
+	dr_mode = "host";
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_microsom_usbotg>;
+	status = "okay";
+};
+
+&usbh1 {
+	phy_type = "utmi";
+	dr_mode = "host";
+	vbus-supply = <&reg_usb_h1_vbus>;
+	status = "okay";
+};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 973aa3755b96..46bef5d836b4 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -219,6 +219,10 @@ config MACH_TQMA6X
 	bool "TQ tqma6x on mba6x"
 	select ARCH_IMX6
 
+config MACH_SOLIDRUN_CARRIER1
+	bool "SolidRun CuBox-i Carrier-1"
+	select ARCH_IMX6
+
 endif
 
 # ----------------------------------------------------------
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 794e3a3e09e9..2ee4ba608240 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -66,3 +66,8 @@ pblx-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6q_dfi_fs700_m60_6q
 CFG_start_imx6q_dfi_fs700_m60_6q.pblx.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6q.imxcfg
 FILE_barebox-dfi-fs700-m60-6q.img = start_imx6q_dfi_fs700_m60_6q.pblx.imximg
 image-$(CONFIG_MACH_DFI_FS700_M60) += barebox-dfi-fs700-m60-6q.img
+
+pblx-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += start_imx6dl_cubox_i_carrier_1
+CFG_start_imx6dl_cubox_i_carrier_1.pblx.imximg = $(board)/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg
+FILE_barebox-cubox-i-carrier-1.img = start_imx6dl_cubox_i_carrier_1.pblx.imximg
+image-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += barebox-cubox-i-carrier-1.img
-- 
1.8.4.3


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v2 1/2] net/phy: add driver for atheros PHYs
  2013-12-02 18:21 [PATCH v2 1/2] net/phy: add driver for atheros PHYs Lucas Stach
  2013-12-02 18:21 ` [PATCH v2 2/2] ARM: i.MX6: add initial support for SolidRun Cubox-i Carrier-1 Lucas Stach
@ 2013-12-03 10:36 ` Sascha Hauer
  1 sibling, 0 replies; 3+ messages in thread
From: Sascha Hauer @ 2013-12-03 10:36 UTC (permalink / raw)
  To: Lucas Stach; +Cc: barebox

On Mon, Dec 02, 2013 at 07:21:19PM +0100, Lucas Stach wrote:
> Based on Linux kernel 3.12 driver.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Fixed some whitespaces and applied both

Sascha

> ---
>  drivers/net/phy/Kconfig  |   5 ++
>  drivers/net/phy/Makefile |   1 +
>  drivers/net/phy/at803x.c | 121 +++++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 127 insertions(+)
>  create mode 100644 drivers/net/phy/at803x.c
> 
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> index b6ac9ee75076..83966f997f27 100644
> --- a/drivers/net/phy/Kconfig
> +++ b/drivers/net/phy/Kconfig
> @@ -8,6 +8,11 @@ if PHYLIB
>  
>  comment "MII PHY device drivers"
>  
> +config AT803X_PHY
> +	bool "Driver for Atheros AT803X PHYs"
> +	---help---
> +	  Currently supports the AT8030, AT8031 and AT8035 PHYs.
> +
>  config MICREL_PHY
>  	bool "Driver for Micrel PHYs"
>  	---help---
> diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
> index 5f8191d8a7f5..47e2b423319f 100644
> --- a/drivers/net/phy/Makefile
> +++ b/drivers/net/phy/Makefile
> @@ -1,3 +1,4 @@
>  obj-y += phy.o mdio_bus.o
> +obj-$(CONFIG_AT803X_PHY)	+= at803x.o
>  obj-$(CONFIG_MICREL_PHY)	+= micrel.o
>  obj-$(CONFIG_SMSC_PHY)		+= smsc.o
> diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
> new file mode 100644
> index 000000000000..a244c87cbafa
> --- /dev/null
> +++ b/drivers/net/phy/at803x.c
> @@ -0,0 +1,121 @@
> +/*
> + * drivers/net/phy/at803x.c
> + *
> + * Driver for Atheros 803x PHY
> + *
> + * Author: Matus Ujhelyi <ujhelyi.m@gmail.com>
> + *
> + * This program is free software; you can redistribute  it and/or modify it
> + * under  the terms of  the GNU General  Public License as published by the
> + * Free Software Foundation;  either version 2 of the  License, or (at your
> + * option) any later version.
> + */
> +
> +#include <common.h>
> +#include <init.h>
> +#include <linux/phy.h>
> +#include <linux/string.h>
> +
> +#define AT803X_INTR_ENABLE			0x12
> +#define AT803X_INTR_STATUS			0x13
> +#define AT803X_WOL_ENABLE			0x01
> +#define AT803X_DEVICE_ADDR			0x03
> +#define AT803X_LOC_MAC_ADDR_0_15_OFFSET		0x804C
> +#define AT803X_LOC_MAC_ADDR_16_31_OFFSET	0x804B
> +#define AT803X_LOC_MAC_ADDR_32_47_OFFSET	0x804A
> +#define AT803X_MMD_ACCESS_CONTROL		0x0D
> +#define AT803X_MMD_ACCESS_CONTROL_DATA		0x0E
> +#define AT803X_FUNC_DATA			0x4003
> +#define AT803X_DEBUG_ADDR			0x1D
> +#define AT803X_DEBUG_DATA			0x1E
> +#define AT803X_DEBUG_SYSTEM_MODE_CTRL		0x05
> +#define AT803X_DEBUG_RGMII_TX_CLK_DLY		(1 << 8)
> +
> +static int at803x_config_init(struct phy_device *phydev)
> +{
> +	int val;
> +	int ret;
> +	u32 features;
> +
> +	features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI |
> +		   SUPPORTED_FIBRE | SUPPORTED_BNC;
> +
> +	val = phy_read(phydev, MII_BMSR);
> +	if (val < 0)
> +		return val;
> +
> +	if (val & BMSR_ANEGCAPABLE)
> +		features |= SUPPORTED_Autoneg;
> +	if (val & BMSR_100FULL)
> +		features |= SUPPORTED_100baseT_Full;
> +	if (val & BMSR_100HALF)
> +		features |= SUPPORTED_100baseT_Half;
> +	if (val & BMSR_10FULL)
> +		features |= SUPPORTED_10baseT_Full;
> +	if (val & BMSR_10HALF)
> +		features |= SUPPORTED_10baseT_Half;
> +
> +	if (val & BMSR_ESTATEN) {
> +		val = phy_read(phydev, MII_ESTATUS);
> +		if (val < 0)
> +			return val;
> +
> +		if (val & ESTATUS_1000_TFULL)
> +			features |= SUPPORTED_1000baseT_Full;
> +		if (val & ESTATUS_1000_THALF)
> +			features |= SUPPORTED_1000baseT_Half;
> +	}
> +
> +	phydev->supported = features;
> +	phydev->advertising = features;
> +
> +	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
> +		ret = phy_write(phydev, AT803X_DEBUG_ADDR,
> +				AT803X_DEBUG_SYSTEM_MODE_CTRL);
> +		if (ret)
> +			return ret;
> +		ret = phy_write(phydev, AT803X_DEBUG_DATA,
> +				AT803X_DEBUG_RGMII_TX_CLK_DLY);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static struct phy_driver at803x_driver[] = {
> +{
> +	/* ATHEROS 8035 */
> +	.phy_id		= 0x004dd072,
> +	.phy_id_mask	= 0xffffffef,
> +	.drv.name	= "Atheros 8035 ethernet",
> +	.config_init	= at803x_config_init,
> +	.features	= PHY_GBIT_FEATURES,
> +	.config_aneg	= &genphy_config_aneg,
> +	.read_status	= &genphy_read_status,
> +}, {
> +	/* ATHEROS 8030 */
> +	.phy_id		= 0x004dd076,
> +	.phy_id_mask	= 0xffffffef,
> +	.drv.name	= "Atheros 8030 ethernet",
> +	.config_init	= at803x_config_init,
> +	.features	= PHY_GBIT_FEATURES,
> +	.config_aneg	= &genphy_config_aneg,
> +	.read_status	= &genphy_read_status,
> +}, {
> +	/* ATHEROS 8031 */
> +	.phy_id		= 0x004dd074,
> +	.phy_id_mask	= 0xffffffef,
> +	.drv.name	= "Atheros 8031 ethernet",
> +	.config_init	= at803x_config_init,
> +	.features	= PHY_GBIT_FEATURES,
> +	.config_aneg	= &genphy_config_aneg,
> +	.read_status	= &genphy_read_status,
> +} };
> +
> +static int atheros_phy_init(void)
> +{
> +	return phy_drivers_register(at803x_driver,
> +				    ARRAY_SIZE(at803x_driver));
> +}
> +fs_initcall(atheros_phy_init);
> -- 
> 1.8.4.3
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2013-12-03 10:36 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-12-02 18:21 [PATCH v2 1/2] net/phy: add driver for atheros PHYs Lucas Stach
2013-12-02 18:21 ` [PATCH v2 2/2] ARM: i.MX6: add initial support for SolidRun Cubox-i Carrier-1 Lucas Stach
2013-12-03 10:36 ` [PATCH v2 1/2] net/phy: add driver for atheros PHYs Sascha Hauer

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox