* [PATCH 0/4] ppc: memory layout and memtest
@ 2014-02-27 13:46 Renaud Barbier
2014-02-27 13:46 ` [PATCH 1/4] ppc: fix memory layout to prevent corruption during memtest Renaud Barbier
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Renaud Barbier @ 2014-02-27 13:46 UTC (permalink / raw)
To: barebox
This patchset updates the PPC memory layout and memtest:
- Memory regions on PPC are redefined to prevent corruption of critical memory
areas while running the memtest.
- To support the memory test framework with cache disabled, a TLB remapping
function is added for the memtest to enable/disable caching on a mapped
memory region.
- To prevent memtest failure, the memory test is updated to exclude memory
region at the bank start.
Finally, the configuration files are updated for the DA923RC and P2020RDB.
Renaud Barbier (4):
ppc: fix memory layout to prevent corruption during memtest
ppc: add support for memtest with cache disabled
memtest: exclude page starting at address 0.
ppc: P2020RDB and DA923RC configuration
arch/ppc/configs/da923rc_defconfig | 2 +
arch/ppc/configs/p2020rdb_defconfig | 2 +
arch/ppc/cpu-85xx/Makefile | 1 +
arch/ppc/cpu-85xx/mmu.c | 54 ++++++++++++++++++++++++++++++
arch/ppc/cpu-85xx/start.S | 3 --
arch/ppc/cpu-85xx/tlb.c | 17 +++++++++-
arch/ppc/include/asm/mmu.h | 6 +++
arch/ppc/lib/board.c | 6 +---
arch/ppc/mach-mpc85xx/Kconfig | 3 ++
arch/ppc/mach-mpc85xx/barebox.lds.S | 8 +++--
arch/ppc/mach-mpc85xx/include/mach/mmu.h | 5 +++
commands/memtest.c | 10 +++---
include/asm-generic/memory_layout.h | 4 ++
13 files changed, 104 insertions(+), 17 deletions(-)
create mode 100644 arch/ppc/cpu-85xx/mmu.c
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^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/4] ppc: fix memory layout to prevent corruption during memtest 2014-02-27 13:46 [PATCH 0/4] ppc: memory layout and memtest Renaud Barbier @ 2014-02-27 13:46 ` Renaud Barbier 2014-02-27 20:09 ` Sascha Hauer 2014-02-27 13:46 ` [PATCH 2/4] ppc: add support for memtest with cache disabled Renaud Barbier ` (2 subsequent siblings) 3 siblings, 1 reply; 8+ messages in thread From: Renaud Barbier @ 2014-02-27 13:46 UTC (permalink / raw) To: barebox Memory regions on PPC boards are incorrectly defined leading to corruption when running memory tests. This patch updates the memory layout of PPC boards so that critical memory regions can be correctly reserved during the memory test. Tested on the P2020RDB and DA923RC. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> --- arch/ppc/cpu-85xx/start.S | 3 --- arch/ppc/lib/board.c | 6 +----- arch/ppc/mach-mpc85xx/barebox.lds.S | 8 +++++--- include/asm-generic/memory_layout.h | 4 ++++ 4 files changed, 10 insertions(+), 11 deletions(-) diff --git a/arch/ppc/cpu-85xx/start.S b/arch/ppc/cpu-85xx/start.S index 0402cf0..57f007b 100644 --- a/arch/ppc/cpu-85xx/start.S +++ b/arch/ppc/cpu-85xx/start.S @@ -879,9 +879,6 @@ relocate_code: sub r3, r3, r5 lwz r5,GOT(__init_end) /* Copy to init_end only */ sub r5,r5,r4 - lis r10, 0xffff0000@h /* Round down to 64KB */ - ori r10, r10, 0xffff0000@l - and r3, r3, r10 /* Destination */ mr r1, r3 mr r10, r3 li r6,CACHELINE_SIZE diff --git a/arch/ppc/lib/board.c b/arch/ppc/lib/board.c index 18d2588..3f13db9 100644 --- a/arch/ppc/lib/board.c +++ b/arch/ppc/lib/board.c @@ -46,11 +46,7 @@ void board_init_r (ulong end_of_ram) _text_base = end_of_ram; #endif - /* - * FIXME: 128k stack size. Is this enough? should - * it be configurable? - */ - malloc_end = (_text_base - (128 << 10)) & ~(4095); + malloc_end = (_text_base - STACK_SIZE) & ~(4095); debug("malloc_end: 0x%08lx\n", malloc_end); debug("TEXT_BASE after relocation: 0x%08lx\n", _text_base); diff --git a/arch/ppc/mach-mpc85xx/barebox.lds.S b/arch/ppc/mach-mpc85xx/barebox.lds.S index 980359e..87ab7ac 100644 --- a/arch/ppc/mach-mpc85xx/barebox.lds.S +++ b/arch/ppc/mach-mpc85xx/barebox.lds.S @@ -32,6 +32,8 @@ PHDRS SECTIONS { . = TEXT_BASE; + _stext = .; + PROVIDE (stext = .); .interp : { *(.interp) } .hash : { *(.hash) } @@ -96,8 +98,6 @@ SECTIONS *(.dynamic*) CONSTRUCTORS } - _edata = .; - PROVIDE (edata = .); . = .; __barebox_cmd_start = .; @@ -118,6 +118,9 @@ SECTIONS __ex_table : { *(__ex_table) } __stop___ex_table = .; + _edata = .; + PROVIDE (edata = .); + . = ALIGN(256); __init_begin = .; .text.init : { *(.text.init) } @@ -130,7 +133,6 @@ SECTIONS .bootpg RESET_VECTOR_ADDRESS - 0xffc : { _text = .; - _stext = .; arch/ppc/cpu-85xx/start.o (.bootpg) } :text = 0xffff diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h index 45e0ed8..7a23db1 100644 --- a/include/asm-generic/memory_layout.h +++ b/include/asm-generic/memory_layout.h @@ -2,9 +2,13 @@ #define __ASM_GENERIC_MEMORY_LAYOUT_H #ifdef CONFIG_MEMORY_LAYOUT_DEFAULT +#ifdef CONFIG_PPC +#define STACK_BASE ((unsigned long)&_stext - CONFIG_STACK_SIZE) +#else #define MALLOC_BASE (TEXT_BASE - CONFIG_MALLOC_SIZE) #define STACK_BASE (TEXT_BASE - CONFIG_MALLOC_SIZE - CONFIG_STACK_SIZE) #endif +#endif #ifdef CONFIG_MEMORY_LAYOUT_FIXED #define STACK_BASE CONFIG_STACK_BASE -- 1.7.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] ppc: fix memory layout to prevent corruption during memtest 2014-02-27 13:46 ` [PATCH 1/4] ppc: fix memory layout to prevent corruption during memtest Renaud Barbier @ 2014-02-27 20:09 ` Sascha Hauer 0 siblings, 0 replies; 8+ messages in thread From: Sascha Hauer @ 2014-02-27 20:09 UTC (permalink / raw) To: Renaud Barbier; +Cc: barebox Hi Renaud, On Thu, Feb 27, 2014 at 01:46:56PM +0000, Renaud Barbier wrote: > Memory regions on PPC boards are incorrectly defined leading to > corruption when running memory tests. This patch updates the memory > layout of PPC boards so that critical memory regions can be correctly > reserved during the memory test. I think you are better off disabling CONFIGURABLE_MEMORY_LAYOUT for ppc and doing the memory layout completely on your own. You will have more freedom selecting suitable base/sizes for stack and malloc area. > diff --git a/include/asm-generic/memory_layout.h b/include/asm-generic/memory_layout.h > index 45e0ed8..7a23db1 100644 > --- a/include/asm-generic/memory_layout.h > +++ b/include/asm-generic/memory_layout.h > @@ -2,9 +2,13 @@ > #define __ASM_GENERIC_MEMORY_LAYOUT_H > > #ifdef CONFIG_MEMORY_LAYOUT_DEFAULT > +#ifdef CONFIG_PPC > +#define STACK_BASE ((unsigned long)&_stext - CONFIG_STACK_SIZE) > +#else Plus I don't really want to broaden the use of STACK_BASE, even less when you have to special case it for PPC. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/4] ppc: add support for memtest with cache disabled 2014-02-27 13:46 [PATCH 0/4] ppc: memory layout and memtest Renaud Barbier 2014-02-27 13:46 ` [PATCH 1/4] ppc: fix memory layout to prevent corruption during memtest Renaud Barbier @ 2014-02-27 13:46 ` Renaud Barbier 2014-02-27 13:46 ` [PATCH 3/4] memtest: exclude page starting at address 0 Renaud Barbier 2014-02-27 13:46 ` [PATCH 4/4] ppc: P2020RDB and DA923RC configuration Renaud Barbier 3 siblings, 0 replies; 8+ messages in thread From: Renaud Barbier @ 2014-02-27 13:46 UTC (permalink / raw) To: barebox Add support to enable caching on a memory region during the memory test. Tested on P2020RDB and DA923RC. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> --- arch/ppc/cpu-85xx/Makefile | 1 + arch/ppc/cpu-85xx/mmu.c | 54 ++++++++++++++++++++++++++++++ arch/ppc/cpu-85xx/tlb.c | 17 +++++++++- arch/ppc/include/asm/mmu.h | 6 +++ arch/ppc/mach-mpc85xx/include/mach/mmu.h | 5 +++ 5 files changed, 82 insertions(+), 1 deletions(-) create mode 100644 arch/ppc/cpu-85xx/mmu.c diff --git a/arch/ppc/cpu-85xx/Makefile b/arch/ppc/cpu-85xx/Makefile index 3ee0397..c649c4e 100644 --- a/arch/ppc/cpu-85xx/Makefile +++ b/arch/ppc/cpu-85xx/Makefile @@ -1,4 +1,5 @@ obj-y += traps.o obj-y += tlb.o +obj-$(CONFIG_MMU) += mmu.o extra-y += start.o extra-y += resetvec.o diff --git a/arch/ppc/cpu-85xx/mmu.c b/arch/ppc/cpu-85xx/mmu.c new file mode 100644 index 0000000..7e86e6b --- /dev/null +++ b/arch/ppc/cpu-85xx/mmu.c @@ -0,0 +1,54 @@ +/* + * Copyright 2014 GE Intelligent Platforms, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/cache.h> +#include <mach/mmu.h> + +void remap_range(void *_start, size_t size, uint32_t flags) +{ + uint32_t ptr, start, tsize, valid, wimge; + unsigned long epn; + phys_addr_t rpn = 0; + int esel = 0; + + ptr = start = (uint32_t)_start; + wimge = flags | MAS2_M; + + while (ptr < (start + size)) { + esel = e500_find_tlb_idx((void *)ptr, 1); + if (esel != -1) + break; + e500_read_tlbcam_entry(esel, &valid, &tsize, &epn, + &rpn); + if (flags & MAS2_I) { + flush_dcache(); + invalidate_icache(); + } + e500_set_tlb(1, epn, rpn, MAS3_SX|MAS3_SW|MAS3_SR, + (u8)wimge, 0, esel, tsize, 1); + /* convert tsize to bytes to increment address. */ + ptr += (1ULL << ((tsize) + 10)); + } +} + +uint32_t mmu_get_pte_cached_flags(void) +{ + return 0; +} + +uint32_t mmu_get_pte_uncached_flags(void) +{ + return MAS2_I; +} diff --git a/arch/ppc/cpu-85xx/tlb.c b/arch/ppc/cpu-85xx/tlb.c index a2739d0..3a5b413 100644 --- a/arch/ppc/cpu-85xx/tlb.c +++ b/arch/ppc/cpu-85xx/tlb.c @@ -50,7 +50,22 @@ void e500_init_tlbs(void) return ; } -static int e500_find_free_tlbcam(void) +void e500_read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, + unsigned long *epn, phys_addr_t *rpn) +{ + u32 _mas1; + + mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0)); + asm volatile("tlbre;isync"); + _mas1 = mfspr(MAS1); + + *valid = (_mas1 & MAS1_VALID); + *tsize = (_mas1 >> 7) & 0x1f; + *epn = mfspr(MAS2) & MAS2_EPN; + *rpn = mfspr(MAS3) & MAS3_RPN; +} + +int e500_find_free_tlbcam(void) { int ix; u32 _mas1; diff --git a/arch/ppc/include/asm/mmu.h b/arch/ppc/include/asm/mmu.h index 72233b4..6e15975 100644 --- a/arch/ppc/include/asm/mmu.h +++ b/arch/ppc/include/asm/mmu.h @@ -557,6 +557,11 @@ extern int write_bat(ppc_bat_t bat, unsigned long upper, unsigned long lower); #ifndef __ASSEMBLY__ +#ifdef CONFIG_MMU +void remap_range(void *_start, size_t size, uint32_t flags); +uint32_t mmu_get_pte_cached_flags(void); +uint32_t mmu_get_pte_uncached_flags(void); +#else static inline void remap_range(void *_start, size_t size, uint32_t flags) { } @@ -570,6 +575,7 @@ static inline uint32_t mmu_get_pte_uncached_flags(void) { return 0; } +#endif /* CONFIG_MMU */ #endif #endif /* _PPC_MMU_H_ */ diff --git a/arch/ppc/mach-mpc85xx/include/mach/mmu.h b/arch/ppc/mach-mpc85xx/include/mach/mmu.h index 00459e2..e2ecc62 100644 --- a/arch/ppc/mach-mpc85xx/include/mach/mmu.h +++ b/arch/ppc/mach-mpc85xx/include/mach/mmu.h @@ -13,6 +13,11 @@ #include <asm/mmu.h> #ifndef __ASSEMBLY__ +extern int e500_find_free_tlbcam(void); +extern void e500_read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, + unsigned long *epn, phys_addr_t *rpn); +extern void e500_read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, + unsigned long *epn, phys_addr_t *rpn); extern void e500_set_tlb(u8 tlb, u32 epn, u64 rpn, u8 perms, u8 wimge, u8 ts, u8 esel, u8 tsize, u8 iprot); extern void e500_disable_tlb(u8 esel); -- 1.7.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/4] memtest: exclude page starting at address 0. 2014-02-27 13:46 [PATCH 0/4] ppc: memory layout and memtest Renaud Barbier 2014-02-27 13:46 ` [PATCH 1/4] ppc: fix memory layout to prevent corruption during memtest Renaud Barbier 2014-02-27 13:46 ` [PATCH 2/4] ppc: add support for memtest with cache disabled Renaud Barbier @ 2014-02-27 13:46 ` Renaud Barbier 2014-02-27 20:44 ` Alexander Aring 2014-02-27 13:46 ` [PATCH 4/4] ppc: P2020RDB and DA923RC configuration Renaud Barbier 3 siblings, 1 reply; 8+ messages in thread From: Renaud Barbier @ 2014-02-27 13:46 UTC (permalink / raw) To: barebox memtest fails when a reserved sdram region is at the bank start at address 0. This patch supports the exclusion of memory region at the bank start. Tested on P2020RDB and DA923RC, qemuarm versatilepb. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> --- commands/memtest.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/commands/memtest.c b/commands/memtest.c index c82badc..a71576e 100644 --- a/commands/memtest.c +++ b/commands/memtest.c @@ -88,11 +88,11 @@ static int request_memtest_regions(struct list_head *list) * remember last used element */ start = PAGE_ALIGN(bank->res->start); - end = PAGE_ALIGN_DOWN(r->start) - 1; - size = end - start + 1; + end = PAGE_ALIGN_DOWN(r->start); r_prev = r; - if (start >= end) + if (start == end) continue; + size = end - start; ret = alloc_memtest_region(list, start, size); if (ret < 0) @@ -103,12 +103,12 @@ static int request_memtest_regions(struct list_head *list) * Between used regions */ start = PAGE_ALIGN(r_prev->end); - end = PAGE_ALIGN_DOWN(r->start) - 1; - size = end - start + 1; + end = PAGE_ALIGN_DOWN(r->start); r_prev = r; if (start >= end) continue; + size = end - start; ret = alloc_memtest_region(list, start, size); if (ret < 0) return ret; -- 1.7.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 3/4] memtest: exclude page starting at address 0. 2014-02-27 13:46 ` [PATCH 3/4] memtest: exclude page starting at address 0 Renaud Barbier @ 2014-02-27 20:44 ` Alexander Aring 0 siblings, 0 replies; 8+ messages in thread From: Alexander Aring @ 2014-02-27 20:44 UTC (permalink / raw) To: Renaud Barbier; +Cc: barebox Hi Renaud, thanks for finding this issue... I introduce it so sorry for that! - Alex _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 4/4] ppc: P2020RDB and DA923RC configuration 2014-02-27 13:46 [PATCH 0/4] ppc: memory layout and memtest Renaud Barbier ` (2 preceding siblings ...) 2014-02-27 13:46 ` [PATCH 3/4] memtest: exclude page starting at address 0 Renaud Barbier @ 2014-02-27 13:46 ` Renaud Barbier 3 siblings, 0 replies; 8+ messages in thread From: Renaud Barbier @ 2014-02-27 13:46 UTC (permalink / raw) To: barebox Enable memtest, MMU and iomem support on the P2020RDB and DA923RC. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> --- arch/ppc/configs/da923rc_defconfig | 2 ++ arch/ppc/configs/p2020rdb_defconfig | 2 ++ arch/ppc/mach-mpc85xx/Kconfig | 3 +++ 3 files changed, 7 insertions(+), 0 deletions(-) diff --git a/arch/ppc/configs/da923rc_defconfig b/arch/ppc/configs/da923rc_defconfig index da1b13a..6d3fbdb 100644 --- a/arch/ppc/configs/da923rc_defconfig +++ b/arch/ppc/configs/da923rc_defconfig @@ -61,3 +61,5 @@ CONFIG_CMD_VERSION=n CONFIG_OFTREE=y CONFIG_CMD_OFTREE_PROBE=y CONFIG_CMD_OFTREE=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_IOMEM=y diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig index 0f77903..868c060 100644 --- a/arch/ppc/configs/p2020rdb_defconfig +++ b/arch/ppc/configs/p2020rdb_defconfig @@ -32,3 +32,5 @@ CONFIG_I2C=y CONFIG_I2C_IMX=y CONFIG_CMD_I2C=y CONFIG_CMD_MIITOOL=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_IOMEM=y diff --git a/arch/ppc/mach-mpc85xx/Kconfig b/arch/ppc/mach-mpc85xx/Kconfig index dc2d2b7..74bad76 100644 --- a/arch/ppc/mach-mpc85xx/Kconfig +++ b/arch/ppc/mach-mpc85xx/Kconfig @@ -1,5 +1,8 @@ if ARCH_MPC85XX +config MMU + default y if CMD_MEMTEST + config TEXT_BASE hex default 0xeff80000 if P2020RDB -- 1.7.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 0/4] ppc: memory layout and memtest @ 2014-02-28 12:58 Renaud Barbier 2014-02-28 12:58 ` [PATCH 3/4] memtest: exclude page starting at address 0 Renaud Barbier 0 siblings, 1 reply; 8+ messages in thread From: Renaud Barbier @ 2014-02-28 12:58 UTC (permalink / raw) To: barebox Like version 1, this patchset updates the PPC memory layout and memtest with the addition of the first item below: - Move configurable memory layout selection from PPC to MPC5xxx and disable CONFIGURABLE_MEMORY_LAYOUT on MPC85xx platforms. - Memory regions on PPC are redefined to prevent corruption of critical memory areas while running the memtest. - To support the memory test framework with cache disabled, a TLB remapping function is added for the memtest to enable/disable caching on a mapped memory region. - To prevent memtest failure, the memory test is updated to exclude memory region at the bank start. Finally, the configuration files are updated for the DA923RC and P2020RDB. Renaud Barbier (4): MPC85xx: fix memory layout to prevent corruption during memtest ppc: add support for memtest with cache disabled memtest: exclude page starting at address 0. ppc: P2020RDB and DA923RC configuration arch/ppc/Kconfig | 1 - arch/ppc/configs/da923rc_defconfig | 2 + arch/ppc/configs/p2020rdb_defconfig | 2 + arch/ppc/cpu-85xx/Makefile | 1 + arch/ppc/cpu-85xx/mmu.c | 54 ++++++++++++++++++++++++++++++ arch/ppc/cpu-85xx/start.S | 3 -- arch/ppc/cpu-85xx/tlb.c | 17 +++++++++- arch/ppc/include/asm/mmu.h | 6 +++ arch/ppc/lib/board.c | 6 +--- arch/ppc/mach-mpc5xxx/Kconfig | 1 + arch/ppc/mach-mpc85xx/Kconfig | 3 ++ arch/ppc/mach-mpc85xx/barebox.lds.S | 8 +++-- arch/ppc/mach-mpc85xx/cpu.c | 11 ++++++ arch/ppc/mach-mpc85xx/include/mach/mmu.h | 5 +++ commands/memtest.c | 10 +++--- 15 files changed, 112 insertions(+), 18 deletions(-) create mode 100644 arch/ppc/cpu-85xx/mmu.c _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 3/4] memtest: exclude page starting at address 0. 2014-02-28 12:58 [PATCH v2 0/4] ppc: memory layout and memtest Renaud Barbier @ 2014-02-28 12:58 ` Renaud Barbier 0 siblings, 0 replies; 8+ messages in thread From: Renaud Barbier @ 2014-02-28 12:58 UTC (permalink / raw) To: barebox memtest fails when a reserved sdram region is at the bank start at address 0. This patch supports the exclusion of memory region at the bank start. Tested on P2020RDB and DA923RC, qemuarm versatilepb. Signed-off-by: Renaud Barbier <renaud.barbier@ge.com> --- commands/memtest.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/commands/memtest.c b/commands/memtest.c index c82badc..a71576e 100644 --- a/commands/memtest.c +++ b/commands/memtest.c @@ -88,11 +88,11 @@ static int request_memtest_regions(struct list_head *list) * remember last used element */ start = PAGE_ALIGN(bank->res->start); - end = PAGE_ALIGN_DOWN(r->start) - 1; - size = end - start + 1; + end = PAGE_ALIGN_DOWN(r->start); r_prev = r; - if (start >= end) + if (start == end) continue; + size = end - start; ret = alloc_memtest_region(list, start, size); if (ret < 0) @@ -103,12 +103,12 @@ static int request_memtest_regions(struct list_head *list) * Between used regions */ start = PAGE_ALIGN(r_prev->end); - end = PAGE_ALIGN_DOWN(r->start) - 1; - size = end - start + 1; + end = PAGE_ALIGN_DOWN(r->start); r_prev = r; if (start >= end) continue; + size = end - start; ret = alloc_memtest_region(list, start, size); if (ret < 0) return ret; -- 1.7.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2014-02-28 12:59 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2014-02-27 13:46 [PATCH 0/4] ppc: memory layout and memtest Renaud Barbier 2014-02-27 13:46 ` [PATCH 1/4] ppc: fix memory layout to prevent corruption during memtest Renaud Barbier 2014-02-27 20:09 ` Sascha Hauer 2014-02-27 13:46 ` [PATCH 2/4] ppc: add support for memtest with cache disabled Renaud Barbier 2014-02-27 13:46 ` [PATCH 3/4] memtest: exclude page starting at address 0 Renaud Barbier 2014-02-27 20:44 ` Alexander Aring 2014-02-27 13:46 ` [PATCH 4/4] ppc: P2020RDB and DA923RC configuration Renaud Barbier 2014-02-28 12:58 [PATCH v2 0/4] ppc: memory layout and memtest Renaud Barbier 2014-02-28 12:58 ` [PATCH 3/4] memtest: exclude page starting at address 0 Renaud Barbier
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