* [PATCH 1/9] common.h: use special IOMEM() for MIPS
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 2/9] MIPS: dts: use physical addresses (as Linux does) Antony Pavlov
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
include/common.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/common.h b/include/common.h
index de63571..fca9798 100644
--- a/include/common.h
+++ b/include/common.h
@@ -271,7 +271,13 @@ void barebox_set_model(const char *);
const char *barebox_get_hostname(void);
void barebox_set_hostname(const char *);
+#if defined(CONFIG_MIPS)
+#include <asm/addrspace.h>
+
+#define IOMEM(addr) ((void __force __iomem *)CKSEG1ADDR(addr))
+#else
#define IOMEM(addr) ((void __force __iomem *)(addr))
+#endif
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 2/9] MIPS: dts: use physical addresses (as Linux does)
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
2014-09-10 7:42 ` [PATCH 1/9] common.h: use special IOMEM() for MIPS Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 3/9] MIPS: xburst: add JZ4780 SoC support Antony Pavlov
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
With IOMEM() adapted for MIPS we can use physical addresses
in device tree reg property.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/dts/ar9331.dtsi | 10 +++++-----
arch/mips/dts/dlink-dir-320.dts | 4 ++--
arch/mips/dts/jz4755.dtsi | 30 +++++++++++++++---------------
arch/mips/dts/ls1b.dtsi | 16 ++++++++--------
arch/mips/dts/qemu-malta.dts | 14 +++++++-------
5 files changed, 37 insertions(+), 37 deletions(-)
diff --git a/arch/mips/dts/ar9331.dtsi b/arch/mips/dts/ar9331.dtsi
index 8280588..8e7afcd 100644
--- a/arch/mips/dts/ar9331.dtsi
+++ b/arch/mips/dts/ar9331.dtsi
@@ -10,24 +10,24 @@
device_type = "soc";
ranges;
- serial0: serial@b8020000 {
+ serial0: serial@18020000 {
compatible = "qca,ar9330-uart";
- reg = <0xb8020000 0x14>;
+ reg = <0x18020000 0x14>;
clocks = <&ar9331_clk AR933X_CLK_UART>;
status = "disabled";
};
ar9331_clk: clock {
compatible = "qca,ar933x-clk";
- reg = <0xb8050000 0x48>;
+ reg = <0x18050000 0x48>;
#clock-cells = <1>;
};
- spi: spi@bf000000{
+ spi: spi@1f000000{
#address-cells = <1>;
#size-cells = <0>;
compatible = "qca,ath79-spi";
- reg = <0xbf000000 0x01000000>;
+ reg = <0x1f000000 0x01000000>;
status = "disabled";
};
};
diff --git a/arch/mips/dts/dlink-dir-320.dts b/arch/mips/dts/dlink-dir-320.dts
index bad41d9..b961c9d 100644
--- a/arch/mips/dts/dlink-dir-320.dts
+++ b/arch/mips/dts/dlink-dir-320.dts
@@ -17,9 +17,9 @@
device_type = "soc";
ranges;
- serial0: serial@b8000300 {
+ serial0: serial@18000300 {
compatible = "ns16550a";
- reg = <0xb8000300 0x08>;
+ reg = <0x18000300 0x08>;
reg-shift = <0>;
clock-frequency = <25804800>;
status = "disabled";
diff --git a/arch/mips/dts/jz4755.dtsi b/arch/mips/dts/jz4755.dtsi
index b83d884..137156d 100644
--- a/arch/mips/dts/jz4755.dtsi
+++ b/arch/mips/dts/jz4755.dtsi
@@ -8,35 +8,35 @@
#size-cells = <1>;
ranges;
- wdt: wdt@b0002000 {
+ wdt: wdt@10002000 {
compatible = "ingenic,jz4740-wdt";
- reg = <0xb0002000 0x10>;
+ reg = <0x10002000 0x10>;
};
rtc: rtc@10003000 {
compatible = "ingenic,jz4740-rtc";
- reg = <0xb0003000 0x38>;
+ reg = <0x10003000 0x38>;
};
- serial0: serial@b0030000 {
+ serial0: serial@10030000 {
compatible = "ingenic,jz4740-uart";
- reg = <0xb0030000 0x20>;
+ reg = <0x10030000 0x20>;
reg-shift = <2>;
clock-frequency = <12000000>;
status = "disabled";
};
- serial1: serial@b0031000 {
+ serial1: serial@10031000 {
compatible = "ingenic,jz4740-uart";
- reg = <0xb0031000 0x20>;
+ reg = <0x10031000 0x20>;
reg-shift = <2>;
clock-frequency = <12000000>;
status = "disabled";
};
- serial2: serial@b0032000 {
+ serial2: serial@10032000 {
compatible = "ingenic,jz4740-uart";
- reg = <0xb0032000 0x20>;
+ reg = <0x10032000 0x20>;
reg-shift = <2>;
clock-frequency = <12000000>;
status = "disabled";
@@ -45,42 +45,42 @@
gpio0: gpio@10010000 {
compatible = "ingenic,jz4740-gpio";
gpio-controller;
- reg = <0xb0010000 0x100>;
+ reg = <0x10010000 0x100>;
#gpio-cells = <2>;
};
gpio1: gpio@10010100 {
compatible = "ingenic,jz4740-gpio";
gpio-controller;
- reg = <0xb0010100 0x100>;
+ reg = <0x10010100 0x100>;
#gpio-cells = <2>;
};
gpio2: gpio@10010200 {
compatible = "ingenic,jz4740-gpio";
gpio-controller;
- reg = <0xb0010200 0x100>;
+ reg = <0x10010200 0x100>;
#gpio-cells = <2>;
};
gpio3: gpio@10010300 {
compatible = "ingenic,jz4740-gpio";
gpio-controller;
- reg = <0xb0010300 0x100>;
+ reg = <0x10010300 0x100>;
#gpio-cells = <2>;
};
gpio4: gpio@10010400 {
compatible = "ingenic,jz4740-gpio";
gpio-controller;
- reg = <0xb0010400 0x100>;
+ reg = <0x10010400 0x100>;
#gpio-cells = <2>;
};
gpio5: gpio@10010500 {
compatible = "ingenic,jz4740-gpio";
gpio-controller;
- reg = <0xb0010500 0x100>;
+ reg = <0x10010500 0x100>;
#gpio-cells = <2>;
};
};
diff --git a/arch/mips/dts/ls1b.dtsi b/arch/mips/dts/ls1b.dtsi
index f4ff8b6..af7119f 100644
--- a/arch/mips/dts/ls1b.dtsi
+++ b/arch/mips/dts/ls1b.dtsi
@@ -8,33 +8,33 @@
device_type = "soc";
ranges;
- serial0: serial@bfe40000 {
+ serial0: serial@1fe40000 {
compatible = "ns16550a";
- reg = <0xbfe40000 0x8>;
+ reg = <0x1fe40000 0x8>;
reg-shift = <0>;
clock-frequency = <83000000>;
status = "disabled";
};
- serial1: serial@bfe44000 {
+ serial1: serial@1fe44000 {
compatible = "ns16550a";
- reg = <0xbfe44000 0x8>;
+ reg = <0x1fe44000 0x8>;
reg-shift = <0>;
clock-frequency = <83000000>;
status = "disabled";
};
- serial2: serial@bfe48000 {
+ serial2: serial@1fe48000 {
compatible = "ns16550a";
- reg = <0xbfe48000 0x8>;
+ reg = <0x1fe48000 0x8>;
reg-shift = <0>;
clock-frequency = <83000000>;
status = "disabled";
};
- serial3: serial@bfe4c000 {
+ serial3: serial@1fe4c000 {
compatible = "ns16550a";
- reg = <0xbfe4c000 0x8>;
+ reg = <0x1fe4c000 0x8>;
reg-shift = <0>;
clock-frequency = <83000000>;
status = "disabled";
diff --git a/arch/mips/dts/qemu-malta.dts b/arch/mips/dts/qemu-malta.dts
index cc1c960..9b0c594 100644
--- a/arch/mips/dts/qemu-malta.dts
+++ b/arch/mips/dts/qemu-malta.dts
@@ -17,9 +17,9 @@
reg = <0x00000000 0x10000000>;
};
- uart0: serial@b80003f8 {
+ uart0: serial@180003f8 {
compatible = "ns16550a";
- reg = <0xb80003f8 0x08>;
+ reg = <0x180003f8 0x08>;
reg-shift = <0>;
/* no matter for emulated port */
clock-frequency = <1843200>;
@@ -28,7 +28,7 @@
gpio: gpio@1f000b00 {
compatible = "mti,malta-fpga-i2c-gpio";
gpio-controller;
- reg = <0xbf000b00 0x20>;
+ reg = <0x1f000b00 0x20>;
#gpio-cells = <2>;
};
@@ -44,19 +44,19 @@
status = "disabled";
};
- uart2: serial@bf000900 {
+ uart2: serial@1f000900 {
compatible = "ns16550a";
- reg = <0xbf000900 0x40>;
+ reg = <0x1f000900 0x40>;
reg-shift = <3>;
/* no matter for emulated port */
clock-frequency = <1843200>;
};
- nor0: flash@be000000 {
+ nor0: flash@1e000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0xbe000000 0x00400000>;
+ reg = <0x1e000000 0x00400000>;
partition@0 {
label = "barebox";
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 3/9] MIPS: xburst: add JZ4780 SoC support
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
2014-09-10 7:42 ` [PATCH 1/9] common.h: use special IOMEM() for MIPS Antony Pavlov
2014-09-10 7:42 ` [PATCH 2/9] MIPS: dts: use physical addresses (as Linux does) Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 4/9] MIPS: add (another) Ingenic vendor ID Antony Pavlov
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
Old Ingenic SoCs (JZ4755, JZ4740) use MIPS32r1 ISA CPU cores
than latest ones (JZ4770, JZ4780) use MIPS32r2.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Kconfig | 1 -
arch/mips/mach-xburst/Kconfig | 7 +++++++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index bc68c67..40d5d83 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -82,7 +82,6 @@ config MACH_MIPS_LOONGSON
config MACH_MIPS_XBURST
bool "Ingenic XBurst-based boards"
- select SYS_HAS_CPU_MIPS32_R1
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_32BIT_KERNEL
select DRIVER_SERIAL_NS16550
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index f7b8470..4d57015 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -6,6 +6,13 @@ config ARCH_TEXT_BASE
config CPU_JZ4755
bool
+ select SYS_HAS_CPU_MIPS32_R1
+ select WATCHDOG
+ select WATCHDOG_JZ4740
+
+config CPU_JZ4780
+ bool
+ select SYS_HAS_CPU_MIPS32_R2
select WATCHDOG
select WATCHDOG_JZ4740
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 4/9] MIPS: add (another) Ingenic vendor ID
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
` (2 preceding siblings ...)
2014-09-10 7:42 ` [PATCH 3/9] MIPS: xburst: add JZ4780 SoC support Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 5/9] MIPS: xburst: debug_ll: rework common code, add JZ4780 support Antony Pavlov
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
The latest Ingenic CPUs (e.g. JZ4780) use new vendor ID.
Based on commit from https://github.com/MIPS/CI20_linux/tree/ci20-v3.16
commit 00b672aa52f299f1d67ab18274c3f5e5d5a15767
Author: Paul Burton <paul.burton@imgtec.com>
Date: Mon Jul 8 12:14:28 2013 +0100
MIPS: add (another) Ingenic vendor ID
Ingenic have switched to a new vendor ID for the Xburst core used in
their current SoCs such as the jz4780. Add this vendor ID and handle it
in addition to their former vendor ID.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/include/asm/cpu.h | 1 +
arch/mips/lib/cpu-probe.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index dcc2a27..572cabb 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -27,6 +27,7 @@
#define PRID_COMP_MIPS 0x010000
#define PRID_COMP_BROADCOM 0x020000
#define PRID_COMP_INGENIC 0xd00000
+#define PRID_COMP_INGENIC2 0xe10000
/*
* Assigned Processor ID (implementation) values for bits 15:8 of the PRId
diff --git a/arch/mips/lib/cpu-probe.c b/arch/mips/lib/cpu-probe.c
index 8235a54..4622bcd 100644
--- a/arch/mips/lib/cpu-probe.c
+++ b/arch/mips/lib/cpu-probe.c
@@ -158,6 +158,7 @@ void cpu_probe(void)
cpu_probe_broadcom(c);
break;
case PRID_COMP_INGENIC:
+ case PRID_COMP_INGENIC2:
cpu_probe_ingenic(c);
break;
}
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 5/9] MIPS: xburst: debug_ll: rework common code, add JZ4780 support
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
` (3 preceding siblings ...)
2014-09-10 7:42 ` [PATCH 4/9] MIPS: add (another) Ingenic vendor ID Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 6/9] MIPS: dts: add jz4780.dtsi Antony Pavlov
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/mach-xburst/Kconfig | 19 +++++---
.../mach-xburst/include/mach/debug_ll_jz4750d.h | 6 +--
.../mach-xburst/include/mach/debug_ll_jz4780.h | 51 ++++++++++++++++++++++
arch/mips/mach-xburst/include/mach/jz4780.h | 30 +++++++++++++
4 files changed, 98 insertions(+), 8 deletions(-)
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index 4d57015..e3db61e 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -27,21 +27,30 @@ config BOARD_RZX50
endchoice
if DEBUG_LL
-if CPU_JZ4755
choice
prompt "DEBUG_LL port"
-config JZ4750D_DEBUG_LL_UART0
+config JZ47XX_DEBUG_LL_UART0
+ depends on CPU_JZ4755 || CPU_JZ4780
bool "UART0"
-config JZ4750D_DEBUG_LL_UART1
+config JZ47XX_DEBUG_LL_UART1
+ depends on CPU_JZ4755 || CPU_JZ4780
bool "UART1"
-config JZ4750D_DEBUG_LL_UART2
+config JZ47XX_DEBUG_LL_UART2
+ depends on CPU_JZ4755 || CPU_JZ4780
bool "UART2"
+config JZ47XX_DEBUG_LL_UART3
+ depends on CPU_JZ4780
+ bool "UART3"
+
+config JZ47XX_DEBUG_LL_UART4
+ depends on CPU_JZ4780
+ bool "UART4"
+
endchoice
-endif # CPU_JZ4755
endif # DEBUG_LL
endif
diff --git a/arch/mips/mach-xburst/include/mach/debug_ll_jz4750d.h b/arch/mips/mach-xburst/include/mach/debug_ll_jz4750d.h
index 2a55dea..6d18366 100644
--- a/arch/mips/mach-xburst/include/mach/debug_ll_jz4750d.h
+++ b/arch/mips/mach-xburst/include/mach/debug_ll_jz4750d.h
@@ -20,15 +20,15 @@
#include <mach/jz4750d_regs.h>
-#ifdef CONFIG_JZ4750D_DEBUG_LL_UART0
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART0
#define DEBUG_LL_UART_ADDR UART0_BASE
#endif
-#ifdef CONFIG_JZ4750D_DEBUG_LL_UART1
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART1
#define DEBUG_LL_UART_ADDR UART1_BASE
#endif
-#ifdef CONFIG_JZ4750D_DEBUG_LL_UART2
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART2
#define DEBUG_LL_UART_ADDR UART2_BASE
#endif
diff --git a/arch/mips/mach-xburst/include/mach/debug_ll_jz4780.h b/arch/mips/mach-xburst/include/mach/debug_ll_jz4780.h
new file mode 100644
index 0000000..0bdc58c
--- /dev/null
+++ b/arch/mips/mach-xburst/include/mach/debug_ll_jz4780.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __INCLUDE_DEBUG_LL_JZ4780_H__
+#define __INCLUDE_DEBUG_LL_JZ4780_H__
+
+#include <mach/jz4780.h>
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART0
+#define DEBUG_LL_UART_ADDR JZ4780_UART0_BASE
+#endif
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART1
+#define DEBUG_LL_UART_ADDR JZ4780_UART1_BASE
+#endif
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART2
+#define DEBUG_LL_UART_ADDR JZ4780_UART2_BASE
+#endif
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART3
+#define DEBUG_LL_UART_ADDR JZ4780_UART3_BASE
+#endif
+
+#ifdef CONFIG_JZ47XX_DEBUG_LL_UART4
+#define DEBUG_LL_UART_ADDR JZ4780_UART4_BASE
+#endif
+
+#define DEBUG_LL_UART_SHIFT 2
+
+#ifndef DEBUG_LL_UART_CLK
+#define DEBUG_LL_UART_CLK (48000000 / 16)
+#endif
+#define DEBUG_LL_UART_BPS CONFIG_BAUDRATE
+#define DEBUG_LL_UART_DIVISOR (DEBUG_LL_UART_CLK / DEBUG_LL_UART_BPS)
+
+#endif /* __INCLUDE_DEBUG_LL_JZ4780_H__ */
diff --git a/arch/mips/mach-xburst/include/mach/jz4780.h b/arch/mips/mach-xburst/include/mach/jz4780.h
new file mode 100644
index 0000000..4503a93
--- /dev/null
+++ b/arch/mips/mach-xburst/include/mach/jz4780.h
@@ -0,0 +1,30 @@
+/*
+ * JZ4780 SoC definitions
+ *
+ * Copyright (c) 2013 Imagination Technologies
+ * Author: Paul Burton <paul.burton@imgtec.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __MIPS_ASM_MACH_JZ4780_JZ4780_H__
+#define __MIPS_ASM_MACH_JZ4780_JZ4780_H__
+
+/* APB bus devices */
+#define JZ4780_UART0_BASE 0xb0030000
+#define JZ4780_UART1_BASE 0xb0031000
+#define JZ4780_UART2_BASE 0xb0032000
+#define JZ4780_UART3_BASE 0xb0033000
+#define JZ4780_UART4_BASE 0xb0034000
+#define JZ4780_UARTn_BASE(n) (JZ4780_UART0_BASE + (n * 0x1000))
+
+#endif /* __MIPS_ASM_MACH_JZ4780_JZ4780_H__ */
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 6/9] MIPS: dts: add jz4780.dtsi
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
` (4 preceding siblings ...)
2014-09-10 7:42 ` [PATCH 5/9] MIPS: xburst: debug_ll: rework common code, add JZ4780 support Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 7/9] MIPS: add MIPS Creator CI20 board support Antony Pavlov
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
Based on file from https://github.com/MIPS/CI20_linux/tree/ci20-v3.16
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/dts/jz4780.dtsi | 56 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/arch/mips/dts/jz4780.dtsi b/arch/mips/dts/jz4780.dtsi
new file mode 100644
index 0000000..9f0de5d
--- /dev/null
+++ b/arch/mips/dts/jz4780.dtsi
@@ -0,0 +1,56 @@
+#include "skeleton.dtsi"
+
+/ {
+ soc {
+ model = "Ingenic JZ4780";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges = <>;
+
+ wdt: wdt@10002000 {
+ compatible = "ingenic,jz4740-wdt";
+ reg = <0x10002000 0x10>;
+ };
+
+ uart0: serial@10030000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10030000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart1: serial@10031000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10031000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart2: serial@10032000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10032000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart3: serial@10033000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10033000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ uart4: serial@10034000 {
+ compatible = "ingenic,jz4740-uart";
+ reg = <0x10034000 0x100>;
+ reg-shift = <2>;
+ clock-frequency = <48000000>;
+ status = "disabled";
+ };
+ };
+};
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 7/9] MIPS: add MIPS Creator CI20 board support
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
` (5 preceding siblings ...)
2014-09-10 7:42 ` [PATCH 6/9] MIPS: dts: add jz4780.dtsi Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 8/9] MIPS: add img-ci20_defconfig Antony Pavlov
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/Makefile | 1 +
arch/mips/boards/img-ci20/Makefile | 1 +
arch/mips/boards/img-ci20/board.c | 27 ++++++++++++++
.../img-ci20/include/board/board_pbl_start.h | 43 ++++++++++++++++++++++
arch/mips/boards/img-ci20/include/board/debug_ll.h | 23 ++++++++++++
arch/mips/dts/img-ci20.dts | 35 ++++++++++++++++++
arch/mips/mach-xburst/Kconfig | 4 ++
7 files changed, 134 insertions(+)
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index a3cf112..f3f4f67 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -89,6 +89,7 @@ board-$(CONFIG_BOARD_LOONGSON_TECH_LS1B) := loongson-ls1b
machine-$(CONFIG_MACH_MIPS_XBURST) := xburst
board-$(CONFIG_BOARD_RZX50) := ritmix-rzx50
+board-$(CONFIG_BOARD_CI20) := img-ci20
machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
diff --git a/arch/mips/boards/img-ci20/Makefile b/arch/mips/boards/img-ci20/Makefile
new file mode 100644
index 0000000..dcfc293
--- /dev/null
+++ b/arch/mips/boards/img-ci20/Makefile
@@ -0,0 +1 @@
+obj-y += board.o
diff --git a/arch/mips/boards/img-ci20/board.c b/arch/mips/boards/img-ci20/board.c
new file mode 100644
index 0000000..515ebae
--- /dev/null
+++ b/arch/mips/boards/img-ci20/board.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+
+static int ci20_hostname_init(void)
+{
+ barebox_set_hostname("ci20");
+
+ return 0;
+}
+console_initcall(ci20_hostname_init);
diff --git a/arch/mips/boards/img-ci20/include/board/board_pbl_start.h b/arch/mips/boards/img-ci20/include/board/board_pbl_start.h
new file mode 100644
index 0000000..26232f5
--- /dev/null
+++ b/arch/mips/boards/img-ci20/include/board/board_pbl_start.h
@@ -0,0 +1,43 @@
+/*
+ * Startup Code for Imagination Creator CI20 board
+ *
+ * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm/pbl_macros.h>
+#include <mach/debug_ll.h>
+#include <asm/pbl_nmon.h>
+
+ .macro board_pbl_start
+ .set push
+ .set noreorder
+
+ mips_disable_interrupts
+
+ /* CPU/SoC specific setup ... */
+ /* ... absent */
+
+ debug_ll_ns16550_init
+
+ debug_ll_ns16550_outc '.'
+ debug_ll_ns16550_outnl
+
+ mips_nmon
+
+ copy_to_link_location pbl_start
+
+ .set pop
+ .endm
diff --git a/arch/mips/boards/img-ci20/include/board/debug_ll.h b/arch/mips/boards/img-ci20/include/board/debug_ll.h
new file mode 100644
index 0000000..72612cf
--- /dev/null
+++ b/arch/mips/boards/img-ci20/include/board/debug_ll.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __INCLUDE_CI20_BOARD_DEBUG_LL_H__
+#define __INCLUDE_CI20_BOARD_DEBUG_LL_H__
+
+#include <mach/debug_ll_jz4780.h>
+
+#endif /* __INCLUDE_CI20_BOARD_DEBUG_LL_H__ */
diff --git a/arch/mips/dts/img-ci20.dts b/arch/mips/dts/img-ci20.dts
new file mode 100644
index 0000000..f2022dd
--- /dev/null
+++ b/arch/mips/dts/img-ci20.dts
@@ -0,0 +1,35 @@
+/*
+ * CI20 device tree
+ *
+ * Copyright (c) 2013 Imagination Technologies
+ * Author: Paul Burton <paul.burton@imgtec.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "jz4780.dtsi"
+
+/ {
+ model = "MIPS Creator CI20";
+ compatible = "img,ci20";
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x10000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/mips/mach-xburst/Kconfig b/arch/mips/mach-xburst/Kconfig
index e3db61e..f4a64c6 100644
--- a/arch/mips/mach-xburst/Kconfig
+++ b/arch/mips/mach-xburst/Kconfig
@@ -24,6 +24,10 @@ config BOARD_RZX50
select HAS_POWEROFF
select CPU_JZ4755
+config BOARD_CI20
+ bool "Imagination Creator CI20"
+ select CPU_JZ4780
+
endchoice
if DEBUG_LL
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 8/9] MIPS: add img-ci20_defconfig
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
` (6 preceding siblings ...)
2014-09-10 7:42 ` [PATCH 7/9] MIPS: add MIPS Creator CI20 board support Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-10 7:42 ` [PATCH 9/9] Documentation: add MIPS Creator CI20 board mini-howto Antony Pavlov
2014-09-11 6:02 ` [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Sascha Hauer
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
arch/mips/configs/img-ci20_defconfig | 42 ++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/mips/configs/img-ci20_defconfig b/arch/mips/configs/img-ci20_defconfig
new file mode 100644
index 0000000..56235c4
--- /dev/null
+++ b/arch/mips/configs/img-ci20_defconfig
@@ -0,0 +1,42 @@
+CONFIG_BUILTIN_DTB=y
+CONFIG_BUILTIN_DTB_NAME="img-ci20"
+CONFIG_MACH_MIPS_XBURST=y
+CONFIG_BOARD_CI20=y
+CONFIG_PBL_IMAGE=y
+CONFIG_GLOB=y
+CONFIG_HUSH_FANCY_PROMPT=y
+CONFIG_CMDLINE_EDITING=y
+CONFIG_AUTO_COMPLETE=y
+# CONFIG_DEFAULT_ENVIRONMENT is not set
+CONFIG_POLLER=y
+CONFIG_DEBUG_LL=y
+CONFIG_LONGHELP=y
+CONFIG_CMD_IOMEM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_BOOTM_SHOW_TYPE=y
+CONFIG_CMD_BOOTM_VERBOSE=y
+CONFIG_CMD_BOOTM_INITRD=y
+CONFIG_CMD_BOOTM_OFTREE=y
+CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_LOADS=y
+CONFIG_CMD_LOADY=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_SAVES=y
+CONFIG_CMD_UIMAGE=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_GETOPT=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_OFDEVICE=y
+# CONFIG_SPI is not set
+CONFIG_CLOCKSOURCE_DUMMY=y
+CONFIG_CLOCKSOURCE_DUMMY_RATE=3500
+CONFIG_SHA1=y
+CONFIG_SHA224=y
+CONFIG_SHA256=y
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 9/9] Documentation: add MIPS Creator CI20 board mini-howto
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
` (7 preceding siblings ...)
2014-09-10 7:42 ` [PATCH 8/9] MIPS: add img-ci20_defconfig Antony Pavlov
@ 2014-09-10 7:42 ` Antony Pavlov
2014-09-11 6:02 ` [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Sascha Hauer
9 siblings, 0 replies; 11+ messages in thread
From: Antony Pavlov @ 2014-09-10 7:42 UTC (permalink / raw)
To: barebox
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
---
Documentation/boards/mips/img-ci20.rst | 42 ++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/Documentation/boards/mips/img-ci20.rst b/Documentation/boards/mips/img-ci20.rst
new file mode 100644
index 0000000..8f5cd80
--- /dev/null
+++ b/Documentation/boards/mips/img-ci20.rst
@@ -0,0 +1,42 @@
+MIPS Creator CI20
+=================
+
+The MIPS Creator CI20 board is a high performance, fully featured
+Linux and Android development platform.
+
+Major hardware features include:
+
+ * Ingenic JZ4780 SoC (dual 1.2GHz MIPS32 processor);
+ * 1 GiB DDR3 memory;
+ * 8 GiB NAND Flash;
+ * 2 x UART;
+ * Davicom dm9000 10/100 Ethernet controller;
+ * 2 x USB (host and OTG);
+ * HDMI output;
+ * 14-pin ETAG connector;
+ * GPIO, SPI, I2C, ADC, expansion headers.
+
+
+The board uses U-Boot 2013.10 as bootloader.
+
+
+Running barebox
+---------------
+
+ 1. Boot the board with UART0 serial console. Stop the auto boot during U-boot.
+
+ 2. Upload ``zbarebox.bin`` via Ymodem to the board and then run:
+
+.. code-block:: none
+
+ ci20# loady 0xa8000000
+ ...
+ ci20# go 0xa8000000
+..
+
+
+Links
+-----
+
+ * http://store.imgtec.com/product/mips-creator-ci20
+ * http://elinux.org/MIPS_Creator_CI20
--
2.1.0
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^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support
2014-09-10 7:42 [PATCH 0/9] MIPS: xburst: add JZ4780 SoC and MIPS Creator CI20 board support Antony Pavlov
` (8 preceding siblings ...)
2014-09-10 7:42 ` [PATCH 9/9] Documentation: add MIPS Creator CI20 board mini-howto Antony Pavlov
@ 2014-09-11 6:02 ` Sascha Hauer
9 siblings, 0 replies; 11+ messages in thread
From: Sascha Hauer @ 2014-09-11 6:02 UTC (permalink / raw)
To: Antony Pavlov; +Cc: barebox
On Wed, Sep 10, 2014 at 11:42:17AM +0400, Antony Pavlov wrote:
> The MIPS Creator CI20 board is a high performance, fully featured
> Linux and Android development platform.
>
> The Creator CI20 is supplied free of charge to certain approved projects
> under Imagination's ecosystem.
>
> Please see http://store.imgtec.com/product/mips-creator-ci20/ for details.
>
> Barebox CI20-related changes are available on github:
> https://github.com/frantony/barebox/tree/next.ci20.20140910
>
>
> Antony Pavlov (9):
> common.h: use special IOMEM() for MIPS
> MIPS: dts: use physical addresses (as Linux does)
> MIPS: xburst: add JZ4780 SoC support
> MIPS: add (another) Ingenic vendor ID
> MIPS: xburst: debug_ll: rework common code, add JZ4780 support
> MIPS: dts: add jz4780.dtsi
> MIPS: add MIPS Creator CI20 board support
> MIPS: add img-ci20_defconfig
> Documentation: add MIPS Creator CI20 board mini-howto
Applied all, thanks
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
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^ permalink raw reply [flat|nested] 11+ messages in thread