From: Antony Pavlov <antonynpavlov@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 00/15] PCI bridges and Tegra PCI stuff
Date: Wed, 1 Oct 2014 11:19:39 +0400 [thread overview]
Message-ID: <20141001111939.a47affd2340d830a60237d20@gmail.com> (raw)
In-Reply-To: <20141001061721.GB4992@pengutronix.de>
On Wed, 1 Oct 2014 08:17:21 +0200
Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Thu, Sep 25, 2014 at 10:46:55PM +0200, Lucas Stach wrote:
> > Am Donnerstag, den 25.09.2014, 23:02 +0400 schrieb Antony Pavlov:
> > > On Thu, 25 Sep 2014 19:04:54 +0200
> > > Lucas Stach <dev@lynxeye.de> wrote:
> > >
> > > > Ok, I'm sending this out before it gathers any more dust.
> > > >
> > > > This still doesn't work on Tegra K1 and I also haven't got
> > > > around to finish the rtl8169 network driver, but it seems
> > > > this pile is already a worthwile improvement.
> > > >
> > > > First 7 patches are general barebox PCI improvements for
> > > > better tracking of PCI resources and handling bridge setup.
> > >
> > > I have tryed this series.
> > >
> > > I have got several
> > > 'BAR does not fit within bus IO res'
> > > messages on qemu-malta. So not all available pci devices were registered.
> > >
> > I think that's because patch 2 fixes a problem where IO resources would
> > be populated from the host controllers MEM resource. IO resources are
> > now properly accounted.
> >
> > From a quick look at the code it seems you aren't properly assigning the
> > resource.end for the IO region on malta. Can you please check this?
> > Otherwise please post the PCI debug messages.
>
> How do we proceed with this series? Antony, could you help debugging
> this?
Lucas is right. Malta's pci controller code assings wrong value for io resource.end.
I'm examining correspoinding linux kernel code, but I can't point a source of the problem just now.
--
Best regards,
Antony Pavlov
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prev parent reply other threads:[~2014-10-01 7:20 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-25 17:04 Lucas Stach
2014-09-25 17:04 ` [PATCH 01/15] pci: split out device init Lucas Stach
2014-09-25 17:04 ` [PATCH 02/15] pci: add resource enum Lucas Stach
2014-09-25 17:04 ` [PATCH 03/15] pci: properly populate prefetchable BARs Lucas Stach
2014-09-25 17:04 ` [PATCH 04/15] pci: setup bridges and traverse buses behind them Lucas Stach
2014-09-25 17:04 ` [PATCH 05/15] pci: prettyprint device names Lucas Stach
2014-09-25 17:05 ` [PATCH 06/15] pci: track parent<->child relationship Lucas Stach
2014-09-25 17:05 ` [PATCH 07/15] commands: lspci: go down into subordinate busses Lucas Stach
2014-09-25 17:05 ` [PATCH 08/15] clk: tegra: add PLLE setup functions Lucas Stach
2014-09-25 17:05 ` [PATCH 09/15] clk: tegra30: add PCIe clocks Lucas Stach
2014-09-25 17:05 ` [PATCH 10/15] i2c: tegra: move to fs initcall Lucas Stach
2014-09-25 17:05 ` [PATCH 11/15] ARM: tegra: beaver: enable PEX voltage rail Lucas Stach
2014-09-25 17:05 ` [PATCH 12/15] tegra: pmc: add powerdomain handling Lucas Stach
2014-09-25 17:05 ` [PATCH 13/15] of: import pci range parser from linux Lucas Stach
2014-09-25 17:05 ` [PATCH 14/15] pci: add Tegra host controller driver Lucas Stach
2014-09-25 17:05 ` [PATCH 15/15] ARM: tegra: advertise PCI support Lucas Stach
2014-09-25 19:02 ` [PATCH 00/15] PCI bridges and Tegra PCI stuff Antony Pavlov
2014-09-25 20:46 ` Lucas Stach
2014-10-01 6:17 ` Sascha Hauer
2014-10-01 7:19 ` Antony Pavlov [this message]
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