* Wrong relocation with Mini2440
@ 2014-10-09 22:24 luigi origa
2014-10-10 6:42 ` Sascha Hauer
0 siblings, 1 reply; 3+ messages in thread
From: luigi origa @ 2014-10-09 22:24 UTC (permalink / raw)
To: barebox
I'm trying to have barebox working on my mini2440. After many test,
today i got a jtag interface and after some check i found this:
- source s3c24x0_nand_boot -
2: ldr sp, =(TEXT_BASE - SZ_2M) /* Setup a temporary stack in SDRAM */
/*
* We still run at a location we are not linked to. But lets still running
* from the internal SRAM, this may speed up the boot
*/
push {lr}
bl nand_boot
pop {lr}
/*
* Adjust the return address to the correct address in SDRAM
*/
ldr r1, =(TEXT_BASE - SZ_2M)
add lr, lr, r1
mov pc, lr
- compiled s3c24x0_nand_boot -
ROM:00000320 loc_320 ; CODE XREF:
s3c24x0_nand_boot+10\x18j
ROM:00000320 MOV SP, #0x33C00000
ROM:00000324 STMFD SP!, {LR}
ROM:00000328 BL nand_boot
ROM:0000032C LDMFD SP!, {LR}
ROM:00000330 MOV R1, #0x33C00000
ROM:00000334 ADD LR, LR, R1
- source nand_boot -
void __nand_boot_init nand_boot(void)
{
void *dest = _text;
int size = ld_var(_barebox_image_size);
int page = 0;
s3c24x0_nand_load_image(dest, size, page);
}
- compiled nand_boot-
ROM:000001E0 MOV R1, R0 // size
ROM:000001E4 LDR R0, =0x33E00000 // *dest
ROM:000001E8 MOV R2, #0
ROM:000001EC LDMFD SP!, {R4,LR}
ROM:000001F0 B s3c24x0_nand_load_image
0x33c00000 is the sdram stack where the program should be copied from
nand. Unfortunately the function nand_boot copy from nand to sdram
@0x33e00000.
When s3c24x0_nand_boot try to jump in sdram, use a wrong address
(0x33c00220 instead 0x33e00220).
I don't know if the problem is in "TEXT_BASE - SZ_2M" or "_text".
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Wrong relocation with Mini2440
2014-10-09 22:24 Wrong relocation with Mini2440 luigi origa
@ 2014-10-10 6:42 ` Sascha Hauer
2014-10-10 14:25 ` luigi origa
0 siblings, 1 reply; 3+ messages in thread
From: Sascha Hauer @ 2014-10-10 6:42 UTC (permalink / raw)
To: luigi origa; +Cc: barebox
Hi Luigi,
On Fri, Oct 10, 2014 at 12:24:40AM +0200, luigi origa wrote:
> I'm trying to have barebox working on my mini2440. After many test,
> today i got a jtag interface and after some check i found this:
>
> - source s3c24x0_nand_boot -
> 2: ldr sp, =(TEXT_BASE - SZ_2M) /* Setup a temporary stack in SDRAM */
> /*
> * We still run at a location we are not linked to. But lets still running
> * from the internal SRAM, this may speed up the boot
> */
> push {lr}
> bl nand_boot
> pop {lr}
> /*
> * Adjust the return address to the correct address in SDRAM
> */
> ldr r1, =(TEXT_BASE - SZ_2M)
> add lr, lr, r1
>
> mov pc, lr
>
>
> - compiled s3c24x0_nand_boot -
> ROM:00000320 loc_320 ; CODE XREF:
> s3c24x0_nand_boot+10\x18j
> ROM:00000320 MOV SP, #0x33C00000
> ROM:00000324 STMFD SP!, {LR}
> ROM:00000328 BL nand_boot
> ROM:0000032C LDMFD SP!, {LR}
> ROM:00000330 MOV R1, #0x33C00000
> ROM:00000334 ADD LR, LR, R1
>
>
> - source nand_boot -
> void __nand_boot_init nand_boot(void)
> {
> void *dest = _text;
> int size = ld_var(_barebox_image_size);
> int page = 0;
>
> s3c24x0_nand_load_image(dest, size, page);
> }
>
>
> - compiled nand_boot-
> ROM:000001E0 MOV R1, R0 // size
> ROM:000001E4 LDR R0, =0x33E00000 // *dest
> ROM:000001E8 MOV R2, #0
> ROM:000001EC LDMFD SP!, {R4,LR}
> ROM:000001F0 B s3c24x0_nand_load_image
>
>
> 0x33c00000 is the sdram stack where the program should be copied from
> nand. Unfortunately the function nand_boot copy from nand to sdram
> @0x33e00000.
>
> When s3c24x0_nand_boot try to jump in sdram, use a wrong address
> (0x33c00220 instead 0x33e00220).
>
> I don't know if the problem is in "TEXT_BASE - SZ_2M" or "_text".
Do you have PBL enabled? Could you enable PBL if not? Additionally
could you revert:
commit 558d72dc5116fc6275ea77c783cc65d6d1a5b521
Author: Michael Olbrich <m.olbrich@pengutronix.de>
Date: Sun May 18 16:46:29 2014 +0200
ARM Samsung: fix booting from NAND with pbl
The ARM pbl is linked at (TEXT_BASE - SZ_2M). This conflicts with the temporary
stack used in s3c24x0_nand_boot. Moving the stack to (TEXT_BASE - SZ_2M) fixes
this problem. With this patch a compressed barebox with pbl can boot on
mini2440 from NAND.
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
I suspect This patch fixed booting with PBL enabled but broke booting
without PBL.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: Wrong relocation with Mini2440
2014-10-10 6:42 ` Sascha Hauer
@ 2014-10-10 14:25 ` luigi origa
0 siblings, 0 replies; 3+ messages in thread
From: luigi origa @ 2014-10-10 14:25 UTC (permalink / raw)
To: Sascha Hauer; +Cc: barebox
I tried enabling pbl with the default values and it works. I tried
also changing the address at 0x33c00000 (instead the default
0x33e00000) with pbl disabled and works again.
Thanks for the help.
Luigi
2014-10-10 8:42 GMT+02:00 Sascha Hauer <s.hauer@pengutronix.de>:
> Hi Luigi,
>
> On Fri, Oct 10, 2014 at 12:24:40AM +0200, luigi origa wrote:
>> I'm trying to have barebox working on my mini2440. After many test,
>> today i got a jtag interface and after some check i found this:
>>
>> - source s3c24x0_nand_boot -
>> 2: ldr sp, =(TEXT_BASE - SZ_2M) /* Setup a temporary stack in SDRAM */
>> /*
>> * We still run at a location we are not linked to. But lets still running
>> * from the internal SRAM, this may speed up the boot
>> */
>> push {lr}
>> bl nand_boot
>> pop {lr}
>> /*
>> * Adjust the return address to the correct address in SDRAM
>> */
>> ldr r1, =(TEXT_BASE - SZ_2M)
>> add lr, lr, r1
>>
>> mov pc, lr
>>
>>
>> - compiled s3c24x0_nand_boot -
>> ROM:00000320 loc_320 ; CODE XREF:
>> s3c24x0_nand_boot+10 j
>> ROM:00000320 MOV SP, #0x33C00000
>> ROM:00000324 STMFD SP!, {LR}
>> ROM:00000328 BL nand_boot
>> ROM:0000032C LDMFD SP!, {LR}
>> ROM:00000330 MOV R1, #0x33C00000
>> ROM:00000334 ADD LR, LR, R1
>>
>>
>> - source nand_boot -
>> void __nand_boot_init nand_boot(void)
>> {
>> void *dest = _text;
>> int size = ld_var(_barebox_image_size);
>> int page = 0;
>>
>> s3c24x0_nand_load_image(dest, size, page);
>> }
>>
>>
>> - compiled nand_boot-
>> ROM:000001E0 MOV R1, R0 // size
>> ROM:000001E4 LDR R0, =0x33E00000 // *dest
>> ROM:000001E8 MOV R2, #0
>> ROM:000001EC LDMFD SP!, {R4,LR}
>> ROM:000001F0 B s3c24x0_nand_load_image
>>
>>
>> 0x33c00000 is the sdram stack where the program should be copied from
>> nand. Unfortunately the function nand_boot copy from nand to sdram
>> @0x33e00000.
>>
>> When s3c24x0_nand_boot try to jump in sdram, use a wrong address
>> (0x33c00220 instead 0x33e00220).
>>
>> I don't know if the problem is in "TEXT_BASE - SZ_2M" or "_text".
>
> Do you have PBL enabled? Could you enable PBL if not? Additionally
> could you revert:
>
> commit 558d72dc5116fc6275ea77c783cc65d6d1a5b521
> Author: Michael Olbrich <m.olbrich@pengutronix.de>
> Date: Sun May 18 16:46:29 2014 +0200
>
> ARM Samsung: fix booting from NAND with pbl
>
> The ARM pbl is linked at (TEXT_BASE - SZ_2M). This conflicts with the temporary
> stack used in s3c24x0_nand_boot. Moving the stack to (TEXT_BASE - SZ_2M) fixes
> this problem. With this patch a compressed barebox with pbl can boot on
> mini2440 from NAND.
>
> Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
>
> I suspect This patch fixed booting with PBL enabled but broke booting
> without PBL.
>
> Sascha
>
>
> --
> Pengutronix e.K. | |
> Industrial Linux Solutions | http://www.pengutronix.de/ |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
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2014-10-10 6:42 ` Sascha Hauer
2014-10-10 14:25 ` luigi origa
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