From: Sascha Hauer <s.hauer@pengutronix.de>
To: Wadim Egorov <w.egorov@phytec.de>
Cc: barebox@lists.infradead.org
Subject: Re: [For next PATCH 1/2] arm: am33xx: Add rmii2_crs_dv mux selection in SMA2 register
Date: Mon, 3 Nov 2014 08:33:55 +0100 [thread overview]
Message-ID: <20141103073355.GA14443@pengutronix.de> (raw)
In-Reply-To: <1414670496-25123-1-git-send-email-w.egorov@phytec.de>
Hi Wadim,
On Thu, Oct 30, 2014 at 01:01:35PM +0100, Wadim Egorov wrote:
> "Silicon revision 1.0 devices only provide the MMC2_DAT7 signal when Mode3 is
> selected. Silicon revision 2.0 and newer devices implement another level of
> pin multiplexing which provides the original MMC2_DAT7 signal or RMII2_CRS_DV
> signal when Mode3 is selected. This new level of of pin multiplexing is
> selected with bit zero of the SMA2 register."
>
> See AM335x Sitara Processors Manual.
>
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> ---
> arch/arm/mach-omap/am33xx_generic.c | 12 ++++++++++++
> arch/arm/mach-omap/include/mach/am33xx-generic.h | 1 +
> 2 files changed, 13 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c
> index f293134..12764bc 100644
> --- a/arch/arm/mach-omap/am33xx_generic.c
> +++ b/arch/arm/mach-omap/am33xx_generic.c
> @@ -428,3 +428,15 @@ void am335x_sdram_init(int ioctrl, const struct am33xx_cmd_control *cmd_ctrl,
>
> am33xx_config_sdram(emif_regs);
> }
> +
> +#define AM33XX_CONTROL_SMA2_OFS 0x1320
> +
> +/**
> + * am33xx_select_rmii2_crs_dv - Select RMII2_CRS_DV on GPMC_A9 pin in MODE3
> + */
> +void am33xx_select_rmii2_crs_dv(void)
> +{
> + uint32_t val = readl(AM33XX_CTRL_BASE + AM33XX_CONTROL_SMA2_OFS);
> + val |= 0x00000001;
> + writel(val, AM33XX_CTRL_BASE + AM33XX_CONTROL_SMA2_OFS);
> +}
Is it OK to call this for Silicon revision 1.0 aswell? You seem to do so
in your second patch.
Sascha
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prev parent reply other threads:[~2014-11-03 7:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 12:01 Wadim Egorov
2014-10-30 12:01 ` [For next PATCH 2/2] phyFLEX: Select RMII2_CRS_DV on GPMC_A9 pin Wadim Egorov
2014-11-03 7:33 ` Sascha Hauer [this message]
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