* [PATCH 1/2] ARM: AM335x: dts: Fix wrong GPMC size mapping for omaps
@ 2015-07-15 13:47 Daniel Schultz
2015-07-15 13:47 ` [PATCH 2/2] ARM: am335x: Changed timer Daniel Schultz
2015-07-16 7:34 ` [PATCH 1/2] ARM: AM335x: dts: Fix wrong GPMC size mapping for omaps Sascha Hauer
0 siblings, 2 replies; 4+ messages in thread
From: Daniel Schultz @ 2015-07-15 13:47 UTC (permalink / raw)
To: barebox
Patch is based on Linux upstream patch:
commit e2c5eb78a3cc9b0d69ae924c33da50a4cd6d1fa4
Author: Tony Lindgren <tony@atomide.com>
The GPMC binding is obviously very confusing as the values
are all over the place. People seem to confuse the GPMC partition
size for the chip select, and the device IO size within the GPMC
partition easily.
The ranges entry contains the GPMC partition size. And the
reg entry contains the size of the IO registers of the
device connected to the GPMC.
Let's fix the issue according to the following table:
Device GPMC partition size Device IO size
connected in the ranges entry in the reg entry
NAND 0x01000000 (16MB) 4
16550 0x01000000 (16MB) 8
smc91x 0x01000000 (16MB) 0xf
smc911x 0x01000000 (16MB) 0xff
OneNAND 0x01000000 (16MB) 0x20000 (128KB)
16MB NOR 0x01000000 (16MB) 0x01000000 (16MB)
32MB NOR 0x02000000 (32MB) 0x02000000 (32MB)
64MB NOR 0x04000000 (64MB) 0x04000000 (64MB)
128MB NOR 0x08000000 (128MB) 0x08000000 (128MB)
256MB NOR 0x10000000 (256MB) 0x10000000 (256MB)
Let's also add comments to the fixed entries while at it.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/dts/am335x-phytec-phycard-som.dtsi | 4 ++--
arch/arm/dts/am335x-phytec-phycore-som.dtsi | 4 ++--
arch/arm/dts/am335x-phytec-phyflex-som.dtsi | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/am335x-phytec-phycard-som.dtsi b/arch/arm/dts/am335x-phytec-phycard-som.dtsi
index 1f1036f..c0b2456 100644
--- a/arch/arm/dts/am335x-phytec-phycard-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycard-som.dtsi
@@ -144,9 +144,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand: nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
index ed8e257..5cc4455 100644
--- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
@@ -228,9 +228,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand: nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
diff --git a/arch/arm/dts/am335x-phytec-phyflex-som.dtsi b/arch/arm/dts/am335x-phytec-phyflex-som.dtsi
index fc9c9ba..71f0a97 100644
--- a/arch/arm/dts/am335x-phytec-phyflex-som.dtsi
+++ b/arch/arm/dts/am335x-phytec-phyflex-som.dtsi
@@ -240,9 +240,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
nand: nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
+ reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
--
1.9.1
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^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 2/2] ARM: am335x: Changed timer
2015-07-15 13:47 [PATCH 1/2] ARM: AM335x: dts: Fix wrong GPMC size mapping for omaps Daniel Schultz
@ 2015-07-15 13:47 ` Daniel Schultz
2015-07-16 6:29 ` Sascha Hauer
2015-07-16 7:34 ` [PATCH 1/2] ARM: AM335x: dts: Fix wrong GPMC size mapping for omaps Sascha Hauer
1 sibling, 1 reply; 4+ messages in thread
From: Daniel Schultz @ 2015-07-15 13:47 UTC (permalink / raw)
To: barebox
The dmtimer0 is too inaccurate to be used for measurements.
We switch to the more accurate dmtimer2.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/mach-omap/Kconfig | 4 +-
arch/arm/mach-omap/Makefile | 2 +-
arch/arm/mach-omap/dmtimer0.c | 85 ----------------------
arch/arm/mach-omap/dmtimer2.c | 89 ++++++++++++++++++++++++
arch/arm/mach-omap/include/mach/am33xx-silicon.h | 3 +
5 files changed, 95 insertions(+), 88 deletions(-)
delete mode 100644 arch/arm/mach-omap/dmtimer0.c
create mode 100644 arch/arm/mach-omap/dmtimer2.c
diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
index af35975..0372906 100644
--- a/arch/arm/mach-omap/Kconfig
+++ b/arch/arm/mach-omap/Kconfig
@@ -43,7 +43,7 @@ config ARCH_AM33XX
select CPU_V7
select GENERIC_GPIO
select OFTREE
- select OMAP_CLOCK_SOURCE_DMTIMER0
+ select OMAP_CLOCK_SOURCE_DMTIMER2
help
Say Y here if you are using Texas Instrument's AM33xx based platform
@@ -51,7 +51,7 @@ config ARCH_AM33XX
config OMAP_CLOCK_SOURCE_S32K
bool
-config OMAP_CLOCK_SOURCE_DMTIMER0
+config OMAP_CLOCK_SOURCE_DMTIMER2
bool
config OMAP_GPMC
diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index 65072b9..e518755 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -18,7 +18,7 @@
obj-$(CONFIG_ARCH_OMAP) += syslib.o omap_devices.o omap_generic.o omap_fb.o
pbl-$(CONFIG_ARCH_OMAP) += syslib.o
obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o
-obj-$(CONFIG_OMAP_CLOCK_SOURCE_DMTIMER0) += dmtimer0.o
+obj-$(CONFIG_OMAP_CLOCK_SOURCE_DMTIMER2) += dmtimer2.o
obj-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
diff --git a/arch/arm/mach-omap/dmtimer0.c b/arch/arm/mach-omap/dmtimer0.c
deleted file mode 100644
index e536f8d..0000000
--- a/arch/arm/mach-omap/dmtimer0.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/**
- * @file
- * @brief Support DMTimer0 counter
- *
- * FileName: arch/arm/mach-omap/dmtimer0.c
- */
-/*
- * This File is based on arch/arm/mach-omap/s32k_clksource.c
- * (C) Copyright 2008
- * Texas Instruments, <www.ti.com>
- * Nishanth Menon <x0nishan@ti.com>
- *
- * (C) Copyright 2012 Teresa Gámez, Phytec Messtechnik GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <clock.h>
-#include <init.h>
-#include <io.h>
-#include <mach/am33xx-silicon.h>
-
-#define CLK_RC32K 32768
-
-#define TIDR 0x0
-#define TIOCP_CFG 0x10
-#define IRQ_EOI 0x20
-#define IRQSTATUS_RAW 0x24
-#define IRQSTATUS 0x28
-#define IRQSTATUS_SET 0x2c
-#define IRQSTATUS_CLR 0x30
-#define IRQWAKEEN 0x34
-#define TCLR 0x38
-#define TCRR 0x3C
-#define TLDR 0x40
-#define TTGR 0x44
-#define TWPS 0x48
-#define TMAR 0x4C
-#define TCAR1 0x50
-#define TSICR 0x54
-#define TCAR2 0x58
-
-/**
- * @brief Provide a simple counter read
- *
- * @return DMTimer0 counter
- */
-static uint64_t dmtimer0_read(void)
-{
- return readl(AM33XX_DMTIMER0_BASE + TCRR);
-}
-
-static struct clocksource dmtimer0_cs = {
- .read = dmtimer0_read,
- .mask = CLOCKSOURCE_MASK(32),
- .shift = 10,
-};
-
-/**
- * @brief Initialize the Clock
- *
- * Enable dmtimer0.
- *
- * @return result of @ref init_clock
- */
-static int dmtimer0_init(void)
-{
- dmtimer0_cs.mult = clocksource_hz2mult(CLK_RC32K, dmtimer0_cs.shift);
- /* Enable counter */
- writel(0x3, AM33XX_DMTIMER0_BASE + TCLR);
-
- return init_clock(&dmtimer0_cs);
-}
-
-/* Run me at boot time */
-core_initcall(dmtimer0_init);
diff --git a/arch/arm/mach-omap/dmtimer2.c b/arch/arm/mach-omap/dmtimer2.c
new file mode 100644
index 0000000..44440d7
--- /dev/null
+++ b/arch/arm/mach-omap/dmtimer2.c
@@ -0,0 +1,89 @@
+/**
+ * @file
+ * @brief Support DMTimer2 counter
+ *
+ * FileName: arch/arm/mach-omap/dmtimer2.c
+ */
+/*
+ * This File is based on arch/arm/mach-omap/s32k_clksource.c
+ * (C) Copyright 2008
+ * Texas Instruments, <www.ti.com>
+ * Nishanth Menon <x0nishan@ti.com>
+ *
+ * (C) Copyright 2012 Phytec Messtechnik GmbH
+ * Author: Teresa Gámez <t.gamez@phytec.de>
+ * (C) Copyright 2015 Phytec Messtechnik GmbH
+ * Author: Daniel Schultz <d.schultz@phytec.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <clock.h>
+#include <init.h>
+#include <io.h>
+#include <mach/am33xx-silicon.h>
+
+#define CLK_RC32K 32768
+#define CLK_M_OSC 25000000
+
+#define TIDR 0x0
+#define TIOCP_CFG 0x10
+#define IRQ_EOI 0x20
+#define IRQSTATUS_RAW 0x24
+#define IRQSTATUS 0x28
+#define IRQSTATUS_SET 0x2c
+#define IRQSTATUS_CLR 0x30
+#define IRQWAKEEN 0x34
+#define TCLR 0x38
+#define TCRR 0x3C
+#define TLDR 0x40
+#define TTGR 0x44
+#define TWPS 0x48
+#define TMAR 0x4C
+#define TCAR1 0x50
+#define TSICR 0x54
+#define TCAR2 0x58
+
+/**
+ * @brief Provide a simple counter read
+ *
+ * @return DMTimer2 counter
+ */
+static uint64_t dmtimer2_read(void)
+{
+ return readl(AM33XX_DMTIMER2_BASE + TCRR);
+}
+
+static struct clocksource dmtimer2_cs = {
+ .read = dmtimer2_read,
+ .mask = CLOCKSOURCE_MASK(32),
+ .shift = 10,
+};
+
+/**
+ * @brief Initialize the Clock
+ *
+ * Enable dmtimer2.
+ *
+ * @return result of @ref init_clock
+ */
+static int dmtimer2_init(void)
+{
+ dmtimer2_cs.mult = clocksource_hz2mult(CLK_M_OSC, dmtimer2_cs.shift);
+ /* Enable counter */
+ writel(0x3, AM33XX_DMTIMER2_BASE + TCLR);
+
+ return init_clock(&dmtimer2_cs);
+}
+
+/* Run me at boot time */
+core_initcall(dmtimer2_init);
diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
index 7c209ec..ee0b846 100644
--- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h
+++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
@@ -62,6 +62,9 @@
/* DTMTimer0 */
#define AM33XX_DMTIMER0_BASE (AM33XX_L4_WKUP_BASE + 0x205000)
+/* DMTIimer2 */
+#define AM33XX_DMTIMER2_BASE (AM33XX_L4_PER_BASE + 0x40000)
+#define AM33XX_CM_DPLL (AM33XX_L4_WKUP_BASE + 0x200500)
/* PRM */
#define AM33XX_PRM_BASE (AM33XX_L4_WKUP_BASE + 0x200000)
--
1.9.1
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^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] ARM: am335x: Changed timer
2015-07-15 13:47 ` [PATCH 2/2] ARM: am335x: Changed timer Daniel Schultz
@ 2015-07-16 6:29 ` Sascha Hauer
0 siblings, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2015-07-16 6:29 UTC (permalink / raw)
To: Daniel Schultz; +Cc: barebox
On Wed, Jul 15, 2015 at 03:47:54PM +0200, Daniel Schultz wrote:
> The dmtimer0 is too inaccurate to be used for measurements.
> We switch to the more accurate dmtimer2.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
> ---
> arch/arm/mach-omap/Kconfig | 4 +-
> arch/arm/mach-omap/Makefile | 2 +-
> arch/arm/mach-omap/dmtimer0.c | 85 ----------------------
> arch/arm/mach-omap/dmtimer2.c | 89 ++++++++++++++++++++++++
> arch/arm/mach-omap/include/mach/am33xx-silicon.h | 3 +
> 5 files changed, 95 insertions(+), 88 deletions(-)
> delete mode 100644 arch/arm/mach-omap/dmtimer0.c
> create mode 100644 arch/arm/mach-omap/dmtimer2.c
>
> diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig
> index af35975..0372906 100644
> --- a/arch/arm/mach-omap/Kconfig
> +++ b/arch/arm/mach-omap/Kconfig
> @@ -43,7 +43,7 @@ config ARCH_AM33XX
> select CPU_V7
> select GENERIC_GPIO
> select OFTREE
> - select OMAP_CLOCK_SOURCE_DMTIMER0
> + select OMAP_CLOCK_SOURCE_DMTIMER2
> help
> Say Y here if you are using Texas Instrument's AM33xx based platform
>
> @@ -51,7 +51,7 @@ config ARCH_AM33XX
> config OMAP_CLOCK_SOURCE_S32K
> bool
>
> -config OMAP_CLOCK_SOURCE_DMTIMER0
> +config OMAP_CLOCK_SOURCE_DMTIMER2
> bool
>
> config OMAP_GPMC
> diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
> index 65072b9..e518755 100644
> --- a/arch/arm/mach-omap/Makefile
> +++ b/arch/arm/mach-omap/Makefile
> @@ -18,7 +18,7 @@
> obj-$(CONFIG_ARCH_OMAP) += syslib.o omap_devices.o omap_generic.o omap_fb.o
> pbl-$(CONFIG_ARCH_OMAP) += syslib.o
> obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o
> -obj-$(CONFIG_OMAP_CLOCK_SOURCE_DMTIMER0) += dmtimer0.o
> +obj-$(CONFIG_OMAP_CLOCK_SOURCE_DMTIMER2) += dmtimer2.o
> obj-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
> obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
> diff --git a/arch/arm/mach-omap/dmtimer0.c b/arch/arm/mach-omap/dmtimer0.c
If you're renaming this, can you rename to dmtimer.c please? The
instance number shouldn't be in the filename. While at it you could
also use a static void *base instead of the address define directly.
This will make it more easy to support other timers later.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] ARM: AM335x: dts: Fix wrong GPMC size mapping for omaps
2015-07-15 13:47 [PATCH 1/2] ARM: AM335x: dts: Fix wrong GPMC size mapping for omaps Daniel Schultz
2015-07-15 13:47 ` [PATCH 2/2] ARM: am335x: Changed timer Daniel Schultz
@ 2015-07-16 7:34 ` Sascha Hauer
1 sibling, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2015-07-16 7:34 UTC (permalink / raw)
To: Daniel Schultz; +Cc: barebox
On Wed, Jul 15, 2015 at 03:47:53PM +0200, Daniel Schultz wrote:
> Patch is based on Linux upstream patch:
> commit e2c5eb78a3cc9b0d69ae924c33da50a4cd6d1fa4
> Author: Tony Lindgren <tony@atomide.com>
>
> The GPMC binding is obviously very confusing as the values
> are all over the place. People seem to confuse the GPMC partition
> size for the chip select, and the device IO size within the GPMC
> partition easily.
>
> The ranges entry contains the GPMC partition size. And the
> reg entry contains the size of the IO registers of the
> device connected to the GPMC.
>
> Let's fix the issue according to the following table:
>
> Device GPMC partition size Device IO size
> connected in the ranges entry in the reg entry
>
> NAND 0x01000000 (16MB) 4
> 16550 0x01000000 (16MB) 8
> smc91x 0x01000000 (16MB) 0xf
> smc911x 0x01000000 (16MB) 0xff
> OneNAND 0x01000000 (16MB) 0x20000 (128KB)
> 16MB NOR 0x01000000 (16MB) 0x01000000 (16MB)
> 32MB NOR 0x02000000 (32MB) 0x02000000 (32MB)
> 64MB NOR 0x04000000 (64MB) 0x04000000 (64MB)
> 128MB NOR 0x08000000 (128MB) 0x08000000 (128MB)
> 256MB NOR 0x10000000 (256MB) 0x10000000 (256MB)
>
> Let's also add comments to the fixed entries while at it.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Applied this one, thanks
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2015-07-15 13:47 [PATCH 1/2] ARM: AM335x: dts: Fix wrong GPMC size mapping for omaps Daniel Schultz
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