[PATCH v2 1/3] ARM: asm: Add convenience fucntions to access VBAR

[PATCH v2 1/3] ARM: asm: Add convenience fucntions to access VBAR

[Andrey Smirnov]

Add two functions to get/set VBAR register.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---

Changes since v1 (http://lists.infradead.org/pipermail/barebox/2015-December/025685.html):

 - Use CONFIG_CPU_32v7 instead of __LINUX_ARM_ARCH__

---
 arch/arm/include/asm/system.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 26fb18c..b118a42 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -71,6 +71,26 @@ static inline void set_cr(unsigned int val)
 	isb();
 }

+#ifdef CONFIG_CPU_32v7
+static inline unsigned int get_vbar(void)
+{
+	unsigned int vbar;
+	asm volatile("mrc p15, 0, %0, c12, c0, 0 @ get VBAR"
+		     : "=r" (vbar) : : "cc");
+	return vbar;
+}
+
+static inline void set_vbar(unsigned int vbar)
+{
+	asm volatile("mcr p15, 0, %0, c12, c0, 0 @ set VBAR"
+		     : : "r" (vbar) : "cc");
+	isb();
+}
+#else
+static inline unsigned int get_vbar(void) { return 0; }
+static inline void set_vbar(unsigned int vbar) {}
+#endif
+
 #endif

 #endif /* __ASM_ARM_SYSTEM_H */
--
2.5.0

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[PATCH 2/3] ARM: mmu: Add VBAR setup

[Andrey Smirnov]

Add code to make sure that normal vector exception table, when it is
used due to unavailability of the high vector table, was not re-mapped
from 0x0 via VBAR by someone else before us.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
Changes since v1 (http://lists.infradead.org/pipermail/barebox/2015-December/025685.html):

	- Check CPU architecture at runtime
---

 arch/arm/cpu/mmu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 784221c..bc5325f 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -302,6 +302,16 @@ static void vectors_init(void)
 		 * live without being able to catch NULL pointer dereferences
 		 */
 		exc = arm_create_pte(0x0);
+
+		if (cpu_architecture() >= CPU_ARCH_ARMv7) {
+			/*
+			 * ARMv7 CPUs allow to remap low vectors from
+			 * 0x0 to an arbitrary address using VBAR
+			 * register, so let's make sure we have it
+			 * pointing to the correct address
+			 */
+			set_vbar(0x0);
+		}
 	}

 	arm_fixup_vectors();
--
2.5.0

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[PATCH 3/3] ARM: Fix exception table setup in MMU-less mode

[Andrey Smirnov]

Add code necessary for correct initialization of exception vector
table when MMU is disabled.

Note: Only ARMv7 support is implemented

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
Changes since v1 (http://lists.infradead.org/pipermail/barebox/2015-December/025685.html):

	- Check CPU architecture at runtime
	- Remove untested code for ARMv5

---
 arch/arm/cpu/Makefile |  6 +++++
 arch/arm/cpu/no-mmu.c | 63 +++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 69 insertions(+)
 create mode 100644 arch/arm/cpu/no-mmu.c

diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 418bcab..f708e8f 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -11,6 +11,12 @@ obj-$(CONFIG_CMD_ARM_MMUINFO) += mmuinfo.o
 obj-$(CONFIG_OFDEVICE) += dtb.o
 obj-$(CONFIG_MMU) += mmu.o cache.o mmu-early.o
 pbl-$(CONFIG_MMU) += mmu-early.o
+
+ifeq ($(CONFIG_MMU),)
+obj-y += no-mmu.o
+pbl-y += no-mmu.o
+endif
+
 obj-$(CONFIG_CPU_32v4T) += cache-armv4.o
 pbl-$(CONFIG_CPU_32v4T) += cache-armv4.o
 obj-$(CONFIG_CPU_32v5) += cache-armv5.o
diff --git a/arch/arm/cpu/no-mmu.c b/arch/arm/cpu/no-mmu.c
new file mode 100644
index 0000000..4da053f
--- /dev/null
+++ b/arch/arm/cpu/no-mmu.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2015 Zodiac Inflight Innovation
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#define pr_fmt(fmt)	"nommu: " fmt
+
+#include <common.h>
+#include <dma-dir.h>
+#include <init.h>
+#include <mmu.h>
+#include <errno.h>
+#include <linux/sizes.h>
+#include <asm/memory.h>
+#include <asm/barebox-arm.h>
+#include <asm/system.h>
+#include <asm/cache.h>
+#include <memory.h>
+#include <asm/system_info.h>
+#include <debug_ll.h>
+
+
+#define __exceptions_size (__exceptions_stop - __exceptions_start)
+
+static int nommu_v7_vectors_init(void)
+{
+	if (cpu_architecture() < CPU_ARCH_ARMv7)
+		return 0;
+
+
+	void *vectors;
+	u32 cr;
+
+
+	/*
+	 * High vectors cannot be re-mapped, so we have to use normal
+	 * vectors
+	 */
+	cr = get_cr();
+	cr &= ~CR_V;
+	set_cr(cr);
+
+	arm_fixup_vectors();
+
+	vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
+	memset(vectors, 0, PAGE_SIZE);
+	memcpy(vectors, __exceptions_start, __exceptions_size);
+
+	set_vbar((unsigned int)vectors);
+
+	return 0;
+}
+mmu_initcall(nommu_v7_vectors_init);
--
2.5.0

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Re: [PATCH v2 1/3] ARM: asm: Add convenience fucntions to access VBAR

[Sascha Hauer]

On Sun, Jan 10, 2016 at 04:58:10PM -0800, Andrey Smirnov wrote:
> Add two functions to get/set VBAR register.
> 
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
> 
> Changes since v1 (http://lists.infradead.org/pipermail/barebox/2015-December/025685.html):
> 
>  - Use CONFIG_CPU_32v7 instead of __LINUX_ARM_ARCH__
> 
> ---
>  arch/arm/include/asm/system.h | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)

Applied, thanks

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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Re: [PATCH v2 1/3] ARM: asm: Add convenience fucntions to access VBAR

[Andrey Smirnov]

On Mon, Jan 11, 2016 at 2:49 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> On Sun, Jan 10, 2016 at 04:58:10PM -0800, Andrey Smirnov wrote:
>> Add two functions to get/set VBAR register.
>>
>> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
>> ---
>>
>> Changes since v1 (http://lists.infradead.org/pipermail/barebox/2015-December/025685.html):
>>
>>  - Use CONFIG_CPU_32v7 instead of __LINUX_ARM_ARCH__
>>
>> ---
>>  arch/arm/include/asm/system.h | 20 ++++++++++++++++++++
>>  1 file changed, 20 insertions(+)
>
> Applied, thanks

Sacha, I screwed up that subject line for two other patches in this
series (forgot to put v2), did you apply them as well or should I
resend them?

Thanks,
Andrey

>
> Sascha
>
> --
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [PATCH v2 1/3] ARM: asm: Add convenience fucntions to access VBAR

[Sascha Hauer]

On Mon, Jan 11, 2016 at 03:58:03PM -0800, Andrey Smirnov wrote:
> On Mon, Jan 11, 2016 at 2:49 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> > On Sun, Jan 10, 2016 at 04:58:10PM -0800, Andrey Smirnov wrote:
> >> Add two functions to get/set VBAR register.
> >>
> >> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> >> ---
> >>
> >> Changes since v1 (http://lists.infradead.org/pipermail/barebox/2015-December/025685.html):
> >>
> >>  - Use CONFIG_CPU_32v7 instead of __LINUX_ARM_ARCH__
> >>
> >> ---
> >>  arch/arm/include/asm/system.h | 20 ++++++++++++++++++++
> >>  1 file changed, 20 insertions(+)
> >
> > Applied, thanks
> 
> Sacha, I screwed up that subject line for two other patches in this
> series (forgot to put v2), did you apply them as well or should I
> resend them?

I applied the whole series, no need to resend anything.

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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