From: Sascha Hauer <s.hauer@pengutronix.de>
To: Stefan Christ <s.christ@phytec.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH v2] mci: imx-esdhc: implement reset quirks for i.MX6 DualLite/Solo
Date: Mon, 9 May 2016 08:41:45 +0200 [thread overview]
Message-ID: <20160509064145.GR19714@pengutronix.de> (raw)
In-Reply-To: <1462368357-7525-1-git-send-email-s.christ@phytec.de>
On Wed, May 04, 2016 at 03:25:57PM +0200, Stefan Christ wrote:
> First of all the reset values of MMC interfaces are differently between
> Quad and DualLite/Solo SoM.
>
> Register VEND_SPEC2(0xC8)
> Quad: 0x0
> DualLite: 0x00000006
> default: 0x00000006 (from i.MX6 Reference Manual)
>
> Furthermore the ROM Code of Quad and DualLite uses the MMC interfaces
> differently when it loads the bootloader from that device:
>
> Register DLL_CTRL(0x60) Bit 25 FBCLK_SEL (0x48)
> Quad: 0x0 0
> DualLite: 0x01000021 1
>
> Since the linux kernel and barebox driver doesn't reset all registers,
> the MMC interface is in an inconsistent state, which leads to boot
> failures for some eMMC devices on the i.MX6 DualLite SoM. The errors
> look like:
>
> mmcblk3: error -110 sending stop command, original cmd response 0x900, card status 0x400900
> mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0
> mmcblk3: retrying using single block read
> mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0
> blk_update_request: I/O error, dev mmcblk3, sector 24578
>
> It's sufficient to reset register DLL_CTRL and bit FBCLK_SEL. Register
> VEND_SPEC2 has no effect.
>
> Signed-off-by: Stefan Christ <s.christ@phytec.de>
Nice fix. Applied, thanks
Sascha
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prev parent reply other threads:[~2016-05-09 6:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-04 13:25 Stefan Christ
2016-05-09 6:41 ` Sascha Hauer [this message]
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