From: Sascha Hauer <s.hauer@pengutronix.de>
To: Sam Ravnborg <sam@ravnborg.org>
Cc: Barebox List <barebox@lists.infradead.org>
Subject: Re: [PATCH] ARM: i.MX6: Enable parent propagation for clk_gate2
Date: Wed, 14 Sep 2016 14:46:53 +0200 [thread overview]
Message-ID: <20160914124653.aqwpfbaptk2wj43z@pengutronix.de> (raw)
In-Reply-To: <20160914111114.GA15884@ravnborg.org>
On Wed, Sep 14, 2016 at 01:11:14PM +0200, Sam Ravnborg wrote:
> Hi Sascha.
>
> On Tue, Sep 13, 2016 at 04:08:09PM +0200, Sascha Hauer wrote:
> > Enable parent rate propagation for clk_gate2 to allow the
> > clock consumers to adjust their rates.
> > One effect of this is that the i.MX6 NAND controller now can adjust
> > its rate. It already called a clk_set_rate(rate, 96000000), but this
> > had no effect, so the clock stayed at reset default 24MHz resulting
> > in a rather slow timing. This became a problem when commit
> > "1daa3bc mtd: nand_mxs: Setup timing" introduced EDO timing mode for
> > faster NAND chips. EDO mode can only work properly for cycle times
> > < 30ns (at least that's specified in the ONFI spec). 1daa3bc resulted
> > in sporadic NAND read errors on some boards.
>
> Nice work!
>
> We have tested this patch on ~10 boards that failed
> with DMA errors before.
> None of these boards failed after applying this patch.
Great :)
Have you noticed the NAND is much faster now?
Sascha
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prev parent reply other threads:[~2016-09-14 12:47 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-13 14:08 Sascha Hauer
2016-09-14 11:11 ` Sam Ravnborg
2016-09-14 12:46 ` Sascha Hauer [this message]
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