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From: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
To: barebox@lists.infradead.org
Subject: [PATCH v2] pinctrl: mvebu: sync mpp names to Linux 4.9-rc1
Date: Wed, 19 Oct 2016 14:32:29 +0200	[thread overview]
Message-ID: <20161019123229.11583-1-u.kleine-koenig@pengutronix.de> (raw)
In-Reply-To: <20161019102123.vibu2i6p3rlu7ye4@pengutronix.de>

Linux changed several mpp names in commits:

	438881dfddb9 (pinctrl: mvebu: armada-370: fix spi0 pin description)
	bc99357f3690 (pinctrl: mvebu: armada-xp: remove non-existing NAND pins)
	80b3d04feab5 (pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions)
	100dc5d84095 (pinctrl: mvebu: armada-{38x,39x,xp}: normalize naming of DRAM functions)
	7bd6a26db6f9 (pinctrl: mvebu: armada-{370,375,38x,39x}: normalize dev pins)
	dae5597f253a (pinctrl: mvebu: armada-{370,375,38x,39x,xp}: normalize TDM pins)
	d4974c16ed22 (pinctrl: mvebu: armada-{370,375}: normalize PCIe pins)
	f32f01e1ba6b (pinctrl: mvebu: armada-{370,375}: normalize audio pins)
	a361cbc575d6 (pinctrl: mvebu: armada-{370,xp}: normalize ethernet txclkout pins)
	bfacb5669474 (pinctrl: mvebu: armada-370: align VDD cpu-pd pin naming with datasheet)
	9e05db29e2ac (pinctrl: mvebu: armada-370: align spi1 clock pin naming)
	50a7d13d2410 (pinctrl: mvebu: armada-xp: rename spi to spi0)
	88b355f1e4e5 (pinctrl: mvebu: armada-xp: add spi1 function)
	fb53b61d7768 (pinctrl: mvebu: armada-xp: add nand rb function)
	b19bf3797679 (pinctrl: mvebu: armada-xp: add dram functions)

Adapt the barebox mvebu drivers accordingly.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
Changes since (implict) v1:
 - rebase to master

 drivers/pinctrl/mvebu/armada-370.c | 22 ++++-----
 drivers/pinctrl/mvebu/armada-xp.c  | 93 ++++++++++++++++++++------------------
 2 files changed, 59 insertions(+), 56 deletions(-)

diff --git a/drivers/pinctrl/mvebu/armada-370.c b/drivers/pinctrl/mvebu/armada-370.c
index c2c1a0fa6399..2fd07a7b8737 100644
--- a/drivers/pinctrl/mvebu/armada-370.c
+++ b/drivers/pinctrl/mvebu/armada-370.c
@@ -50,12 +50,12 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x2, "uart0", "rxd")),
 	MPP_MODE(4, "mpp4", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
-	   MPP_FUNCTION(0x1, "cpu_pd", "vdd")),
+	   MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
 	MPP_MODE(5, "mpp5", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "ge0", "txclko"),
+	   MPP_FUNCTION(0x1, "ge0", "txclkout"),
 	   MPP_FUNCTION(0x2, "uart1", "txd"),
-	   MPP_FUNCTION(0x4, "spi1", "clk"),
+	   MPP_FUNCTION(0x4, "spi1", "sck"),
 	   MPP_FUNCTION(0x5, "audio", "mclk")),
 	MPP_MODE(6, "mpp6", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
@@ -66,7 +66,7 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	MPP_MODE(7, "mpp7", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
 	   MPP_FUNCTION(0x1, "ge0", "txd1"),
-	   MPP_FUNCTION(0x4, "tdm", "tdx"),
+	   MPP_FUNCTION(0x4, "tdm", "dtx"),
 	   MPP_FUNCTION(0x5, "audio", "lrclk")),
 	MPP_MODE(8, "mpp8", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
@@ -205,11 +205,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x2, "spi0", "cs0")),
 	MPP_MODE(34, "mpp34", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "wen0"),
+	   MPP_FUNCTION(0x1, "dev", "we0"),
 	   MPP_FUNCTION(0x2, "spi0", "mosi")),
 	MPP_MODE(35, "mpp35", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "oen"),
+	   MPP_FUNCTION(0x1, "dev", "oe"),
 	   MPP_FUNCTION(0x2, "spi0", "sck")),
 	MPP_MODE(36, "mpp36", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
@@ -346,13 +346,13 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	   MPP_FUNCTION(0x1, "dev", "ale1"),
 	   MPP_FUNCTION(0x2, "uart1", "rxd"),
 	   MPP_FUNCTION(0x3, "sata0", "prsnt"),
-	   MPP_FUNCTION(0x4, "pcie", "rst-out"),
+	   MPP_FUNCTION(0x4, "pcie", "rstout"),
 	   MPP_FUNCTION(0x5, "audio", "sdi")),
 	MPP_MODE(61, "mpp61", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpo", NULL),
-	   MPP_FUNCTION(0x1, "dev", "wen1"),
+	   MPP_FUNCTION(0x1, "dev", "we1"),
 	   MPP_FUNCTION(0x2, "uart1", "txd"),
-	   MPP_FUNCTION(0x5, "audio", "rclk")),
+	   MPP_FUNCTION(0x5, "audio", "lrclk")),
 	MPP_MODE(62, "mpp62", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "dev", "a2"),
@@ -368,11 +368,11 @@ static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
 	MPP_MODE(64, "mpp64", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "miso"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs1")),
+	   MPP_FUNCTION(0x2, "spi0", "cs1")),
 	MPP_MODE(65, "mpp65", armada_370_mpp_ctrl,
 	   MPP_FUNCTION(0x0, "gpio", NULL),
 	   MPP_FUNCTION(0x1, "spi0", "mosi"),
-	   MPP_FUNCTION(0x2, "spi0-1", "cs2")),
+	   MPP_FUNCTION(0x2, "spi0", "cs2")),
 };
 
 static struct mvebu_pinctrl_soc_info mv88f6710_pinctrl_info = {
diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c
index f1bc8b498aac..b9c2aa47f1e5 100644
--- a/drivers/pinctrl/mvebu/armada-xp.c
+++ b/drivers/pinctrl/mvebu/armada-xp.c
@@ -53,7 +53,7 @@ enum armada_xp_variant {
 static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(0, "mpp0", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "ge0", "txclko",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "ge0", "txclkout",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d0",         V_MV78230_PLUS)),
 	MPP_MODE(1, "mpp1", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -102,17 +102,19 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(12, "mpp12", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd4",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "ge1", "clkout",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x2, "ge1", "txclkout",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d12",        V_MV78230_PLUS)),
 	MPP_MODE(13, "mpp13", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd5",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd0",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "mosi",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d13",        V_MV78230_PLUS)),
 	MPP_MODE(14, "mpp14", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txd6",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd1",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "sck",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d14",        V_MV78230_PLUS)),
 	MPP_MODE(15, "mpp15", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -123,11 +125,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "txclk",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txd3",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "cs0",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d16",        V_MV78230_PLUS)),
 	MPP_MODE(17, "mpp17", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "col",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "txctl",      V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi1", "miso",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d17",        V_MV78230_PLUS)),
 	MPP_MODE(18, "mpp18", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -151,7 +155,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ge0", "rxd5",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "ge1", "rxd3",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "mem", "bat",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "dram", "bat",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "d21",        V_MV78230_PLUS)),
 	MPP_MODE(22, "mpp22", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
@@ -168,20 +172,17 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(24, "mpp24", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sata1", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "nf", "bootcs-re",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "rst",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "hsync",      V_MV78230_PLUS)),
 	MPP_MODE(25, "mpp25", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sata0", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "nf", "bootcs-we",   V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "pclk",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vsync",      V_MV78230_PLUS)),
 	MPP_MODE(26, "mpp26", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "fsync",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "lcd", "clk",        V_MV78230_PLUS)),
 	MPP_MODE(27, "mpp27", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ptp", "trig",       V_MV78230_PLUS),
@@ -196,8 +197,7 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "ptp", "clk",        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int0",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "lcd", "ref-clk",    V_MV78230_PLUS)),
 	MPP_MODE(30, "mpp30", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "clk",        V_MV78230_PLUS),
@@ -205,23 +205,23 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	MPP_MODE(31, "mpp31", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "cmd",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int2",       V_MV78230_PLUS)),
 	MPP_MODE(32, "mpp32", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d0",         V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu1-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int3",       V_MV78230_PLUS)),
 	MPP_MODE(33, "mpp33", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d1",         V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int4",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS)),
 	MPP_MODE(34, "mpp34", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d2",         V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "sata0", "prsnt",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "tdm", "int5",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "dram", "deccerr",   V_MV78230_PLUS)),
 	MPP_MODE(35, "mpp35", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "sd0", "d3",         V_MV78230_PLUS),
@@ -229,74 +229,80 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int6",       V_MV78230_PLUS)),
 	MPP_MODE(36, "mpp36", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "mosi",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "mosi",      V_MV78230_PLUS)),
 	MPP_MODE(37, "mpp37", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "miso",       V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "miso",      V_MV78230_PLUS)),
 	MPP_MODE(38, "mpp38", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "sck",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "sck",       V_MV78230_PLUS)),
 	MPP_MODE(39, "mpp39", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs0",        V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs0",       V_MV78230_PLUS)),
 	MPP_MODE(40, "mpp40", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs1",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs1",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart2", "cts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "vdd", "cpu1-pd",    V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vga-hsync",  V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq0",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs1",       V_MV78230_PLUS)),
 	MPP_MODE(41, "mpp41", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "spi", "cs2",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x1, "spi0", "cs2",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart2", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "sata1", "prsnt",    V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "lcd", "vga-vsync",  V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq1",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs2",       V_MV78230_PLUS)),
 	MPP_MODE(42, "mpp42", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "rxd",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart0", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x3, "tdm", "int7",       V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "tdm-1", "timer",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu0-pd",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x4, "tdm", "timer",      V_MV78230_PLUS)),
 	MPP_MODE(43, "mpp43", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "txd",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart0", "rts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs3",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs3",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "pcie", "rstout",    V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "vdd", "cpu2-3-pd",  V_MV78460)),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs3",       V_MV78230_PLUS)),
 	MPP_MODE(44, "mpp44", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart3", "rxd",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs4",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "mem", "bat",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs4",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "dram", "bat",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq2",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs4",       V_MV78230_PLUS)),
 	MPP_MODE(45, "mpp45", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart2", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart3", "txd",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs5",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs5",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "sata1", "prsnt",    V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x5, "dram", "vttctrl",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs5",       V_MV78230_PLUS)),
 	MPP_MODE(46, "mpp46", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart3", "rts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart1", "rts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs6",        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs6",       V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x4, "sata0", "prsnt",    V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs6",       V_MV78230_PLUS)),
 	MPP_MODE(47, "mpp47", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "uart3", "cts",      V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x2, "uart1", "cts",      V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x3, "spi", "cs7",        V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "spi0", "cs7",       V_MV78230_PLUS),
 	   MPP_VAR_FUNCTION(0x4, "ref", "clkout",     V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x5, "pcie", "clkreq3",   V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x6, "spi1", "cs7",       V_MV78230_PLUS)),
 	MPP_MODE(48, "mpp48", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "tclk", NULL,        V_MV78230_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "clkout",     V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x2, "dev", "burst/last", V_MV78230_PLUS),
+	   MPP_VAR_FUNCTION(0x3, "nand", "rb",        V_MV78230_PLUS)),
 	MPP_MODE(49, "mpp49", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "dev", "we3",        V_MV78260_PLUS)),
@@ -317,16 +323,13 @@ static struct mvebu_mpp_mode armada_xp_mpp_modes[] = {
 	   MPP_VAR_FUNCTION(0x1, "dev", "ad19",       V_MV78260_PLUS)),
 	MPP_MODE(55, "mpp55", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu0-pd",    V_MV78260_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad20",       V_MV78260_PLUS)),
 	MPP_MODE(56, "mpp56", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu1-pd",    V_MV78260_PLUS)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad21",       V_MV78260_PLUS)),
 	MPP_MODE(57, "mpp57", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS),
-	   MPP_VAR_FUNCTION(0x2, "vdd", "cpu2-3-pd",  V_MV78460)),
+	   MPP_VAR_FUNCTION(0x1, "dev", "ad22",       V_MV78260_PLUS)),
 	MPP_MODE(58, "mpp58", armada_xp_mpp_ctrl,
 	   MPP_VAR_FUNCTION(0x0, "gpio", NULL,        V_MV78260_PLUS),
 	   MPP_VAR_FUNCTION(0x1, "dev", "ad23",       V_MV78260_PLUS)),
-- 
2.9.3


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  reply	other threads:[~2016-10-19 12:32 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-18 19:47 [PATCH] " Uwe Kleine-König
2016-10-19 10:21 ` Sascha Hauer
2016-10-19 12:32   ` Uwe Kleine-König [this message]
2016-10-19 13:54     ` [PATCH v2] " Sascha Hauer

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