From: Antony Pavlov <antonynpavlov@gmail.com>
To: barebox@lists.infradead.org
Subject: [RFC v3 1/2] serial: add driver for SiFive UART
Date: Mon, 12 Dec 2016 04:01:45 +0300 [thread overview]
Message-ID: <20161212010146.18667-2-antonynpavlov@gmail.com> (raw)
In-Reply-To: <20161212010146.18667-1-antonynpavlov@gmail.com>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
--
TODO:
* add speed setup support;
* add Tx FIFO check.
---
drivers/serial/Kconfig | 3 ++
drivers/serial/Makefile | 1 +
drivers/serial/serial_sifive.c | 109 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 113 insertions(+)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b112d7e..70509b9 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -117,6 +117,9 @@ config DRIVER_SERIAL_S3C_AUTOSYNC
Say Y here if you want to use the auto flow feature of this
UART. RTS and CTS will be handled by the hardware when enabled.
+config DRIVER_SERIAL_SIFIVE
+ bool "SiFive serial driver"
+
config DRIVER_SERIAL_PXA
bool "PXA serial driver"
depends on ARCH_PXA
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 189e777..368e992 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_DRIVER_SERIAL_AUART) += serial_auart.o
obj-$(CONFIG_DRIVER_SERIAL_CADENCE) += serial_cadence.o
obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO) += efi-stdio.o
obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
+obj-$(CONFIG_DRIVER_SERIAL_SIFIVE) += serial_sifive.o
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c
new file mode 100644
index 0000000..06e3521
--- /dev/null
+++ b/drivers/serial/serial_sifive.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2016 Antony Pavlov <antonynpavlov@gmail.com>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <malloc.h>
+#include <io.h>
+
+#define UART_RX_OFFSET 0
+#define UART_TX_OFFSET 0
+#define UART_TX_COUNT_OFFSET 0x4
+#define UART_RX_COUNT_OFFSET 0x8
+#define UART_DIVIDER_OFFSET 0xC
+
+static inline uint32_t sifive_serial_readl(struct console_device *cdev,
+ uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ return readl(base + offset);
+}
+
+static inline void sifive_serial_writel(struct console_device *cdev,
+ uint32_t value, uint32_t offset)
+{
+ void __iomem *base = cdev->dev->priv;
+
+ writel(value, base + offset);
+}
+
+static int sifive_serial_setbaudrate(struct console_device *cdev, int baudrate)
+{
+ /* FIXME: no baudrate setup at the momement :( */
+
+ return 0;
+}
+
+static void sifive_serial_putc(struct console_device *cdev, char c)
+{
+ sifive_serial_writel(cdev, c, UART_TX_OFFSET);
+}
+
+static int sifive_serial_getc(struct console_device *cdev)
+{
+ uint32_t rxcnt;
+
+ do {
+ rxcnt = sifive_serial_readl(cdev, UART_RX_COUNT_OFFSET);
+ } while (!rxcnt);
+
+ return sifive_serial_readl(cdev, UART_RX_OFFSET);
+}
+
+static int sifive_serial_tstc(struct console_device *cdev)
+{
+ uint32_t rxcnt = sifive_serial_readl(cdev, UART_RX_COUNT_OFFSET);
+
+ return (rxcnt != 0);
+}
+
+static int sifive_serial_probe(struct device_d *dev)
+{
+ struct resource *iores;
+ struct console_device *cdev;
+
+ cdev = xzalloc(sizeof(struct console_device));
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+ dev->priv = IOMEM(iores->start);
+ cdev->dev = dev;
+ cdev->tstc = &sifive_serial_tstc;
+ cdev->putc = &sifive_serial_putc;
+ cdev->getc = &sifive_serial_getc;
+ cdev->setbrg = &sifive_serial_setbaudrate;
+
+ console_register(cdev);
+
+ return 0;
+}
+
+static __maybe_unused struct of_device_id sifive_serial_dt_ids[] = {
+ {
+ .compatible = "sifive,uart",
+ }, {
+ /* sentinel */
+ }
+};
+
+static struct driver_d sifive_serial_driver = {
+ .name = "sifive-uart",
+ .probe = sifive_serial_probe,
+ .of_compatible = DRV_OF_COMPAT(sifive_serial_dt_ids),
+};
+console_platform_driver(sifive_serial_driver);
--
2.10.2
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next prev parent reply other threads:[~2016-12-12 1:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-12 1:01 [RFC v3 0/2] add initial RISC-V architecture support Antony Pavlov
2016-12-12 1:01 ` Antony Pavlov [this message]
2016-12-12 1:01 ` [RFC v3 2/2] Add " Antony Pavlov
2016-12-13 17:02 ` Andrey Korolyov
2016-12-13 20:48 ` Antony Pavlov
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