i.MX7 Ethernet clock fixes

[Sascha Hauer <s.hauer@pengutronix.de>]

The following patches are encessary to make fec ethernet work on i.MX7.
There are some inaccuracies in the barebox clock support have to be fixed
first, but the real problem was that our clock code derived from the
Kernel controls non existing clock gates whereas the real gates are not
touched at all. It seems this was never noticed in the kernel since U-Boot
has configured the clocks correctly beforehand.

Sascha

----------------------------------------------------------------
Sascha Hauer (9):
      clk: Keep enable count consistent over reparent
      clk: implement CLK_OPS_PARENT_ENABLE
      clk: i.MX: clk-gate2: Allow to pass flags
      clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessary
      clk: i.MX7: do clock reparenting when all clocks are initialized
      clk: Add support for shared gates
      clk: i.MX7: Fix ethernet clocks
      clk: i.MX7: do not register PLL bypass clocks as separate clocks
      clk: i.MX7: setup ethernet clocks

 drivers/clk/Makefile          |   3 +-
 drivers/clk/clk-gate-shared.c | 123 +++++++++++++++++++++
 drivers/clk/clk.c             |  52 +++++++--
 drivers/clk/imx/clk-gate2.c   |  11 +-
 drivers/clk/imx/clk-imx7.c    | 249 +++++++++++++++++++++---------------------
 drivers/clk/imx/clk.h         |  20 ++--
 include/linux/clk.h           |   5 +
 7 files changed, 315 insertions(+), 148 deletions(-)
 create mode 100644 drivers/clk/clk-gate-shared.c

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