From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 9/9] clk: i.MX7: setup ethernet clocks
Date: Mon, 6 Feb 2017 07:50:57 +0100 [thread overview]
Message-ID: <20170206065057.19483-10-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20170206065057.19483-1-s.hauer@pengutronix.de>
Reparent ethernet clocks so that they can be used by the
fec driver. The values are the same as U-Boot uses.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/clk/imx/clk-imx7.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/clk/imx/clk-imx7.c b/drivers/clk/imx/clk-imx7.c
index 6bf123419..d3a036c0c 100644
--- a/drivers/clk/imx/clk-imx7.c
+++ b/drivers/clk/imx/clk-imx7.c
@@ -844,6 +844,17 @@ static int imx7_clk_setup(void)
/* set uart module clock's parent clock source that must be great then 80MHz */
clk_set_parent(clks[IMX7D_UART1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]);
+ clk_set_parent(clks[IMX7D_ENET1_REF_ROOT_SRC], clks[IMX7D_PLL_ENET_MAIN_125M_CLK]);
+ clk_set_parent(clks[IMX7D_ENET1_TIME_ROOT_SRC], clks[IMX7D_PLL_ENET_MAIN_100M_CLK]);
+ clk_set_parent(clks[IMX7D_ENET2_REF_ROOT_SRC], clks[IMX7D_PLL_ENET_MAIN_125M_CLK]);
+ clk_set_parent(clks[IMX7D_ENET2_TIME_ROOT_SRC], clks[IMX7D_PLL_ENET_MAIN_100M_CLK]);
+
+ clk_set_rate(clks[IMX7D_PLL_SYS_PFD4_CLK], 392000000);
+ clk_set_parent(clks[IMX7D_ENET_AXI_ROOT_SRC], clks[IMX7D_PLL_SYS_PFD4_CLK]);
+ clk_set_rate(clks[IMX7D_ENET_AXI_ROOT_CLK], 197000000);
+ clk_set_rate(clks[IMX7D_ENET1_TIME_ROOT_CLK], 25000000);
+ clk_set_rate(clks[IMX7D_ENET2_TIME_ROOT_CLK], 25000000);
+
return 0;
}
postcore_initcall(imx7_clk_setup);
--
2.11.0
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prev parent reply other threads:[~2017-02-06 6:53 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-06 6:50 i.MX7 Ethernet clock fixes Sascha Hauer
2017-02-06 6:50 ` [PATCH 1/9] clk: Keep enable count consistent over reparent Sascha Hauer
2017-02-06 6:50 ` [PATCH 2/9] clk: implement CLK_OPS_PARENT_ENABLE Sascha Hauer
2017-02-06 6:50 ` [PATCH 3/9] clk: i.MX: clk-gate2: Allow to pass flags Sascha Hauer
2017-02-06 6:50 ` [PATCH 4/9] clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessary Sascha Hauer
2017-02-06 6:50 ` [PATCH 5/9] clk: i.MX7: do clock reparenting when all clocks are initialized Sascha Hauer
2017-02-06 6:50 ` [PATCH 6/9] clk: Add support for shared gates Sascha Hauer
2017-02-06 6:50 ` [PATCH 7/9] clk: i.MX7: Fix ethernet clocks Sascha Hauer
2017-02-06 6:50 ` [PATCH 8/9] clk: i.MX7: do not register PLL bypass clocks as separate clocks Sascha Hauer
2017-02-06 6:50 ` Sascha Hauer [this message]
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