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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 4/9] clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessary
Date: Mon,  6 Feb 2017 07:50:52 +0100	[thread overview]
Message-ID: <20170206065057.19483-5-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20170206065057.19483-1-s.hauer@pengutronix.de>

CLK_OPS_PARENT_ENABLE was missing on some i.MX7 specific clocks.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 drivers/clk/imx/clk.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 4f80a3262..019114848 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -19,7 +19,7 @@ static inline struct clk *imx_clk_divider_np(const char *name, const char *paren
 static inline struct clk *imx_clk_divider2(const char *name, const char *parent,
 		void __iomem *reg, u8 shift, u8 width)
 {
-	return clk_divider(name, parent, reg, shift, width, 0);
+	return clk_divider(name, parent, reg, shift, width, CLK_OPS_PARENT_ENABLE);
 }
 
 static inline struct clk *imx_clk_divider_table(const char *name,
@@ -53,7 +53,7 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
 static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg,
 		u8 shift, u8 width, const char **parents, u8 num_parents)
 {
-	return clk_mux(name, reg, shift, width, parents, num_parents, 0);
+	return clk_mux(name, reg, shift, width, parents, num_parents, CLK_OPS_PARENT_ENABLE);
 }
 
 static inline struct clk *imx_clk_mux_p(const char *name, void __iomem *reg,
@@ -89,13 +89,13 @@ static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent
 static inline struct clk *imx_clk_gate3(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {
-	return clk_gate(name, parent, reg, shift, CLK_SET_RATE_PARENT, 0);
+	return clk_gate(name, parent, reg, shift, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, 0);
 }
 
 static inline struct clk *imx_clk_gate4(const char *name, const char *parent,
 		void __iomem *reg, u8 shift)
 {
-	return clk_gate2(name, parent, reg, shift, 0x3, 0);
+	return clk_gate2(name, parent, reg, shift, 0x3, CLK_OPS_PARENT_ENABLE);
 }
 
 struct clk *imx_clk_pllv1(const char *name, const char *parent,
-- 
2.11.0


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  parent reply	other threads:[~2017-02-06  6:54 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-06  6:50 i.MX7 Ethernet clock fixes Sascha Hauer
2017-02-06  6:50 ` [PATCH 1/9] clk: Keep enable count consistent over reparent Sascha Hauer
2017-02-06  6:50 ` [PATCH 2/9] clk: implement CLK_OPS_PARENT_ENABLE Sascha Hauer
2017-02-06  6:50 ` [PATCH 3/9] clk: i.MX: clk-gate2: Allow to pass flags Sascha Hauer
2017-02-06  6:50 ` Sascha Hauer [this message]
2017-02-06  6:50 ` [PATCH 5/9] clk: i.MX7: do clock reparenting when all clocks are initialized Sascha Hauer
2017-02-06  6:50 ` [PATCH 6/9] clk: Add support for shared gates Sascha Hauer
2017-02-06  6:50 ` [PATCH 7/9] clk: i.MX7: Fix ethernet clocks Sascha Hauer
2017-02-06  6:50 ` [PATCH 8/9] clk: i.MX7: do not register PLL bypass clocks as separate clocks Sascha Hauer
2017-02-06  6:50 ` [PATCH 9/9] clk: i.MX7: setup ethernet clocks Sascha Hauer

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