From: Sascha Hauer <s.hauer@pengutronix.de>
To: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH] ARM: socfpga: remove unused fpgaintf setup
Date: Fri, 30 Jun 2017 13:32:47 +0200 [thread overview]
Message-ID: <20170630113247.nljwxvjwba6lyhwm@pengutronix.de> (raw)
In-Reply-To: <20170630080822.5027-1-s.trumtrar@pengutronix.de>
On Fri, Jun 30, 2017 at 10:08:22AM +0200, Steffen Trumtrar wrote:
> The disable bits for the ethernet interfaces between FPGA and HPS are read
> and configured, but never written back.
> The configuration itself doesn't make that much sense however. So instead of
> writing it back to the register, remove the whole read-modify operation altogether.
>
> Reported-by: Ian Abbott <abbotti@mev.co.uk>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
> arch/arm/mach-socfpga/arria10-generic.c | 8 --------
> 1 file changed, 8 deletions(-)
>
Applied, thanks
Sascha
> diff --git a/arch/arm/mach-socfpga/arria10-generic.c b/arch/arm/mach-socfpga/arria10-generic.c
> index b8129eaf23ff..6a10c19d1417 100644
> --- a/arch/arm/mach-socfpga/arria10-generic.c
> +++ b/arch/arm/mach-socfpga/arria10-generic.c
> @@ -37,14 +37,6 @@ static void arria10_init_emac(void)
> val |= ARRIA10_SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII;
> writel(val, ARRIA10_SYSMGR_EMAC2);
>
> - val = readl(ARRIA10_SYSMGR_FPGAINTF_EN_3);
> - val &= ~(ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC0 |
> - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC0_SW |
> - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC1 |
> - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC1_SW |
> - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC2 |
> - ARRIA10_SYSMGR_FPGAINTF_EN3_EMAC2_SW);
> -
> rst = readl(ARRIA10_RSTMGR_ADDR + ARRIA10_RSTMGR_PER0MODRST);
> rst &= ~(ARRIA10_RSTMGR_PER0MODRST_EMAC0 |
> ARRIA10_RSTMGR_PER0MODRST_EMAC1 |
> --
> 2.11.0
>
>
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prev parent reply other threads:[~2017-06-30 11:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-30 8:08 Steffen Trumtrar
2017-06-30 11:32 ` Sascha Hauer [this message]
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