From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
To: barebox@lists.infradead.org
Cc: andrey.gusakov@cogentembedded.com
Subject: [PATCH v1 01/10] video: tc358767: fix EDID read for DP displays
Date: Wed, 5 Jul 2017 20:18:04 +0300 [thread overview]
Message-ID: <20170705171813.17527-2-andrey.gusakov@cogentembedded.com> (raw)
In-Reply-To: <20170705171813.17527-1-andrey.gusakov@cogentembedded.com>
Desktop displays do not always support E-DDC. So do not fall on
EDID segment index write operation.
Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
---
drivers/video/tc358767.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/video/tc358767.c b/drivers/video/tc358767.c
index ab2e86ec4..f9df383fc 100644
--- a/drivers/video/tc358767.c
+++ b/drivers/video/tc358767.c
@@ -1108,13 +1108,16 @@ static int tc_read_edid(struct tc_data *tc)
unsigned char start = 0;
unsigned char segment = 0;
- struct i2c_msg msgs[] = {
+ struct i2c_msg msg_segment[] = {
{
.addr = DDC_SEGMENT_ADDR,
.flags = 0,
.len = 1,
.buf = &segment,
- }, {
+ }
+ };
+ struct i2c_msg msgs[] = {
+ {
.addr = DDC_ADDR,
.flags = 0,
.len = 1,
@@ -1126,13 +1129,21 @@ static int tc_read_edid(struct tc_data *tc)
};
tc->edid = xmalloc(EDID_LENGTH);
+ /*
+ * Some displays supports E-EDID some not
+ * Just reset segment address to 0x0
+ * This transfer can fail on non E-DCC displays
+ * Ignore error
+ */
+ i2c_transfer(&tc->adapter, msg_segment, 1);
+
do {
block = min(DDC_BLOCK_READ, EDID_LENGTH - i);
- msgs[2].buf = tc->edid + i;
- msgs[2].len = block;
+ msgs[1].buf = tc->edid + i;
+ msgs[1].len = block;
- ret = i2c_transfer(&tc->adapter, msgs, 3);
+ ret = i2c_transfer(&tc->adapter, msgs, 2);
if (ret < 0)
goto err;
--
2.13.0
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next prev parent reply other threads:[~2017-07-05 17:16 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-05 17:18 [PATCH v1 00/10] video: tc358767: fixes and improvements Andrey Gusakov
2017-07-05 17:18 ` Andrey Gusakov [this message]
2017-07-05 17:18 ` [PATCH v1 02/10] video: tc358767: fix DP0_MISC register set Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 03/10] video: tc358767: fix timing calculation Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 04/10] video: tc358767: fix AUXDATAn registers access during write Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 05/10] video: tc358767: do not fail if sink supports more than 2 lanes Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 06/10] video: tc358767: support newer DPCD revisions and higher data rates Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 07/10] video: tc358767: optimize aux i2c bus checks Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 08/10] video: tc358767: optimize DPCD register write Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 09/10] video: tc358767: filter out modes with too high pixelclock Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 10/10] video: tc358767: accept any hsync and vsync polatiry Andrey Gusakov
2017-07-06 12:34 ` [PATCH v1 00/10] video: tc358767: fixes and improvements Lucas Stach
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