From: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
To: barebox@lists.infradead.org
Cc: andrey.gusakov@cogentembedded.com
Subject: [PATCH v1 03/10] video: tc358767: fix timing calculation
Date: Wed, 5 Jul 2017 20:18:06 +0300 [thread overview]
Message-ID: <20170705171813.17527-4-andrey.gusakov@cogentembedded.com> (raw)
In-Reply-To: <20170705171813.17527-1-andrey.gusakov@cogentembedded.com>
Fields in HTIM01 and HTIM02 regs should be even.
Recomended thresh_dly value is max_tu_symbol.
Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
---
drivers/video/tc358767.c | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/video/tc358767.c b/drivers/video/tc358767.c
index e0b09af4f..cc6a35e70 100644
--- a/drivers/video/tc358767.c
+++ b/drivers/video/tc358767.c
@@ -717,7 +717,7 @@ static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
int htotal;
int vtotal;
int vid_sync_dly;
- int max_tu_symbol;
+ int max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
htotal = mode->hsync_len + mode->left_margin + mode->xres +
mode->right_margin;
@@ -731,14 +731,18 @@ static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
mode->upper_margin, mode->lower_margin, mode->vsync_len);
dev_dbg(tc->dev, "total: %dx%d\n", htotal, vtotal);
-
- /* LCD Ctl Frame Size */
- tc_write(VPCTRL0, (0x40 << 20) /* VSDELAY */ |
+ /*
+ * Datasheet is not clear of vsdelay in case of DPI
+ * assume we do not need any delay when DPI is a source of
+ * sync signals
+ */
+ tc_write(VPCTRL0, (0 << 20) /* VSDELAY */ |
OPXLFMT_RGB888 | FRMSYNC_DISABLED | MSF_DISABLED);
- tc_write(HTIM01, (mode->left_margin << 16) | /* H back porch */
- (mode->hsync_len << 0)); /* Hsync */
- tc_write(HTIM02, (mode->right_margin << 16) | /* H front porch */
- (mode->xres << 0)); /* width */
+ /* LCD Ctl Frame Size */
+ tc_write(HTIM01, (ALIGN(mode->left_margin, 2) << 16) | /* H back porch */
+ (ALIGN(mode->hsync_len, 2) << 0)); /* Hsync */
+ tc_write(HTIM02, (ALIGN(mode->right_margin, 2) << 16) | /* H front porch */
+ (ALIGN(mode->xres, 2) << 0)); /* width */
tc_write(VTIM01, (mode->upper_margin << 16) | /* V back porch */
(mode->vsync_len << 0)); /* Vsync */
tc_write(VTIM02, (mode->lower_margin << 16) | /* V front porch */
@@ -757,7 +761,7 @@ static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
/* DP Main Stream Attributes */
vid_sync_dly = mode->hsync_len + mode->left_margin + mode->xres;
tc_write(DP0_VIDSYNCDELAY,
- (0x003e << 16) | /* thresh_dly */
+ (max_tu_symbol << 16) | /* thresh_dly */
(vid_sync_dly << 0));
tc_write(DP0_TOTALVAL, (vtotal << 16) | (htotal));
@@ -779,7 +783,6 @@ static int tc_set_video_mode(struct tc_data *tc, struct fb_videomode *mode)
* (output active video bandwidth in bytes))
* Must be less than tu_size.
*/
- max_tu_symbol = TU_SIZE_RECOMMENDED - 1;
tc_write(DP0_MISC, (max_tu_symbol << 23) | (TU_SIZE_RECOMMENDED << 16) | BPC_8);
return 0;
--
2.13.0
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2017-07-05 17:16 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-05 17:18 [PATCH v1 00/10] video: tc358767: fixes and improvements Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 01/10] video: tc358767: fix EDID read for DP displays Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 02/10] video: tc358767: fix DP0_MISC register set Andrey Gusakov
2017-07-05 17:18 ` Andrey Gusakov [this message]
2017-07-05 17:18 ` [PATCH v1 04/10] video: tc358767: fix AUXDATAn registers access during write Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 05/10] video: tc358767: do not fail if sink supports more than 2 lanes Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 06/10] video: tc358767: support newer DPCD revisions and higher data rates Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 07/10] video: tc358767: optimize aux i2c bus checks Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 08/10] video: tc358767: optimize DPCD register write Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 09/10] video: tc358767: filter out modes with too high pixelclock Andrey Gusakov
2017-07-05 17:18 ` [PATCH v1 10/10] video: tc358767: accept any hsync and vsync polatiry Andrey Gusakov
2017-07-06 12:34 ` [PATCH v1 00/10] video: tc358767: fixes and improvements Lucas Stach
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170705171813.17527-4-andrey.gusakov@cogentembedded.com \
--to=andrey.gusakov@cogentembedded.com \
--cc=barebox@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox