mail archive of the barebox mailing list
 help / color / mirror / Atom feed
From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: barebox@lists.infradead.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Subject: [PATCH v2 27/48] pinctrl: i.MX: Add support for i.MX8
Date: Sat, 26 May 2018 13:44:30 -0700	[thread overview]
Message-ID: <20180526204451.16530-28-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20180526204451.16530-1-andrew.smirnov@gmail.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/include/mach/iomux-v3.h |  9 ++++
 drivers/pinctrl/imx-iomux-v3.c            | 56 ++++++++++++++++++++---
 2 files changed, 59 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mach/iomux-v3.h
index 40f6e5999..994c15c04 100644
--- a/arch/arm/mach-imx/include/mach/iomux-v3.h
+++ b/arch/arm/mach-imx/include/mach/iomux-v3.h
@@ -17,6 +17,7 @@
 #define __MACH_IOMUX_V3_H__
 
 #include <io.h>
+#include <linux/bitfield.h>
 
 /*
  *	build IOMUX_PAD structure
@@ -95,6 +96,13 @@ typedef u64 iomux_v3_cfg_t;
 #define PAD_CTL_DVS			(1 << 13)
 #define PAD_CTL_HYS			(1 << 8)
 
+#define SHARE_CONF_PAD_CTL_DSE	GENMASK(2, 0)
+#define SHARE_CONF_PAD_CTL_SRE	GENMASK(4, 3)
+
+#define SHARE_CONF_PAD_CTL_ODE	BIT(5)
+#define SHARE_CONF_PAD_CTL_PUE	BIT(6)
+#define SHARE_CONF_PAD_CTL_HYS	BIT(7)
+
 #define PAD_CTL_PKE			(1 << 7)
 #define PAD_CTL_PUE			(1 << 6 | PAD_CTL_PKE)
 #define PAD_CTL_PUS_100K_DOWN		(0 << 4 | PAD_CTL_PUE)
@@ -118,6 +126,7 @@ typedef u64 iomux_v3_cfg_t;
 #define SHARE_MUX_CONF_REG		0x1
 #define ZERO_OFFSET_VALID		0x2
 #define IMX7_PINMUX_LPSR		0x4
+#define SHARE_CONF			BIT(3)
 
 static inline void iomux_v3_setup_pad(void __iomem *iomux, unsigned int flags,
 				      u32 mux_reg, u32 conf_reg, u32 input_reg,
diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c
index 50d717736..38451875e 100644
--- a/drivers/pinctrl/imx-iomux-v3.c
+++ b/drivers/pinctrl/imx-iomux-v3.c
@@ -73,6 +73,7 @@ EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads);
  * 1 u32 CONFIG, so 24 types in total for each pin.
  */
 #define FSL_PIN_SIZE 24
+#define SHARE_CONF_FSL_PIN_SIZE (FSL_PIN_SIZE - 1 * sizeof(u32))
 
 #define IMX_DT_NO_PAD_CTL	(1 << 31)
 #define IMX_PAD_SION		(1 << 30)
@@ -83,22 +84,57 @@ static int imx_iomux_v3_set_state(struct pinctrl_device *pdev, struct device_nod
 {
 	struct imx_iomux_v3 *iomux = container_of(pdev, struct imx_iomux_v3, pinctrl);
 	const __be32 *list;
-	int npins, size, i;
+	const bool share_conf = iomux->flags & SHARE_CONF;
+	int npins, size, i, fsl_pin_size;
+	const char *name;
+	u32 share_conf_val;
 
 	dev_dbg(iomux->pinctrl.dev, "set state: %s\n", np->full_name);
 
-	list = of_get_property(np, "fsl,pins", &size);
+	if (share_conf) {
+		u32 drive_strength, slew_rate;
+		int ret;
+
+		fsl_pin_size = SHARE_CONF_FSL_PIN_SIZE;
+		name = "pinmux";
+
+		ret = of_property_read_u32(np, "drive-strength",
+					   &drive_strength);
+		if (ret)
+			return ret;
+
+		ret = of_property_read_u32(np, "slew-rate", &slew_rate);
+		if (ret)
+			return ret;
+
+		share_conf_val =
+			FIELD_PREP(SHARE_CONF_PAD_CTL_DSE, drive_strength) |
+			FIELD_PREP(SHARE_CONF_PAD_CTL_SRE, slew_rate);
+
+		if (of_get_property(np, "drive-open-drain", NULL))
+			share_conf_val |= SHARE_CONF_PAD_CTL_ODE;
+
+		if (of_get_property(np, "input-schmitt-enable", NULL))
+			share_conf_val |= SHARE_CONF_PAD_CTL_HYS;
+
+		if (of_get_property(np, "bias-pull-up", NULL))
+			share_conf_val |= SHARE_CONF_PAD_CTL_PUE;
+	} else {
+		fsl_pin_size = FSL_PIN_SIZE;
+		name = "fsl,pins";
+	}
+
+	list = of_get_property(np, name, &size);
 	if (!list)
 		return -EINVAL;
 
-
-	if (!size || size % FSL_PIN_SIZE) {
+	if (!size || size % fsl_pin_size) {
 		dev_err(iomux->pinctrl.dev, "Invalid fsl,pins property in %s\n",
 				np->full_name);
 		return -EINVAL;
 	}
 
-	npins = size / FSL_PIN_SIZE;
+	npins = size / fsl_pin_size;
 
 	for (i = 0; i < npins; i++) {
 		u32 mux_reg = be32_to_cpu(*list++);
@@ -106,7 +142,8 @@ static int imx_iomux_v3_set_state(struct pinctrl_device *pdev, struct device_nod
 		u32 input_reg = be32_to_cpu(*list++);
 		u32 mux_val = be32_to_cpu(*list++);
 		u32 input_val = be32_to_cpu(*list++);
-		u32 conf_val = be32_to_cpu(*list++);
+		u32 conf_val = share_conf ?
+			share_conf_val : be32_to_cpu(*list++);
 
 		if (conf_val & IMX_PAD_SION) {
 			mux_val |= IOMUXC_CONFIG_SION;
@@ -180,6 +217,10 @@ static struct imx_iomux_v3_data imx_iomux_imx7_lpsr_data = {
 	.flags = ZERO_OFFSET_VALID | IMX7_PINMUX_LPSR,
 };
 
+static struct imx_iomux_v3_data imx_iomux_imx8_data = {
+	.flags = SHARE_CONF,
+};
+
 static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = {
 	{
 		.compatible = "fsl,imx25-iomuxc",
@@ -204,6 +245,9 @@ static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = {
 	}, {
 		.compatible = "fsl,imx7d-iomuxc-lpsr",
 		.data = &imx_iomux_imx7_lpsr_data,
+	}, {
+		.compatible = "fsl,imx8mq-iomuxc",
+		.data = &imx_iomux_imx8_data,
 	}, {
 		/* sentinel */
 	}
-- 
2.17.0


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

  parent reply	other threads:[~2018-05-26 20:48 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-26 20:44 [PATCH v2 00/48] ARM: i.MX8MQ and EVK support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 01/48] ARM: i.MX: xload: Fix compiler warning Andrey Smirnov
2018-05-27  7:28   ` Sam Ravnborg
2018-05-28  1:03     ` Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 02/48] ARM: i.MX: compile arm32 specific errata only for CPU32 Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 03/48] ARM: Add i.MX8 support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 04/48] aarch64: Add i.MX8 debug UART support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 05/48] Include our own include/dt-bindings Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 06/48] mci: imx-esdhc: use dma mapping functions Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 07/48] net: fec_imx: remove unnecessary DMA sync ops Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 08/48] net: fec_imx: Use dma mapping functions Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 09/48] net: fec_imx: Make use of IS_ALIGNED Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 10/48] clock: Add i.MX8MQ clock driver Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 11/48] serial: i.MX: Add i.MX8 support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 12/48] mmc: i.MX esdhc: " Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 13/48] gpio: i.MX: Add i.MX8mq support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 14/48] ARM: i.MX: ocotp: Add i.MX8MQ support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 15/48] ARM: i.MX: Split shared CCM code into a separate file Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 16/48] ARM: i.MX: Add IOMUX pad constants for i.MX8 Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 17/48] scripts/imx: Add trivial i.MX8 support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 18/48] ARM: i.MX: Add basic CCM constants for i.MX8 Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 19/48] ARM: Add constants and helpers for system counter interface Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 20/48] clocksource: armv8-timer: Convert explicit assembly into helpers Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 21/48] ARM: i.MX8: Initialize system counter Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 22/48] ARM: i.MX: boot: Fix address casting on 64-bit platforms Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 23/48] ARM: boot: Add trivial i.MX8 support Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 24/48] ARM: i.MX: xload-esdhc: Rework to make code be less i.MX6-specific Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 25/48] ARM: i.MX: xload-esdhc: Allow custom buffer address, device offset Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 26/48] ARM: i.MX: xload-esdhc: Add support for i.MX8 Andrey Smirnov
2018-05-26 20:44 ` Andrey Smirnov [this message]
2018-05-26 20:44 ` [PATCH v2 28/48] Documentation: imx: Change block size for 'dd' to 1024 Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 29/48] Documentation: i.MX: Add missing <soctype> Andrey Smirnov
2018-05-28 15:23   ` Sascha Hauer
2018-05-28 18:02     ` Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 30/48] clocksource: armv8-timer: Make armv8_clocksource_read() static Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 31/48] clocksource: armv8-timer: Make use of postcore_platform_driver() Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 32/48] Port <linux/iopoll.h> from U-Boot Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 33/48] common/clock: Move delay and timeout functions to clock.h Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 34/48] clock: Use udelay() to implement mdelay() Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 35/48] ARM: i.MX8: Add DDRC PHY and DDR CTL base addresses Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 36/48] ARM: i.MX8: Add DDRC PHY support code Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 37/48] ARM: Specify HAVE_PBL_IMAGE for CPU_64 Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 38/48] ARM: lib64: Make string functions aware of MMU configuration Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 39/48] ARM: mmu: Make use of dsb() and isb() helpers Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 40/48] ARM: cache: Remove unused cache ops struct Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 41/48] ARM: no-mmu: Disable building for ARMv8 Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 42/48] ARM: interrupts64: Include ESR value in exception traceback Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 43/48] ARM: mmu64: Trivial code simplification Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 44/48] ARM: mmu64: Make use of create_table() Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 45/48] ARM: mmu64: Convert flags in arch_remap_range() Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 46/48] ARM: include: dma: Add missing no-MMU stubs Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 47/48] ARM: i.MX8: Add i.MX8mq EVK support Andrey Smirnov
2018-05-28 15:51   ` Sascha Hauer
2018-05-28 18:04     ` Andrey Smirnov
2018-05-28 16:04   ` Sascha Hauer
2018-05-28 18:07     ` Andrey Smirnov
2018-05-26 20:44 ` [PATCH v2 48/48] ARM: Introduce imx_v8_defconfig Andrey Smirnov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180526204451.16530-28-andrew.smirnov@gmail.com \
    --to=andrew.smirnov@gmail.com \
    --cc=barebox@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox