[PATCH v2 0/4] ZII RDU1 support

[PATCH v2 0/4] ZII RDU1 support

[Andrey Smirnov]

Everyone:

This is a patchset containing the code to add initial support for ZII
RDU1 board to Barebox.

Changes since [v1]:

  - Removed usage of compatible property for PMIC initialization

  - Less invasive (IMHO), way of dealing with dataflash BBU quirks is proposed

  - Missing newline in board.c

[v1] http://lists.infradead.org/pipermail/barebox/2018-June/033764.html
     http://lists.infradead.org/pipermail/barebox/2018-June/033765.html

Andrey Smirnov (4):
  ARM: babbage: Make PMIC initialization shareable
  bbu: Make bbu_find_handler_by_device() public
  ARM: i.MX: bbu: Make imx_bbu_internal_v1_update() public
  ARM: i.MX: Add support for ZII RDU1 board

 arch/arm/boards/Makefile                      |   3 +-
 .../boards/freescale-mx51-babbage/Makefile    |   5 +-
 .../arm/boards/freescale-mx51-babbage/board.c | 112 +---------------
 .../arm/boards/freescale-mx51-babbage/power.c | 120 ++++++++++++++++++
 arch/arm/boards/zii-imx51-rdu1/Makefile       |   2 +
 arch/arm/boards/zii-imx51-rdu1/board.c        | 100 +++++++++++++++
 .../flash-header-imx51-zii-rdu1.imxcfg        |  60 +++++++++
 arch/arm/boards/zii-imx51-rdu1/lowlevel.c     |  46 +++++++
 arch/arm/configs/imx_v7_defconfig             |   1 +
 arch/arm/dts/Makefile                         |   1 +
 arch/arm/dts/imx51-zii-rdu1.dts               |  46 +++++++
 arch/arm/mach-imx/Kconfig                     |  18 ++-
 arch/arm/mach-imx/imx-bbu-internal.c          |   2 +-
 arch/arm/mach-imx/include/mach/bbu.h          |   8 ++
 arch/arm/mach-imx/include/mach/imx5.h         |   2 +
 common/bbu.c                                  |   2 +-
 images/Makefile.imx                           |   5 +
 include/bbu.h                                 |   2 +
 18 files changed, 417 insertions(+), 118 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx51-babbage/power.c
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/Makefile
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/board.c
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/lowlevel.c
 create mode 100644 arch/arm/dts/imx51-zii-rdu1.dts

-- 
2.17.1


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[PATCH v2 1/4] ARM: babbage: Make PMIC initialization shareable

[Andrey Smirnov]

Some board designs copy i.MX51 Babbadge board's PMIC design and so
require exactly the same initialization. Move correspoding code into a
separate file so it can be shared.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/boards/Makefile                      |   2 +-
 .../boards/freescale-mx51-babbage/Makefile    |   5 +-
 .../arm/boards/freescale-mx51-babbage/board.c | 112 +---------------
 .../arm/boards/freescale-mx51-babbage/power.c | 120 ++++++++++++++++++
 arch/arm/mach-imx/Kconfig                     |  13 +-
 arch/arm/mach-imx/include/mach/imx5.h         |   2 +
 6 files changed, 138 insertions(+), 116 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx51-babbage/power.c

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index b2fea4a40..f1dc4c685 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -43,7 +43,7 @@ obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD)		+= eukrea_cpuimx51/
 obj-$(CONFIG_MACH_ELTEC_HIPERCAM)		+= eltec-hipercam/
 obj-$(CONFIG_MACH_FREESCALE_MX25_3STACK)	+= freescale-mx25-3ds/
 obj-$(CONFIG_MACH_FREESCALE_MX35_3STACK)	+= freescale-mx35-3ds/
-obj-$(CONFIG_MACH_FREESCALE_MX51_PDK)		+= freescale-mx51-babbage/
+obj-y						+= freescale-mx51-babbage/
 obj-$(CONFIG_MACH_FREESCALE_MX53_LOCO)		+= freescale-mx53-qsb/
 obj-$(CONFIG_MACH_FREESCALE_MX53_SMD)		+= freescale-mx53-smd/
 obj-$(CONFIG_MACH_FREESCALE_MX53_VMX53)		+= freescale-mx53-vmx53/
diff --git a/arch/arm/boards/freescale-mx51-babbage/Makefile b/arch/arm/boards/freescale-mx51-babbage/Makefile
index 01c7a259e..b6e085818 100644
--- a/arch/arm/boards/freescale-mx51-babbage/Makefile
+++ b/arch/arm/boards/freescale-mx51-babbage/Makefile
@@ -1,2 +1,3 @@
-obj-y += board.o
-lwl-y += lowlevel.o
+obj-$(CONFIG_MACH_FREESCALE_MX51_PDK_POWER) += power.o
+obj-$(CONFIG_MACH_FREESCALE_MX51_PDK) += board.o
+lwl-$(CONFIG_MACH_FREESCALE_MX51_PDK) += lowlevel.o
diff --git a/arch/arm/boards/freescale-mx51-babbage/board.c b/arch/arm/boards/freescale-mx51-babbage/board.c
index 915748528..06d9ce391 100644
--- a/arch/arm/boards/freescale-mx51-babbage/board.c
+++ b/arch/arm/boards/freescale-mx51-babbage/board.c
@@ -30,8 +30,6 @@
 #include <mach/bbu.h>
 #include <nand.h>
 #include <notifier.h>
-#include <spi/spi.h>
-#include <mfd/mc13xxx.h>
 #include <io.h>
 #include <asm/mmu.h>
 #include <mach/imx5.h>
@@ -44,120 +42,14 @@
 
 #define MX51_CCM_CACRR 0x10
 
-static void babbage_power_init(struct mc13xxx *mc13xxx)
-{
-	u32 val;
-
-	/* Write needed to Power Gate 2 register */
-	mc13xxx_reg_read(mc13xxx, MC13892_REG_POWER_MISC, &val);
-	val &= ~0x10000;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, val);
-
-	/* Write needed to update Charger 0 */
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_CHARGE, 0x0023807F);
-
-	/* power up the system first */
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, 0x00200000);
-
-	if (imx_silicon_revision() < IMX_CHIP_REV_3_0) {
-		/* Set core voltage to 1.1V */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_0, &val);
-		val &= ~0x1f;
-		val |= 0x14;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_0, val);
-
-		/* Setup VCC (SW2) to 1.25 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
-		val &= ~0x1f;
-		val |= 0x1a;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
-
-		/* Setup 1V2_DIG1 (SW3) to 1.25 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
-		val &= ~0x1f;
-		val |= 0x1a;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
-	} else {
-		/* Setup VCC (SW2) to 1.225 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
-		val &= ~0x1f;
-		val |= 0x19;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
-
-		/* Setup 1V2_DIG1 (SW3) to 1.2 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
-		val &= ~0x1f;
-		val |= 0x18;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
-	}
-
-	if (mc13xxx_revision(mc13xxx) < MC13892_REVISION_2_0) {
-		/* Set switchers in PWM mode for Atlas 2.0 and lower */
-		/* Setup the switcher mode for SW1 & SW2*/
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
-		val &= ~0x3c0f;
-		val |= 0x1405;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
-
-		/* Setup the switcher mode for SW3 & SW4 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
-		val &= ~0xf0f;
-		val |= 0x505;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
-	} else {
-		/* Set switchers in Auto in NORMAL mode & STANDBY mode for Atlas 2.0a */
-		/* Setup the switcher mode for SW1 & SW2*/
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
-		val &= ~0x3c0f;
-		val |= 0x2008;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
-
-		/* Setup the switcher mode for SW3 & SW4 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
-		val &= ~0xf0f;
-		val |= 0x808;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
-	}
-
-	/* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.5V */
-	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_0, &val);
-	val &= ~0x34030;
-	val |= 0x10020;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_0, val);
-
-	/* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
-	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_1, &val);
-	val &= ~0x1FC;
-	val |= 0x1F4;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_1, val);
-
-	/* Configure VGEN3 and VCAM regulators to use external PNP */
-	val = 0x208;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
-
-	udelay(200);
-
-	/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
-	val = 0x49249;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
-
-	udelay(200);
-
-	pr_info("initialized PMIC\n");
-
-	console_flush();
-	imx51_init_lowlevel(800);
-	clock_notifier_call_chain();
-}
-
 static int imx51_babbage_init(void)
 {
 	if (!of_machine_is_compatible("fsl,imx51-babbage"))
 		return 0;
 
-	barebox_set_hostname("babbage");
+	imx51_babbage_power_init();
 
-	mc13xxx_register_init_callback(babbage_power_init);
+	barebox_set_hostname("babbage");
 
 	armlinux_set_architecture(MACH_TYPE_MX51_BABBAGE);
 
diff --git a/arch/arm/boards/freescale-mx51-babbage/power.c b/arch/arm/boards/freescale-mx51-babbage/power.c
new file mode 100644
index 000000000..6edc672a5
--- /dev/null
+++ b/arch/arm/boards/freescale-mx51-babbage/power.c
@@ -0,0 +1,120 @@
+#define pr_fmt(fmt) "babbage-power: " fmt
+
+#include <common.h>
+#include <init.h>
+#include <notifier.h>
+#include <mach/revision.h>
+#include <mach/imx5.h>
+#include <mfd/mc13xxx.h>
+
+static void babbage_power_init(struct mc13xxx *mc13xxx)
+{
+	u32 val;
+
+	/* Write needed to Power Gate 2 register */
+	mc13xxx_reg_read(mc13xxx, MC13892_REG_POWER_MISC, &val);
+	val &= ~0x10000;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, val);
+
+	/* Write needed to update Charger 0 */
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_CHARGE, 0x0023807F);
+
+	/* power up the system first */
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, 0x00200000);
+
+	if (imx_silicon_revision() < IMX_CHIP_REV_3_0) {
+		/* Set core voltage to 1.1V */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_0, &val);
+		val &= ~0x1f;
+		val |= 0x14;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_0, val);
+
+		/* Setup VCC (SW2) to 1.25 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
+		val &= ~0x1f;
+		val |= 0x1a;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
+
+		/* Setup 1V2_DIG1 (SW3) to 1.25 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
+		val &= ~0x1f;
+		val |= 0x1a;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
+	} else {
+		/* Setup VCC (SW2) to 1.225 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
+		val &= ~0x1f;
+		val |= 0x19;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
+
+		/* Setup 1V2_DIG1 (SW3) to 1.2 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
+		val &= ~0x1f;
+		val |= 0x18;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
+	}
+
+	if (mc13xxx_revision(mc13xxx) < MC13892_REVISION_2_0) {
+		/* Set switchers in PWM mode for Atlas 2.0 and lower */
+		/* Setup the switcher mode for SW1 & SW2*/
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
+		val &= ~0x3c0f;
+		val |= 0x1405;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
+
+		/* Setup the switcher mode for SW3 & SW4 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
+		val &= ~0xf0f;
+		val |= 0x505;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
+	} else {
+		/* Set switchers in Auto in NORMAL mode & STANDBY mode
+		 * for Atlas 2.0a */
+		/* Setup the switcher mode for SW1 & SW2*/
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
+		val &= ~0x3c0f;
+		val |= 0x2008;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
+
+		/* Setup the switcher mode for SW3 & SW4 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
+		val &= ~0xf0f;
+		val |= 0x808;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
+	}
+
+	/* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.5V */
+	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_0, &val);
+	val &= ~0x34030;
+	val |= 0x10020;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_0, val);
+
+	/* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
+	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_1, &val);
+	val &= ~0x1FC;
+	val |= 0x1F4;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_1, val);
+
+	/* Configure VGEN3 and VCAM regulators to use external PNP */
+	val = 0x208;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
+
+	udelay(200);
+
+	/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
+	val = 0x49249;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
+
+	udelay(200);
+
+	pr_info("initialized PMIC\n");
+
+	console_flush();
+	imx51_init_lowlevel(800);
+	clock_notifier_call_chain();
+}
+
+void imx51_babbage_power_init(void)
+{
+	mc13xxx_register_init_callback(babbage_power_init);
+}
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index dec5e387e..6a6710c39 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -85,6 +85,15 @@ config RESET_IMX_SRC
 	def_bool y
 	depends on ARCH_IMX6 || ARCH_IMX50 || ARCH_IMX51 || ARCH_IMX53
 
+#
+# PMIC configuration found on i.MX51 Babbadge board
+#
+config MACH_FREESCALE_MX51_PDK_POWER
+        bool
+	select SPI
+	select DRIVER_SPI_IMX
+	select MFD_MC13XXX
+
 comment "Freescale i.MX System-on-Chip"
 
 config ARCH_IMX1
@@ -256,9 +265,7 @@ config MACH_EMBEDSKY_E9
 config MACH_FREESCALE_MX51_PDK
 	bool "Freescale i.MX51 PDK"
 	select ARCH_IMX51
-	select SPI
-	select DRIVER_SPI_IMX
-	select MFD_MC13XXX
+	select MACH_FREESCALE_MX51_PDK_POWER
 
 config MACH_CCMX53
 	bool "Digi ConnectCore i.MX53"
diff --git a/arch/arm/mach-imx/include/mach/imx5.h b/arch/arm/mach-imx/include/mach/imx5.h
index 595714129..dd5cfe99c 100644
--- a/arch/arm/mach-imx/include/mach/imx5.h
+++ b/arch/arm/mach-imx/include/mach/imx5.h
@@ -18,4 +18,6 @@ void imx5_setup_pll(void __iomem *base, int freq, u32 op, u32 mfd, u32 mfn);
 #define imx5_setup_pll_400(base)	imx5_setup_pll((base),  400, (( 8 << 4) + ((2 - 1) << 0)), (3 - 1), 1)
 #define imx5_setup_pll_216(base)	imx5_setup_pll((base),  216, (( 6 << 4) + ((3 - 1) << 0)), (4 - 1), 3)
 
+void imx51_babbage_power_init(void);
+
 #endif /* __MACH_MX53_H */
-- 
2.17.1


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[PATCH v2 2/4] bbu: Make bbu_find_handler_by_device() public

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 common/bbu.c  | 2 +-
 include/bbu.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/common/bbu.c b/common/bbu.c
index 11e44f4a7..d9b0c7ece 100644
--- a/common/bbu.c
+++ b/common/bbu.c
@@ -117,7 +117,7 @@ static struct bbu_handler *bbu_find_handler(const char *name)
 	return NULL;
 }
 
-static struct bbu_handler *bbu_find_handler_by_device(const char *devicepath)
+struct bbu_handler *bbu_find_handler_by_device(const char *devicepath)
 {
 	struct bbu_handler *handler;
 
diff --git a/include/bbu.h b/include/bbu.h
index def568e49..b6e7410db 100644
--- a/include/bbu.h
+++ b/include/bbu.h
@@ -44,6 +44,8 @@ void bbu_handlers_list(void);
 
 int bbu_handlers_iterate(int (*fn)(struct bbu_handler *, void *), void *);
 
+struct bbu_handler *bbu_find_handler_by_device(const char *devicepath);
+
 #ifdef CONFIG_BAREBOX_UPDATE
 
 int bbu_register_handler(struct bbu_handler *);
-- 
2.17.1


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[PATCH v2 3/4] ARM: i.MX: bbu: Make imx_bbu_internal_v1_update() public

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/imx-bbu-internal.c | 2 +-
 arch/arm/mach-imx/include/mach/bbu.h | 8 ++++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c
index c7375ff52..c31413638 100644
--- a/arch/arm/mach-imx/imx-bbu-internal.c
+++ b/arch/arm/mach-imx/imx-bbu-internal.c
@@ -156,7 +156,7 @@ static int imx_bbu_check_prereq(const char *devicefile, struct bbu_data *data)
  * the resulting image to the device. Currently this handles MMC/SD
  * devices.
  */
-static int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *data)
+int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *data)
 {
 	struct imx_internal_bbu_handler *imx_handler =
 		container_of(handler, struct imx_internal_bbu_handler, handler);
diff --git a/arch/arm/mach-imx/include/mach/bbu.h b/arch/arm/mach-imx/include/mach/bbu.h
index bde3e02d2..a07913699 100644
--- a/arch/arm/mach-imx/include/mach/bbu.h
+++ b/arch/arm/mach-imx/include/mach/bbu.h
@@ -9,6 +9,8 @@ struct imx_dcd_v2_entry;
 
 #ifdef CONFIG_BAREBOX_UPDATE
 
+int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *data);
+
 int imx51_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
 		unsigned long flags);
 
@@ -38,6 +40,12 @@ int imx_bbu_external_nor_register_handler(const char *name, char *devicefile,
 
 #else
 
+static inline int imx_bbu_internal_v1_update(struct bbu_handler *handler,
+					     struct bbu_data *data)
+{
+	return -ENOSYS;
+}
+
 static inline int imx51_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
 		unsigned long flags)
 {
-- 
2.17.1


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[PATCH v2 4/4] ARM: i.MX: Add support for ZII RDU1 board

[Andrey Smirnov]

ZII RDU1 is a i.MX51 based, Babbage board derivative supported by
upstream kernel. This commit adds support for it to Barebox.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/boards/Makefile                      |   1 +
 arch/arm/boards/zii-imx51-rdu1/Makefile       |   2 +
 arch/arm/boards/zii-imx51-rdu1/board.c        | 100 ++++++++++++++++++
 .../flash-header-imx51-zii-rdu1.imxcfg        |  60 +++++++++++
 arch/arm/boards/zii-imx51-rdu1/lowlevel.c     |  46 ++++++++
 arch/arm/configs/imx_v7_defconfig             |   1 +
 arch/arm/dts/Makefile                         |   1 +
 arch/arm/dts/imx51-zii-rdu1.dts               |  46 ++++++++
 arch/arm/mach-imx/Kconfig                     |   5 +
 images/Makefile.imx                           |   5 +
 10 files changed, 267 insertions(+)
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/Makefile
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/board.c
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/lowlevel.c
 create mode 100644 arch/arm/dts/imx51-zii-rdu1.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index f1dc4c685..e5d217f52 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -150,5 +150,6 @@ obj-$(CONFIG_MACH_VSCOM_BALTOS)			+= vscom-baltos/
 obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
 obj-$(CONFIG_MACH_WARP7)			+= element14-warp7/
 obj-$(CONFIG_MACH_VF610_TWR)			+= freescale-vf610-twr/
+obj-$(CONFIG_MACH_ZII_RDU1)			+= zii-imx51-rdu1/
 obj-$(CONFIG_MACH_ZII_RDU2)			+= zii-imx6q-rdu2/
 obj-$(CONFIG_MACH_ZII_VF610_DEV)		+= zii-vf610-dev/
diff --git a/arch/arm/boards/zii-imx51-rdu1/Makefile b/arch/arm/boards/zii-imx51-rdu1/Makefile
new file mode 100644
index 000000000..01c7a259e
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c
new file mode 100644
index 000000000..c09285aa4
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/board.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2015 Nikita Yushchenko, CogentEmbedded, Inc
+ * Copyright (C) 2015 Andrey Gusakov, CogentEmbedded, Inc
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ */
+
+#define pr_fmt(fmt) "zii-rdu1: " fmt
+
+#include <common.h>
+#include <init.h>
+#include <mach/bbu.h>
+#include <libfile.h>
+#include <mach/imx5.h>
+
+#define ZII_RDU1_DATAFLASH		"/dev/dataflash0"
+#define ZII_RDU1_DATAFLASH_CONFIG	ZII_RDU1_DATAFLASH ".config"
+
+/**
+ * zii_rdu1_bbu_spi_update - RDU1 specific BBU handler
+ *
+ * @handler:	BBU handler pointer passed down by BBU framework
+ * @data:	BBU data pointer passed down by BBU framework
+ *
+ * RDU1 design chose to use first page of the onboard dataflash to
+ * store vendor board-specific paramters, which is problematic because
+ * imx_bbu_internal_v1_update() will not spare that region when
+ * peforming the update.
+ *
+ * This functions works as a thin wrapper around
+ * imx_bbu_internal_v1_update() and saves the data before and restores
+ * it after, keeping board specific data intact.
+ */
+static int zii_rdu1_bbu_spi_update(struct bbu_handler *handler,
+				   struct bbu_data *data)
+{
+	uint8_t *config;
+	size_t size;
+	int ret;
+
+	config = read_file(ZII_RDU1_DATAFLASH_CONFIG, &size);
+	if (!config)
+		return -EIO;
+
+	ret = imx_bbu_internal_v1_update(handler, data);
+	if (ret < 0) {
+		pr_warn("Failed to update '%s'\n", handler->name);
+		/*
+		 * At this point we don't know what state the config
+		 * partition was left in, so we fall through and
+		 * re-write it with a known good data
+		 */
+	}
+
+	ret = write_file_flash(ZII_RDU1_DATAFLASH_CONFIG, config, size);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+
+static int zii_rdu1_init(void)
+{
+	struct bbu_handler *handler;
+
+	if (!of_machine_is_compatible("zii,imx51-rdu1"))
+		return 0;
+
+	imx51_babbage_power_init();
+
+	barebox_set_hostname("rdu1");
+
+	imx51_bbu_internal_mmc_register_handler("mmc", "/dev/mmc0", 0);
+	imx51_bbu_internal_spi_i2c_register_handler("spi",
+						    ZII_RDU1_DATAFLASH,
+						    BBU_HANDLER_FLAG_DEFAULT);
+	/*
+	 * Overload freshly registered SPI update handler to deal with
+	 * RDU1 quirk (see above for description)
+	 */
+	handler = bbu_find_handler_by_device(ZII_RDU1_DATAFLASH);
+	if (WARN_ON(!handler))
+		return -EINVAL;
+
+	handler->handler = zii_rdu1_bbu_spi_update;
+
+	return 0;
+}
+coredevice_initcall(zii_rdu1_init);
diff --git a/arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg b/arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
new file mode 100644
index 000000000..76f4c6b59
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
@@ -0,0 +1,60 @@
+soc imx51
+loadaddr 0x90000000
+dcdofs 0x400
+
+wm 32 0x73fa88a0 0x00000200
+wm 32 0x73fa850c 0x000020c5
+wm 32 0x73fa8510 0x000020c5
+wm 32 0x73fa883c 0x00000002
+wm 32 0x73fa8848 0x00000002
+wm 32 0x73fa84b8 0x000000e7
+wm 32 0x73fa84bc 0x00000045
+wm 32 0x73fa84c0 0x00000045
+wm 32 0x73fa84c4 0x00000045
+wm 32 0x73fa84c8 0x00000045
+wm 32 0x73fa8820 0x00000000
+wm 32 0x73fa84a4 0x00000003
+wm 32 0x73fa84a8 0x00000003
+wm 32 0x73fa84ac 0x000000e3
+wm 32 0x73fa84b0 0x000000e3
+wm 32 0x73fa84b4 0x000000e3
+wm 32 0x73fa84cc 0x000000e3
+wm 32 0x73fa84d0 0x000000e2
+wm 32 0x73fa882c 0x00000004
+wm 32 0x73fa88a4 0x00000004
+wm 32 0x73fa88ac 0x00000004
+wm 32 0x73fa88b8 0x00000004
+wm 32 0x83fd9000 0x82a20000
+wm 32 0x83fd9008 0x82a20000
+wm 32 0x83fd9010 0x000ad0d0
+wm 32 0x83fd9004 0x3f3584ab
+wm 32 0x83fd900c 0x3f3584ab
+wm 32 0x83fd9014 0x04008008
+wm 32 0x83fd9014 0x0000801a
+wm 32 0x83fd9014 0x0000801b
+wm 32 0x83fd9014 0x00448019
+wm 32 0x83fd9014 0x07328018
+wm 32 0x83fd9014 0x04008008
+wm 32 0x83fd9014 0x00008010
+wm 32 0x83fd9014 0x00008010
+wm 32 0x83fd9014 0x06328018
+wm 32 0x83fd9014 0x03808019
+wm 32 0x83fd9014 0x00408019
+wm 32 0x83fd9014 0x00008000
+wm 32 0x83fd9014 0x0400800c
+wm 32 0x83fd9014 0x0000801e
+wm 32 0x83fd9014 0x0000801f
+wm 32 0x83fd9014 0x0000801d
+wm 32 0x83fd9014 0x0732801c
+wm 32 0x83fd9014 0x0400800c
+wm 32 0x83fd9014 0x00008014
+wm 32 0x83fd9014 0x00008014
+wm 32 0x83fd9014 0x0632801c
+wm 32 0x83fd9014 0x0380801d
+wm 32 0x83fd9014 0x0040801d
+wm 32 0x83fd9014 0x00008004
+wm 32 0x83fd9000 0xb2a20000
+wm 32 0x83fd9008 0xb2a20000
+wm 32 0x83fd9010 0x000ad6d0
+wm 32 0x83fd9034 0x90000000
+wm 32 0x83fd9014 0x00000000
diff --git a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
new file mode 100644
index 000000000..c28ca8653
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
@@ -0,0 +1,46 @@
+#include <debug_ll.h>
+#include <mach/clock-imx51_53.h>
+#include <mach/iomux-mx51.h>
+#include <common.h>
+#include <mach/esdctl.h>
+#include <mach/generic.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+
+static inline void setup_uart(void)
+{
+	void __iomem *iomuxbase = IOMEM(MX51_IOMUXC_BASE_ADDR);
+	void __iomem *ccmbase = IOMEM(MX51_CCM_BASE_ADDR);
+
+	/*
+	 * Restore CCM values that might be changed by the Mask ROM
+	 * code.
+	 *
+	 * Source: RealView debug scripts provided by Freescale
+	 */
+	writel(MX5_CCM_CBCDR_RESET_VALUE,  ccmbase + MX5_CCM_CBCDR);
+	writel(MX5_CCM_CSCMR1_RESET_VALUE, ccmbase + MX5_CCM_CSCMR1);
+	writel(MX5_CCM_CSCDR1_RESET_VALUE, ccmbase + MX5_CCM_CSCDR1);
+
+	imx_setup_pad(iomuxbase, MX51_PAD_UART1_TXD__UART1_TXD);
+
+	imx51_uart_setup_ll();
+
+	putc_ll('>');
+}
+
+extern char __dtb_imx51_zii_rdu1_start[];
+
+ENTRY_FUNCTION(start_imx51_zii_rdu1, r0, r1, r2)
+{
+	void *fdt;
+
+	imx5_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_imx51_zii_rdu1_start + get_runtime_offset();
+
+	imx51_barebox_entry(fdt);
+}
\ No newline at end of file
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index 8aef9d6ef..0fc3c9c50 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -35,6 +35,7 @@ CONFIG_MACH_CM_FX6=y
 CONFIG_MACH_ADVANTECH_ROM_742X=y
 CONFIG_MACH_WARP7=y
 CONFIG_MACH_VF610_TWR=y
+CONFIG_MACH_ZII_RDU1=y
 CONFIG_MACH_ZII_RDU2=y
 CONFIG_MACH_ZII_VF610_DEV=y
 CONFIG_MACH_PHYTEC_PHYCORE_IMX7=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b69592e64..1c94193d1 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -102,6 +102,7 @@ pbl-dtb-$(CONFIG_MACH_VEXPRESS) += vexpress-v2p-ca15.dtb.o
 pbl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o
 pbl-dtb-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o
 pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
+pbl-dtb-$(CONFIG_MACH_ZII_RDU1) += imx51-zii-rdu1.dtb.o
 pbl-dtb-$(CONFIG_MACH_ZII_RDU2) += imx6q-zii-rdu2.dtb.o imx6qp-zii-rdu2.dtb.o
 pbl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \
 	vf610-zii-dev-rev-b.dtb.o 	\
diff --git a/arch/arm/dts/imx51-zii-rdu1.dts b/arch/arm/dts/imx51-zii-rdu1.dts
new file mode 100644
index 000000000..e7b0bc743
--- /dev/null
+++ b/arch/arm/dts/imx51-zii-rdu1.dts
@@ -0,0 +1,46 @@
+/*
+ * Copyright 2018 CogentEmbedded, Inc.
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <arm/imx51-zii-rdu1.dts>
+
+/ {
+	compatible = "zii,imx51-rdu1", "fsl,imx51-babbage-power", "fsl,imx51";
+
+	chosen {
+		stdout-path = &uart1;
+
+		environment-spi {
+			compatible = "barebox,environment";
+			device-path = &spinor, "partname:barebox-environment";
+		};
+	};
+};
+
+&ecspi1 {
+	spinor: flash@1 {
+		partition@0 {
+			label = "config";
+			reg = <0x0 0x400>;
+		};
+
+		partition@400 {
+			label = "barebox";
+			reg = <0x400 0xdfc00>;
+		};
+
+		partition@e0000 {
+			label = "barebox-environment";
+			reg = <0xe0000 0x20000>;
+		};
+	};
+};
\ No newline at end of file
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 6a6710c39..83d32f30c 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -423,6 +423,11 @@ config MACH_VF610_TWR
 	bool "Freescale VF610 Tower Board"
 	select ARCH_VF610
 
+config MACH_ZII_RDU1
+	bool "ZII i.MX51 RDU1"
+	select ARCH_IMX51
+	select MACH_FREESCALE_MX51_PDK_POWER
+
 config MACH_ZII_RDU2
 	bool "ZII i.MX6Q(+) RDU2"
 	select ARCH_IMX6
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 43505b1ff..e3f3b2c8c 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -76,6 +76,11 @@ CFG_start_imx51_babbage_xload.pblx.imximg = $(board)/freescale-mx51-babbage/flas
 FILE_barebox-freescale-imx51-babbage-xload.img = start_imx51_babbage_xload.pblx.imximg
 imx-xload-$(CONFIG_MACH_FREESCALE_MX51_PDK) += barebox-freescale-imx51-babbage-xload.img
 
+pblx-$(CONFIG_MACH_ZII_RDU1) += start_imx51_zii_rdu1
+CFG_start_imx51_zii_rdu1.pblx.imximg = $(board)/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
+FILE_barebox-zii-imx51-rdu1.img = start_imx51_zii_rdu1.pblx.imximg
+imx-barebox-$(CONFIG_MACH_ZII_RDU1) += barebox-zii-imx51-rdu1.img
+
 ifdef CONFIG_ARCH_IMX_XLOAD
 image-y += $(imx-xload-y)
 else
-- 
2.17.1


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Re: [PATCH v2 4/4] ARM: i.MX: Add support for ZII RDU1 board

[Lucas Stach]

Hi Andrey,

Am Mittwoch, den 20.06.2018, 12:24 -0700 schrieb Andrey Smirnov:
> ZII RDU1 is a i.MX51 based, Babbage board derivative supported by
> upstream kernel. This commit adds support for it to Barebox.
> 
> > Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
> > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
>  arch/arm/boards/Makefile                      |   1 +
>  arch/arm/boards/zii-imx51-rdu1/Makefile       |   2 +
>  arch/arm/boards/zii-imx51-rdu1/board.c        | 100 ++++++++++++++++++
>  .../flash-header-imx51-zii-rdu1.imxcfg        |  60 +++++++++++
>  arch/arm/boards/zii-imx51-rdu1/lowlevel.c     |  46 ++++++++
>  arch/arm/configs/imx_v7_defconfig             |   1 +
>  arch/arm/dts/Makefile                         |   1 +
>  arch/arm/dts/imx51-zii-rdu1.dts               |  46 ++++++++
>  arch/arm/mach-imx/Kconfig                     |   5 +
>  images/Makefile.imx                           |   5 +
>  10 files changed, 267 insertions(+)
>  create mode 100644 arch/arm/boards/zii-imx51-rdu1/Makefile
>  create mode 100644 arch/arm/boards/zii-imx51-rdu1/board.c
>  create mode 100644 arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
>  create mode 100644 arch/arm/boards/zii-imx51-rdu1/lowlevel.c
>  create mode 100644 arch/arm/dts/imx51-zii-rdu1.dts
> 
> diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
> index f1dc4c685..e5d217f52 100644
> --- a/arch/arm/boards/Makefile
> +++ b/arch/arm/boards/Makefile
> > @@ -150,5 +150,6 @@ obj-$(CONFIG_MACH_VSCOM_BALTOS)			+= vscom-baltos/
> >  obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
> >  obj-$(CONFIG_MACH_WARP7)			+= element14-warp7/
> >  obj-$(CONFIG_MACH_VF610_TWR)			+= freescale-vf610-twr/
> > +obj-$(CONFIG_MACH_ZII_RDU1)			+= zii-imx51-rdu1/
> >  obj-$(CONFIG_MACH_ZII_RDU2)			+= zii-imx6q-rdu2/
> >  obj-$(CONFIG_MACH_ZII_VF610_DEV)		+= zii-vf610-dev/
> diff --git a/arch/arm/boards/zii-imx51-rdu1/Makefile b/arch/arm/boards/zii-imx51-rdu1/Makefile
> new file mode 100644
> index 000000000..01c7a259e
> --- /dev/null
> +++ b/arch/arm/boards/zii-imx51-rdu1/Makefile
> @@ -0,0 +1,2 @@
> +obj-y += board.o
> +lwl-y += lowlevel.o
> diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c
> new file mode 100644
> index 000000000..c09285aa4
> --- /dev/null
> +++ b/arch/arm/boards/zii-imx51-rdu1/board.c
> @@ -0,0 +1,100 @@
> +/*
> + * Copyright (C) 2015 Nikita Yushchenko, CogentEmbedded, Inc
> + * Copyright (C) 2015 Andrey Gusakov, CogentEmbedded, Inc
> + * Copyright (C) 2007 Sascha Hauer, Pengutronix
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + *
> + */
> +
> +#define pr_fmt(fmt) "zii-rdu1: " fmt

I don't think we want that. At least we don't do it on RDU2, but I
think Chris has an option here.

> +#include <common.h>
> +#include <init.h>
> +#include <mach/bbu.h>
> +#include <libfile.h>
> +#include <mach/imx5.h>
> +
> > +#define ZII_RDU1_DATAFLASH		"/dev/dataflash0"
> > +#define ZII_RDU1_DATAFLASH_CONFIG	ZII_RDU1_DATAFLASH ".config"
> +
> +/**
> + * zii_rdu1_bbu_spi_update - RDU1 specific BBU handler
> + *
> > + * @handler:	BBU handler pointer passed down by BBU framework
> > + * @data:	BBU data pointer passed down by BBU framework
> + *
> + * RDU1 design chose to use first page of the onboard dataflash to
> + * store vendor board-specific paramters, which is problematic because
> + * imx_bbu_internal_v1_update() will not spare that region when
> + * peforming the update.
> + *
> + * This functions works as a thin wrapper around
> + * imx_bbu_internal_v1_update() and saves the data before and restores
> + * it after, keeping board specific data intact.
> + */

In general I like the idea of replacing the update handler in the
board, as it shows clearly that this is some board specific quirk.

I don't fully agree on the implementation of the handler though.
Overwriting and restoring the config area still has the risk of
destroying this data, leaving the unit in a bricked state.

As the config area is page aligned, there is no need to touch it at all
(I think). All you need to do is to point the BBU target at the barebox
partition on the dataflash and truncate the barebox image in the custom
handler by changing data->image and data->len in the custom RDU1
handler.

> +static int zii_rdu1_bbu_spi_update(struct bbu_handler *handler,
> > +				   struct bbu_data *data)
> +{
> > +	uint8_t *config;
> > +	size_t size;
> > +	int ret;
> +
> > +	config = read_file(ZII_RDU1_DATAFLASH_CONFIG, &size);
> > +	if (!config)
> > +		return -EIO;
> +
> > +	ret = imx_bbu_internal_v1_update(handler, data);
> > +	if (ret < 0) {
> > +		pr_warn("Failed to update '%s'\n", handler->name);
> > +		/*
> > +		 * At this point we don't know what state the config
> > +		 * partition was left in, so we fall through and
> > +		 * re-write it with a known good data
> > +		 */
> > +	}
> +
> > +	ret = write_file_flash(ZII_RDU1_DATAFLASH_CONFIG, config, size);
> > +	if (ret < 0)
> > +		return ret;
> +
> > +	return 0;
> +}
> +
> +static int zii_rdu1_init(void)
> +{
> > +	struct bbu_handler *handler;
> +
> > +	if (!of_machine_is_compatible("zii,imx51-rdu1"))
> > +		return 0;
> +
> > +	imx51_babbage_power_init();
> +
> > +	barebox_set_hostname("rdu1");
> +
> > +	imx51_bbu_internal_mmc_register_handler("mmc", "/dev/mmc0", 0);
> > +	imx51_bbu_internal_spi_i2c_register_handler("spi",
> > +						    ZII_RDU1_DATAFLASH,
> > +						    BBU_HANDLER_FLAG_DEFAULT);
> > +	/*
> > +	 * Overload freshly registered SPI update handler to deal with
> > +	 * RDU1 quirk (see above for description)
> > +	 */
> > +	handler = bbu_find_handler_by_device(ZII_RDU1_DATAFLASH);
> > +	if (WARN_ON(!handler))
> > +		return -EINVAL;
> +
> > +	handler->handler = zii_rdu1_bbu_spi_update;
> +
> > +	return 0;
> +}
> +coredevice_initcall(zii_rdu1_init);

[...]

> diff --git a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
> new file mode 100644
> index 000000000..c28ca8653
> --- /dev/null
> +++ b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
> @@ -0,0 +1,46 @@
> +#include <debug_ll.h>
> +#include <mach/clock-imx51_53.h>
> +#include <mach/iomux-mx51.h>
> +#include <common.h>
> +#include <mach/esdctl.h>
> +#include <mach/generic.h>
> +#include <asm/barebox-arm-head.h>
> +#include <asm/barebox-arm.h>
> +
> +static inline void setup_uart(void)
> +{
> > +	void __iomem *iomuxbase = IOMEM(MX51_IOMUXC_BASE_ADDR);
> > +	void __iomem *ccmbase = IOMEM(MX51_CCM_BASE_ADDR);
> +
> > +	/*
> > +	 * Restore CCM values that might be changed by the Mask ROM
> > +	 * code.
> > +	 *
> > +	 * Source: RealView debug scripts provided by Freescale
> > +	 */
> > +	writel(MX5_CCM_CBCDR_RESET_VALUE,  ccmbase + MX5_CCM_CBCDR);
> > +	writel(MX5_CCM_CSCMR1_RESET_VALUE, ccmbase + MX5_CCM_CSCMR1);
> > +	writel(MX5_CCM_CSCDR1_RESET_VALUE, ccmbase + MX5_CCM_CSCDR1);
> +
> > +	imx_setup_pad(iomuxbase, MX51_PAD_UART1_TXD__UART1_TXD);
> +
> > +	imx51_uart_setup_ll();
> +
> > +	putc_ll('>');
> +}
> +
> +extern char __dtb_imx51_zii_rdu1_start[];
> +
> +ENTRY_FUNCTION(start_imx51_zii_rdu1, r0, r1, r2)
> +{
> > +	void *fdt;
> +
> > +	imx5_cpu_lowlevel_init();
> +
> > +	if (IS_ENABLED(CONFIG_DEBUG_LL))
> > +		setup_uart();
> +
> > +	fdt = __dtb_imx51_zii_rdu1_start + get_runtime_offset();
> +
> > +	imx51_barebox_entry(fdt);
> +}
> \ No newline at end of file

Add the newline to make git happy, please. There are more places like
this.

Regards,
Lucas

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Re: [PATCH v2 4/4] ARM: i.MX: Add support for ZII RDU1 board

[Andrey Smirnov]

On Mon, Jun 25, 2018 at 2:03 AM Lucas Stach <l.stach@pengutronix.de> wrote:
>
> Hi Andrey,
>
> Am Mittwoch, den 20.06.2018, 12:24 -0700 schrieb Andrey Smirnov:
> > ZII RDU1 is a i.MX51 based, Babbage board derivative supported by
> > upstream kernel. This commit adds support for it to Barebox.
> >
> > > Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
> > > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> > ---
> >  arch/arm/boards/Makefile                      |   1 +
> >  arch/arm/boards/zii-imx51-rdu1/Makefile       |   2 +
> >  arch/arm/boards/zii-imx51-rdu1/board.c        | 100 ++++++++++++++++++
> >  .../flash-header-imx51-zii-rdu1.imxcfg        |  60 +++++++++++
> >  arch/arm/boards/zii-imx51-rdu1/lowlevel.c     |  46 ++++++++
> >  arch/arm/configs/imx_v7_defconfig             |   1 +
> >  arch/arm/dts/Makefile                         |   1 +
> >  arch/arm/dts/imx51-zii-rdu1.dts               |  46 ++++++++
> >  arch/arm/mach-imx/Kconfig                     |   5 +
> >  images/Makefile.imx                           |   5 +
> >  10 files changed, 267 insertions(+)
> >  create mode 100644 arch/arm/boards/zii-imx51-rdu1/Makefile
> >  create mode 100644 arch/arm/boards/zii-imx51-rdu1/board.c
> >  create mode 100644 arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
> >  create mode 100644 arch/arm/boards/zii-imx51-rdu1/lowlevel.c
> >  create mode 100644 arch/arm/dts/imx51-zii-rdu1.dts
> >
> > diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
> > index f1dc4c685..e5d217f52 100644
> > --- a/arch/arm/boards/Makefile
> > +++ b/arch/arm/boards/Makefile
> > > @@ -150,5 +150,6 @@ obj-$(CONFIG_MACH_VSCOM_BALTOS)                 += vscom-baltos/
> > >  obj-$(CONFIG_MACH_QEMU_VIRT64)                     += qemu-virt64/
> > >  obj-$(CONFIG_MACH_WARP7)                   += element14-warp7/
> > >  obj-$(CONFIG_MACH_VF610_TWR)                       += freescale-vf610-twr/
> > > +obj-$(CONFIG_MACH_ZII_RDU1)                        += zii-imx51-rdu1/
> > >  obj-$(CONFIG_MACH_ZII_RDU2)                        += zii-imx6q-rdu2/
> > >  obj-$(CONFIG_MACH_ZII_VF610_DEV)           += zii-vf610-dev/
> > diff --git a/arch/arm/boards/zii-imx51-rdu1/Makefile b/arch/arm/boards/zii-imx51-rdu1/Makefile
> > new file mode 100644
> > index 000000000..01c7a259e
> > --- /dev/null
> > +++ b/arch/arm/boards/zii-imx51-rdu1/Makefile
> > @@ -0,0 +1,2 @@
> > +obj-y += board.o
> > +lwl-y += lowlevel.o
> > diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c
> > new file mode 100644
> > index 000000000..c09285aa4
> > --- /dev/null
> > +++ b/arch/arm/boards/zii-imx51-rdu1/board.c
> > @@ -0,0 +1,100 @@
> > +/*
> > + * Copyright (C) 2015 Nikita Yushchenko, CogentEmbedded, Inc
> > + * Copyright (C) 2015 Andrey Gusakov, CogentEmbedded, Inc
> > + * Copyright (C) 2007 Sascha Hauer, Pengutronix
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + *
> > + */
> > +
> > +#define pr_fmt(fmt) "zii-rdu1: " fmt
>
> I don't think we want that. At least we don't do it on RDU2, but I
> think Chris has an option here.
>

Sure, I'll drop it.

> > +#include <common.h>
> > +#include <init.h>
> > +#include <mach/bbu.h>
> > +#include <libfile.h>
> > +#include <mach/imx5.h>
> > +
> > > +#define ZII_RDU1_DATAFLASH         "/dev/dataflash0"
> > > +#define ZII_RDU1_DATAFLASH_CONFIG  ZII_RDU1_DATAFLASH ".config"
> > +
> > +/**
> > + * zii_rdu1_bbu_spi_update - RDU1 specific BBU handler
> > + *
> > > + * @handler:       BBU handler pointer passed down by BBU framework
> > > + * @data:  BBU data pointer passed down by BBU framework
> > + *
> > + * RDU1 design chose to use first page of the onboard dataflash to
> > + * store vendor board-specific paramters, which is problematic because
> > + * imx_bbu_internal_v1_update() will not spare that region when
> > + * peforming the update.
> > + *
> > + * This functions works as a thin wrapper around
> > + * imx_bbu_internal_v1_update() and saves the data before and restores
> > + * it after, keeping board specific data intact.
> > + */
>
> In general I like the idea of replacing the update handler in the
> board, as it shows clearly that this is some board specific quirk.
>
> I don't fully agree on the implementation of the handler though.
> Overwriting and restoring the config area still has the risk of
> destroying this data, leaving the unit in a bricked state.
>

The only info contained in config area is unit's MAC address and and
LCD panel type. Loosing this information, while inconvenient, is not
going to brick the unit. Additionally:

-  LCD type information could and is tentatively planed to be derived
from P/N information available via RAVE SP EEPROM, so that leaves us
with just MAC address.

- Config header in SPI NOR is also duplicated in SPI EEPROM connected
to i.MX51, so it can be resorted from there if need be.

- Removing this risk will do nothing to the risk of truly bricking the
unit via failed bootloader upgrade which is several orders of
magnitude more likely due to size difference of bootloader image vs
config area.

> As the config area is page aligned, there is no need to touch it at all
> (I think). All you need to do is to point the BBU target at the barebox
> partition on the dataflash and truncate the barebox image in the custom
> handler by changing data->image and data->len in the custom RDU1
> handler.
>

I'll give this approach a try since it sounds like it's going to allow
me to drop a bit of extra code, but if it doesn't I think the original
code is good enough and we should let the perfect be the enemy of the
good.

> > +static int zii_rdu1_bbu_spi_update(struct bbu_handler *handler,
> > > +                              struct bbu_data *data)
> > +{
> > > +   uint8_t *config;
> > > +   size_t size;
> > > +   int ret;
> > +
> > > +   config = read_file(ZII_RDU1_DATAFLASH_CONFIG, &size);
> > > +   if (!config)
> > > +           return -EIO;
> > +
> > > +   ret = imx_bbu_internal_v1_update(handler, data);
> > > +   if (ret < 0) {
> > > +           pr_warn("Failed to update '%s'\n", handler->name);
> > > +           /*
> > > +            * At this point we don't know what state the config
> > > +            * partition was left in, so we fall through and
> > > +            * re-write it with a known good data
> > > +            */
> > > +   }
> > +
> > > +   ret = write_file_flash(ZII_RDU1_DATAFLASH_CONFIG, config, size);
> > > +   if (ret < 0)
> > > +           return ret;
> > +
> > > +   return 0;
> > +}
> > +
> > +static int zii_rdu1_init(void)
> > +{
> > > +   struct bbu_handler *handler;
> > +
> > > +   if (!of_machine_is_compatible("zii,imx51-rdu1"))
> > > +           return 0;
> > +
> > > +   imx51_babbage_power_init();
> > +
> > > +   barebox_set_hostname("rdu1");
> > +
> > > +   imx51_bbu_internal_mmc_register_handler("mmc", "/dev/mmc0", 0);
> > > +   imx51_bbu_internal_spi_i2c_register_handler("spi",
> > > +                                               ZII_RDU1_DATAFLASH,
> > > +                                               BBU_HANDLER_FLAG_DEFAULT);
> > > +   /*
> > > +    * Overload freshly registered SPI update handler to deal with
> > > +    * RDU1 quirk (see above for description)
> > > +    */
> > > +   handler = bbu_find_handler_by_device(ZII_RDU1_DATAFLASH);
> > > +   if (WARN_ON(!handler))
> > > +           return -EINVAL;
> > +
> > > +   handler->handler = zii_rdu1_bbu_spi_update;
> > +
> > > +   return 0;
> > +}
> > +coredevice_initcall(zii_rdu1_init);
>
> [...]
>
> > diff --git a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
> > new file mode 100644
> > index 000000000..c28ca8653
> > --- /dev/null
> > +++ b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
> > @@ -0,0 +1,46 @@
> > +#include <debug_ll.h>
> > +#include <mach/clock-imx51_53.h>
> > +#include <mach/iomux-mx51.h>
> > +#include <common.h>
> > +#include <mach/esdctl.h>
> > +#include <mach/generic.h>
> > +#include <asm/barebox-arm-head.h>
> > +#include <asm/barebox-arm.h>
> > +
> > +static inline void setup_uart(void)
> > +{
> > > +   void __iomem *iomuxbase = IOMEM(MX51_IOMUXC_BASE_ADDR);
> > > +   void __iomem *ccmbase = IOMEM(MX51_CCM_BASE_ADDR);
> > +
> > > +   /*
> > > +    * Restore CCM values that might be changed by the Mask ROM
> > > +    * code.
> > > +    *
> > > +    * Source: RealView debug scripts provided by Freescale
> > > +    */
> > > +   writel(MX5_CCM_CBCDR_RESET_VALUE,  ccmbase + MX5_CCM_CBCDR);
> > > +   writel(MX5_CCM_CSCMR1_RESET_VALUE, ccmbase + MX5_CCM_CSCMR1);
> > > +   writel(MX5_CCM_CSCDR1_RESET_VALUE, ccmbase + MX5_CCM_CSCDR1);
> > +
> > > +   imx_setup_pad(iomuxbase, MX51_PAD_UART1_TXD__UART1_TXD);
> > +
> > > +   imx51_uart_setup_ll();
> > +
> > > +   putc_ll('>');
> > +}
> > +
> > +extern char __dtb_imx51_zii_rdu1_start[];
> > +
> > +ENTRY_FUNCTION(start_imx51_zii_rdu1, r0, r1, r2)
> > +{
> > > +   void *fdt;
> > +
> > > +   imx5_cpu_lowlevel_init();
> > +
> > > +   if (IS_ENABLED(CONFIG_DEBUG_LL))
> > > +           setup_uart();
> > +
> > > +   fdt = __dtb_imx51_zii_rdu1_start + get_runtime_offset();
> > +
> > > +   imx51_barebox_entry(fdt);
> > +}
> > \ No newline at end of file
>
> Add the newline to make git happy, please. There are more places like
> this.

Sure, will change in v3.

Thanks,
Andrey Smirnov

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Re: [PATCH v2 4/4] ARM: i.MX: Add support for ZII RDU1 board

[Lucas Stach]

Am Montag, den 25.06.2018, 09:11 -0700 schrieb Andrey Smirnov:
[...]
> > > +
> > > +/**
> > > + * zii_rdu1_bbu_spi_update - RDU1 specific BBU handler
> > > + *
> > > > + * @handler:       BBU handler pointer passed down by BBU framework
> > > > + * @data:  BBU data pointer passed down by BBU framework
> > > 
> > > + *
> > > + * RDU1 design chose to use first page of the onboard dataflash to
> > > + * store vendor board-specific paramters, which is problematic because
> > > + * imx_bbu_internal_v1_update() will not spare that region when
> > > + * peforming the update.
> > > + *
> > > + * This functions works as a thin wrapper around
> > > + * imx_bbu_internal_v1_update() and saves the data before and restores
> > > + * it after, keeping board specific data intact.
> > > + */
> > 
> > In general I like the idea of replacing the update handler in the
> > board, as it shows clearly that this is some board specific quirk.
> > 
> > I don't fully agree on the implementation of the handler though.
> > Overwriting and restoring the config area still has the risk of
> > destroying this data, leaving the unit in a bricked state.
> > 
> 
> The only info contained in config area is unit's MAC address and and
> LCD panel type. Loosing this information, while inconvenient, is not
> going to brick the unit. Additionally:
> 
> -  LCD type information could and is tentatively planed to be derived
> from P/N information available via RAVE SP EEPROM, so that leaves us
> with just MAC address.
> 
> - Config header in SPI NOR is also duplicated in SPI EEPROM connected
> to i.MX51, so it can be resorted from there if need be.
> 
> - Removing this risk will do nothing to the risk of truly bricking the
> unit via failed bootloader upgrade which is several orders of
> magnitude more likely due to size difference of bootloader image vs
> config area.

Yea, I thought there was some more valuable thing stored in this area.

> > As the config area is page aligned, there is no need to touch it at all
> > (I think). All you need to do is to point the BBU target at the barebox
> > partition on the dataflash and truncate the barebox image in the custom
> > handler by changing data->image and data->len in the custom RDU1
> > handler.
> > 
> 
> I'll give this approach a try since it sounds like it's going to allow
> me to drop a bit of extra code, but if it doesn't I think the original
> code is good enough and we should let the perfect be the enemy of the
> good.

Agreed. I won't object to the current approach if the simpler option
turns out to not work for some reason.

Regards,
Lucas

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