[PATCH] fixup! dts: update to v4.18-rc1

* [PATCH] fixup! dts: update to v4.18-rc1
@ 2018-06-24 22:22 Andrey Smirnov
  2018-06-25 20:06 ` Sascha Hauer
  0 siblings, 1 reply; 2+ messages in thread
From: Andrey Smirnov @ 2018-06-24 22:22 UTC (permalink / raw)
  To: barebox; +Cc: Andrey Smirnov

---

Sascha,

In case you haven't fixed this already, I am getting a build error on
'next' for i.MX7 due to the rename that happened as a part of "dts:
update to v4.18-rc1".

Thanks,
Andrey Smirnov

 drivers/clk/imx/clk-imx7.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/imx/clk-imx7.c b/drivers/clk/imx/clk-imx7.c
index 1025c9d17..8e92a5a3b 100644
--- a/drivers/clk/imx/clk-imx7.c
+++ b/drivers/clk/imx/clk-imx7.c
@@ -744,9 +744,9 @@ static int imx7_ccm_probe(struct device_d *dev)
 	 * exist in hardware. According to the reference manual the ethernet clocks are controlled by
 	 * gates at 0x4700 and 0x4710
 	 */
-	clks[IMX7D_ENET1_REF_ROOT_CLK] = imx_clk_gate4("enet1_ref_root_clk", "enet1_ref_post_div", base + 0x4700, 0);
+	clks[IMX7D_ENET1_IPG_ROOT_CLK] = imx_clk_gate4("enet1_ref_root_clk", "enet1_ref_post_div", base + 0x4700, 0);
 	clks[IMX7D_ENET1_TIME_ROOT_CLK] = imx_clk_gate_shared("enet1_time_root_clk", "enet1_time_post_div", "enet1_ref_root_clk");
-	clks[IMX7D_ENET2_REF_ROOT_CLK] = imx_clk_gate4("enet2_ref_root_clk", "enet2_ref_post_div", base + 0x4710, 0);
+	clks[IMX7D_ENET2_IPG_ROOT_CLK] = imx_clk_gate4("enet2_ref_root_clk", "enet2_ref_post_div", base + 0x4710, 0);
 	clks[IMX7D_ENET2_TIME_ROOT_CLK] = imx_clk_gate_shared("enet2_time_root_clk", "enet2_time_post_div", "enet2_ref_root_clk");
 	clks[IMX7D_ENET_PHY_REF_ROOT_CLK] = imx_clk_gate4("enet_phy_ref_root_clk", "enet_phy_ref_post_div", base + 0x4520, 0);
 
-- 
2.17.1


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