[PATCH v4 00/10] ZII RDU1 support

[PATCH v4 00/10] ZII RDU1 support

[Andrey Smirnov]

Everyone:

This is a patchset containing the code to add initial support for ZII
RDU1 board to Barebox.

Changes since [v3]:

  - Updated copyright header in board.c

Changes since [v2]:

  - Even better way (incorporating feedback from Lucas) of dealing
    with dataflash BBU quirks

  - Patches 1 and 2 are technically unrelated, but they were fixes for
    bugs I found while working on v3, so they are thrown in for
    convenience

  - More missing newlines added (hopefully I got them all this time)

Changes since [v1]:

  - Removed usage of compatible property for PMIC initialization

  - Less invasive (IMHO), way of dealing with dataflash BBU quirks is proposed

  - Missing newline in board.c

[v3] http://lists.infradead.org/pipermail/barebox/2018-June/033848.html

[v2] http://lists.infradead.org/pipermail/barebox/2018-June/033800.html

[v1] http://lists.infradead.org/pipermail/barebox/2018-June/033764.html
     http://lists.infradead.org/pipermail/barebox/2018-June/033765.html


Andrey Smirnov (10):
  mtd: mtd_dataflash: Don't print bogus command values for READs
  common: clock: Sample time before poller_call()
  ARM: babbage: Make PMIC initialization shareable
  bbu: Make bbu_find_handler_by_device() public
  ARM: i.MX: bbu: Make imx_bbu_internal_v1_update() public
  ARM: i.MX: Move i.MX header definitions to mach-imx
  filtype: Add code to detect i.MX image v1
  ARM: i.MX: bbu: Allow plain i.MX v1 images as a special case
  ARM: i.MX: bbu: Make struct imx_internal_bbu_handler public
  ARM: i.MX: Add support for ZII RDU1 board

 arch/arm/boards/Makefile                      |   3 +-
 .../boards/freescale-mx51-babbage/Makefile    |   5 +-
 .../arm/boards/freescale-mx51-babbage/board.c | 112 +---------------
 .../arm/boards/freescale-mx51-babbage/power.c | 120 ++++++++++++++++++
 arch/arm/boards/zii-imx51-rdu1/Makefile       |   2 +
 arch/arm/boards/zii-imx51-rdu1/board.c        |  93 ++++++++++++++
 .../flash-header-imx51-zii-rdu1.imxcfg        |  60 +++++++++
 arch/arm/boards/zii-imx51-rdu1/lowlevel.c     |  46 +++++++
 arch/arm/configs/imx_v7_defconfig             |   1 +
 arch/arm/dts/Makefile                         |   1 +
 arch/arm/dts/imx51-zii-rdu1.dts               |  52 ++++++++
 arch/arm/mach-imx/Kconfig                     |  18 ++-
 arch/arm/mach-imx/imx-bbu-internal.c          |  44 ++++---
 arch/arm/mach-imx/include/mach/bbu.h          |  21 +++
 arch/arm/mach-imx/include/mach/imx-header.h   | 118 +++++++++++++++++
 arch/arm/mach-imx/include/mach/imx5.h         |   2 +
 common/bbu.c                                  |   2 +-
 common/clock.c                                |   4 +-
 common/filetype.c                             |   8 ++
 drivers/mtd/devices/mtd_dataflash.c           |   6 +-
 images/Makefile.imx                           |   5 +
 include/bbu.h                                 |   2 +
 include/filetype.h                            |   1 +
 scripts/imx/imx.h                             | 114 +----------------
 24 files changed, 586 insertions(+), 254 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx51-babbage/power.c
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/Makefile
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/board.c
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/lowlevel.c
 create mode 100644 arch/arm/dts/imx51-zii-rdu1.dts
 create mode 100644 arch/arm/mach-imx/include/mach/imx-header.h

-- 
2.17.1


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[PATCH v4 01/10] mtd: mtd_dataflash: Don't print bogus command values for READs

[Andrey Smirnov]

Call to dev_dbg in dataflash_read() is located to early, before
command[] is initialize to correct values, so it end up printing
values from previous invocation. Move it such that it prints current
call's values.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 drivers/mtd/devices/mtd_dataflash.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index 4b8eaec05..7980a91e1 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -246,9 +246,6 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
 
 	command = priv->command;
 
-	dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n",
-		command[0], command[1], command[2], command[3]);
-
 	spi_message_init(&msg);
 
 	memset(&x[0], 0, sizeof(struct spi_transfer) * 2);
@@ -271,6 +268,9 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
 	command[3] = (u8)(addr >> 0);
 	/* plus 4 "don't care" bytes */
 
+	dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n",
+		command[0], command[1], command[2], command[3]);
+
 	status = spi_sync(priv->spi, &msg);
 
 	if (status >= 0) {
-- 
2.17.1


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[PATCH v4 02/10] common: clock: Sample time before poller_call()

[Andrey Smirnov]

Change is_timeout() to sample current time before invoking poller
infrascructure to avoid occasional false timeout conditions.

Consider the following timeout loop (can be found in wait_on_timeout):

        while (!(condition)) {
	        if (is_timeout(...)) {
	       	        return -ETIMEDOUT;
                }
        }
	...

in the original logic of is_timeout() it was possible to end up in the
following situation:

        1. Immediate check of of "condition" yeilds false (not enough
           time for it to become true has passed yet)

	2. is_timeout is called which, in turn, calls poller_call()

	3. All registerd pollers take more than specified timeout time
	   to execute.

	4. Sometime during poller_call() "contition" becomes true

	5. As a result of #3 is_timeout() returns "true"

	6. Code bails out with -ETIMEDOUT early even though timeout
	   condition didn't really occur.

One concrete example of this problem was discovered on ZII RDU1
board (poller_call() is long due to a serdev) when doing large data
transfers over SPI to attached DataFlash chip.

This commit changes is_timeout() to sample the value of time before
calling poller_call(). This way first call to is_timeout() will almost
always return false thus checking the condition at least twice before
declaring a timeout.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 common/clock.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/common/clock.c b/common/clock.c
index 7f5cff232..2b218fb6a 100644
--- a/common/clock.c
+++ b/common/clock.c
@@ -181,10 +181,12 @@ EXPORT_SYMBOL(is_timeout_non_interruptible);
 
 int is_timeout(uint64_t start_ns, uint64_t time_offset_ns)
 {
+	int ret = is_timeout_non_interruptible(start_ns, time_offset_ns);
+
 	if (time_offset_ns >= 100 * USECOND)
 		poller_call();
 
-	return is_timeout_non_interruptible(start_ns, time_offset_ns);
+	return ret;
 }
 EXPORT_SYMBOL(is_timeout);
 
-- 
2.17.1


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[PATCH v4 03/10] ARM: babbage: Make PMIC initialization shareable

[Andrey Smirnov]

Some board designs copy i.MX51 Babbadge board's PMIC design and so
require exactly the same initialization. Move correspoding code into a
separate file so it can be shared.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/boards/Makefile                      |   2 +-
 .../boards/freescale-mx51-babbage/Makefile    |   5 +-
 .../arm/boards/freescale-mx51-babbage/board.c | 112 +---------------
 .../arm/boards/freescale-mx51-babbage/power.c | 120 ++++++++++++++++++
 arch/arm/mach-imx/Kconfig                     |  13 +-
 arch/arm/mach-imx/include/mach/imx5.h         |   2 +
 6 files changed, 138 insertions(+), 116 deletions(-)
 create mode 100644 arch/arm/boards/freescale-mx51-babbage/power.c

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 711f9548f..60590dbdb 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -43,7 +43,7 @@ obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD)		+= eukrea_cpuimx51/
 obj-$(CONFIG_MACH_ELTEC_HIPERCAM)		+= eltec-hipercam/
 obj-$(CONFIG_MACH_FREESCALE_MX25_3STACK)	+= freescale-mx25-3ds/
 obj-$(CONFIG_MACH_FREESCALE_MX35_3STACK)	+= freescale-mx35-3ds/
-obj-$(CONFIG_MACH_FREESCALE_MX51_PDK)		+= freescale-mx51-babbage/
+obj-y						+= freescale-mx51-babbage/
 obj-$(CONFIG_MACH_FREESCALE_MX53_LOCO)		+= freescale-mx53-qsb/
 obj-$(CONFIG_MACH_FREESCALE_MX53_SMD)		+= freescale-mx53-smd/
 obj-$(CONFIG_MACH_FREESCALE_MX53_VMX53)		+= freescale-mx53-vmx53/
diff --git a/arch/arm/boards/freescale-mx51-babbage/Makefile b/arch/arm/boards/freescale-mx51-babbage/Makefile
index 01c7a259e..b6e085818 100644
--- a/arch/arm/boards/freescale-mx51-babbage/Makefile
+++ b/arch/arm/boards/freescale-mx51-babbage/Makefile
@@ -1,2 +1,3 @@
-obj-y += board.o
-lwl-y += lowlevel.o
+obj-$(CONFIG_MACH_FREESCALE_MX51_PDK_POWER) += power.o
+obj-$(CONFIG_MACH_FREESCALE_MX51_PDK) += board.o
+lwl-$(CONFIG_MACH_FREESCALE_MX51_PDK) += lowlevel.o
diff --git a/arch/arm/boards/freescale-mx51-babbage/board.c b/arch/arm/boards/freescale-mx51-babbage/board.c
index 915748528..06d9ce391 100644
--- a/arch/arm/boards/freescale-mx51-babbage/board.c
+++ b/arch/arm/boards/freescale-mx51-babbage/board.c
@@ -30,8 +30,6 @@
 #include <mach/bbu.h>
 #include <nand.h>
 #include <notifier.h>
-#include <spi/spi.h>
-#include <mfd/mc13xxx.h>
 #include <io.h>
 #include <asm/mmu.h>
 #include <mach/imx5.h>
@@ -44,120 +42,14 @@
 
 #define MX51_CCM_CACRR 0x10
 
-static void babbage_power_init(struct mc13xxx *mc13xxx)
-{
-	u32 val;
-
-	/* Write needed to Power Gate 2 register */
-	mc13xxx_reg_read(mc13xxx, MC13892_REG_POWER_MISC, &val);
-	val &= ~0x10000;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, val);
-
-	/* Write needed to update Charger 0 */
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_CHARGE, 0x0023807F);
-
-	/* power up the system first */
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, 0x00200000);
-
-	if (imx_silicon_revision() < IMX_CHIP_REV_3_0) {
-		/* Set core voltage to 1.1V */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_0, &val);
-		val &= ~0x1f;
-		val |= 0x14;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_0, val);
-
-		/* Setup VCC (SW2) to 1.25 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
-		val &= ~0x1f;
-		val |= 0x1a;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
-
-		/* Setup 1V2_DIG1 (SW3) to 1.25 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
-		val &= ~0x1f;
-		val |= 0x1a;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
-	} else {
-		/* Setup VCC (SW2) to 1.225 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
-		val &= ~0x1f;
-		val |= 0x19;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
-
-		/* Setup 1V2_DIG1 (SW3) to 1.2 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
-		val &= ~0x1f;
-		val |= 0x18;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
-	}
-
-	if (mc13xxx_revision(mc13xxx) < MC13892_REVISION_2_0) {
-		/* Set switchers in PWM mode for Atlas 2.0 and lower */
-		/* Setup the switcher mode for SW1 & SW2*/
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
-		val &= ~0x3c0f;
-		val |= 0x1405;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
-
-		/* Setup the switcher mode for SW3 & SW4 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
-		val &= ~0xf0f;
-		val |= 0x505;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
-	} else {
-		/* Set switchers in Auto in NORMAL mode & STANDBY mode for Atlas 2.0a */
-		/* Setup the switcher mode for SW1 & SW2*/
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
-		val &= ~0x3c0f;
-		val |= 0x2008;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
-
-		/* Setup the switcher mode for SW3 & SW4 */
-		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
-		val &= ~0xf0f;
-		val |= 0x808;
-		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
-	}
-
-	/* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.5V */
-	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_0, &val);
-	val &= ~0x34030;
-	val |= 0x10020;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_0, val);
-
-	/* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
-	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_1, &val);
-	val &= ~0x1FC;
-	val |= 0x1F4;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_1, val);
-
-	/* Configure VGEN3 and VCAM regulators to use external PNP */
-	val = 0x208;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
-
-	udelay(200);
-
-	/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
-	val = 0x49249;
-	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
-
-	udelay(200);
-
-	pr_info("initialized PMIC\n");
-
-	console_flush();
-	imx51_init_lowlevel(800);
-	clock_notifier_call_chain();
-}
-
 static int imx51_babbage_init(void)
 {
 	if (!of_machine_is_compatible("fsl,imx51-babbage"))
 		return 0;
 
-	barebox_set_hostname("babbage");
+	imx51_babbage_power_init();
 
-	mc13xxx_register_init_callback(babbage_power_init);
+	barebox_set_hostname("babbage");
 
 	armlinux_set_architecture(MACH_TYPE_MX51_BABBAGE);
 
diff --git a/arch/arm/boards/freescale-mx51-babbage/power.c b/arch/arm/boards/freescale-mx51-babbage/power.c
new file mode 100644
index 000000000..6edc672a5
--- /dev/null
+++ b/arch/arm/boards/freescale-mx51-babbage/power.c
@@ -0,0 +1,120 @@
+#define pr_fmt(fmt) "babbage-power: " fmt
+
+#include <common.h>
+#include <init.h>
+#include <notifier.h>
+#include <mach/revision.h>
+#include <mach/imx5.h>
+#include <mfd/mc13xxx.h>
+
+static void babbage_power_init(struct mc13xxx *mc13xxx)
+{
+	u32 val;
+
+	/* Write needed to Power Gate 2 register */
+	mc13xxx_reg_read(mc13xxx, MC13892_REG_POWER_MISC, &val);
+	val &= ~0x10000;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, val);
+
+	/* Write needed to update Charger 0 */
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_CHARGE, 0x0023807F);
+
+	/* power up the system first */
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, 0x00200000);
+
+	if (imx_silicon_revision() < IMX_CHIP_REV_3_0) {
+		/* Set core voltage to 1.1V */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_0, &val);
+		val &= ~0x1f;
+		val |= 0x14;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_0, val);
+
+		/* Setup VCC (SW2) to 1.25 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
+		val &= ~0x1f;
+		val |= 0x1a;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
+
+		/* Setup 1V2_DIG1 (SW3) to 1.25 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
+		val &= ~0x1f;
+		val |= 0x1a;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
+	} else {
+		/* Setup VCC (SW2) to 1.225 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val);
+		val &= ~0x1f;
+		val |= 0x19;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val);
+
+		/* Setup 1V2_DIG1 (SW3) to 1.2 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val);
+		val &= ~0x1f;
+		val |= 0x18;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val);
+	}
+
+	if (mc13xxx_revision(mc13xxx) < MC13892_REVISION_2_0) {
+		/* Set switchers in PWM mode for Atlas 2.0 and lower */
+		/* Setup the switcher mode for SW1 & SW2*/
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
+		val &= ~0x3c0f;
+		val |= 0x1405;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
+
+		/* Setup the switcher mode for SW3 & SW4 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
+		val &= ~0xf0f;
+		val |= 0x505;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
+	} else {
+		/* Set switchers in Auto in NORMAL mode & STANDBY mode
+		 * for Atlas 2.0a */
+		/* Setup the switcher mode for SW1 & SW2*/
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val);
+		val &= ~0x3c0f;
+		val |= 0x2008;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val);
+
+		/* Setup the switcher mode for SW3 & SW4 */
+		mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val);
+		val &= ~0xf0f;
+		val |= 0x808;
+		mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val);
+	}
+
+	/* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.5V */
+	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_0, &val);
+	val &= ~0x34030;
+	val |= 0x10020;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_0, val);
+
+	/* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */
+	mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_1, &val);
+	val &= ~0x1FC;
+	val |= 0x1F4;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_1, val);
+
+	/* Configure VGEN3 and VCAM regulators to use external PNP */
+	val = 0x208;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
+
+	udelay(200);
+
+	/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
+	val = 0x49249;
+	mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val);
+
+	udelay(200);
+
+	pr_info("initialized PMIC\n");
+
+	console_flush();
+	imx51_init_lowlevel(800);
+	clock_notifier_call_chain();
+}
+
+void imx51_babbage_power_init(void)
+{
+	mc13xxx_register_init_callback(babbage_power_init);
+}
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index a743bbfda..f0b10eeef 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -85,6 +85,15 @@ config RESET_IMX_SRC
 	def_bool y
 	depends on ARCH_IMX6 || ARCH_IMX50 || ARCH_IMX51 || ARCH_IMX53
 
+#
+# PMIC configuration found on i.MX51 Babbadge board
+#
+config MACH_FREESCALE_MX51_PDK_POWER
+        bool
+	select SPI
+	select DRIVER_SPI_IMX
+	select MFD_MC13XXX
+
 comment "Freescale i.MX System-on-Chip"
 
 config ARCH_IMX1
@@ -256,9 +265,7 @@ config MACH_EMBEDSKY_E9
 config MACH_FREESCALE_MX51_PDK
 	bool "Freescale i.MX51 PDK"
 	select ARCH_IMX51
-	select SPI
-	select DRIVER_SPI_IMX
-	select MFD_MC13XXX
+	select MACH_FREESCALE_MX51_PDK_POWER
 
 config MACH_CCMX53
 	bool "Digi ConnectCore i.MX53"
diff --git a/arch/arm/mach-imx/include/mach/imx5.h b/arch/arm/mach-imx/include/mach/imx5.h
index 595714129..dd5cfe99c 100644
--- a/arch/arm/mach-imx/include/mach/imx5.h
+++ b/arch/arm/mach-imx/include/mach/imx5.h
@@ -18,4 +18,6 @@ void imx5_setup_pll(void __iomem *base, int freq, u32 op, u32 mfd, u32 mfn);
 #define imx5_setup_pll_400(base)	imx5_setup_pll((base),  400, (( 8 << 4) + ((2 - 1) << 0)), (3 - 1), 1)
 #define imx5_setup_pll_216(base)	imx5_setup_pll((base),  216, (( 6 << 4) + ((3 - 1) << 0)), (4 - 1), 3)
 
+void imx51_babbage_power_init(void);
+
 #endif /* __MACH_MX53_H */
-- 
2.17.1


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[PATCH v4 04/10] bbu: Make bbu_find_handler_by_device() public

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 common/bbu.c  | 2 +-
 include/bbu.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/common/bbu.c b/common/bbu.c
index 11e44f4a7..d9b0c7ece 100644
--- a/common/bbu.c
+++ b/common/bbu.c
@@ -117,7 +117,7 @@ static struct bbu_handler *bbu_find_handler(const char *name)
 	return NULL;
 }
 
-static struct bbu_handler *bbu_find_handler_by_device(const char *devicepath)
+struct bbu_handler *bbu_find_handler_by_device(const char *devicepath)
 {
 	struct bbu_handler *handler;
 
diff --git a/include/bbu.h b/include/bbu.h
index def568e49..b6e7410db 100644
--- a/include/bbu.h
+++ b/include/bbu.h
@@ -44,6 +44,8 @@ void bbu_handlers_list(void);
 
 int bbu_handlers_iterate(int (*fn)(struct bbu_handler *, void *), void *);
 
+struct bbu_handler *bbu_find_handler_by_device(const char *devicepath);
+
 #ifdef CONFIG_BAREBOX_UPDATE
 
 int bbu_register_handler(struct bbu_handler *);
-- 
2.17.1


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[PATCH v4 05/10] ARM: i.MX: bbu: Make imx_bbu_internal_v1_update() public

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/imx-bbu-internal.c | 2 +-
 arch/arm/mach-imx/include/mach/bbu.h | 8 ++++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c
index 84810f18a..7735273b4 100644
--- a/arch/arm/mach-imx/imx-bbu-internal.c
+++ b/arch/arm/mach-imx/imx-bbu-internal.c
@@ -156,7 +156,7 @@ static int imx_bbu_check_prereq(const char *devicefile, struct bbu_data *data)
  * the resulting image to the device. Currently this handles MMC/SD
  * devices.
  */
-static int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *data)
+int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *data)
 {
 	struct imx_internal_bbu_handler *imx_handler =
 		container_of(handler, struct imx_internal_bbu_handler, handler);
diff --git a/arch/arm/mach-imx/include/mach/bbu.h b/arch/arm/mach-imx/include/mach/bbu.h
index d62382831..04be8cea5 100644
--- a/arch/arm/mach-imx/include/mach/bbu.h
+++ b/arch/arm/mach-imx/include/mach/bbu.h
@@ -9,6 +9,8 @@ struct imx_dcd_v2_entry;
 
 #ifdef CONFIG_BAREBOX_UPDATE
 
+int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *data);
+
 int imx51_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
 		unsigned long flags);
 
@@ -41,6 +43,12 @@ int imx_bbu_external_nor_register_handler(const char *name, char *devicefile,
 
 #else
 
+static inline int imx_bbu_internal_v1_update(struct bbu_handler *handler,
+					     struct bbu_data *data)
+{
+	return -ENOSYS;
+}
+
 static inline int imx51_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
 		unsigned long flags)
 {
-- 
2.17.1


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[PATCH v4 06/10] ARM: i.MX: Move i.MX header definitions to mach-imx

[Andrey Smirnov]

Move i.MX header definitions from scripts to mach-imx in order to make
it availible to both script and bootloader code.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/include/mach/imx-header.h | 118 ++++++++++++++++++++
 scripts/imx/imx.h                           | 114 +------------------
 2 files changed, 119 insertions(+), 113 deletions(-)
 create mode 100644 arch/arm/mach-imx/include/mach/imx-header.h

diff --git a/arch/arm/mach-imx/include/mach/imx-header.h b/arch/arm/mach-imx/include/mach/imx-header.h
new file mode 100644
index 000000000..4fedba7ad
--- /dev/null
+++ b/arch/arm/mach-imx/include/mach/imx-header.h
@@ -0,0 +1,118 @@
+#ifndef __IMX_HEADER_H__
+#define __IMX_HEADER_H__
+
+#define HEADER_LEN 0x1000	/* length of the blank area + IVT + DCD */
+
+/*
+ * ============================================================================
+ * i.MX flash header v1 handling. Found on i.MX35 and i.MX51
+ * ============================================================================
+ */
+#define DCD_BARKER       0xb17219e9
+
+struct imx_flash_header {
+	uint32_t app_code_jump_vector;
+	uint32_t app_code_barker;
+	uint32_t app_code_csf;
+	uint32_t dcd_ptr_ptr;
+	uint32_t super_root_key;
+	uint32_t dcd;
+	uint32_t app_dest;
+	uint32_t dcd_barker;
+	uint32_t dcd_block_len;
+} __attribute__((packed));
+
+struct imx_boot_data {
+	uint32_t start;
+	uint32_t size;
+	uint32_t plugin;
+} __attribute__((packed));
+
+struct imx_dcd_rec_v1 {
+	uint32_t type;
+	uint32_t addr;
+	uint32_t val;
+} __attribute__((packed));
+
+#define TAG_IVT_HEADER	0xd1
+#define IVT_VERSION	0x40
+#define TAG_DCD_HEADER	0xd2
+#define DCD_VERSION	0x40
+#define TAG_UNLOCK	0xb2
+#define TAG_NOP		0xc0
+#define TAG_WRITE	0xcc
+#define TAG_CHECK	0xcf
+#define PARAMETER_FLAG_MASK	(1 << 3)
+#define PARAMETER_FLAG_SET	(1 << 4)
+
+struct imx_ivt_header {
+	uint8_t tag;
+	uint16_t length;
+	uint8_t version;
+} __attribute__((packed));
+
+struct imx_flash_header_v2 {
+	struct imx_ivt_header header;
+
+	uint32_t entry;
+	uint32_t reserved1;
+	uint32_t dcd_ptr;
+	uint32_t boot_data_ptr;
+	uint32_t self;
+	uint32_t csf;
+	uint32_t reserved2;
+
+	struct imx_boot_data boot_data;
+	struct imx_ivt_header dcd_header;
+} __attribute__((packed));
+
+struct config_data {
+	uint32_t image_load_addr;
+	uint32_t image_dcd_offset;
+	uint32_t image_size;
+	uint32_t load_size;
+	char *outfile;
+	char *srkfile;
+	int header_version;
+	off_t header_gap;
+	uint32_t first_opcode;
+	int cpu_type;
+	int (*check)(const struct config_data *data, uint32_t cmd,
+		     uint32_t addr, uint32_t mask);
+	int (*write_mem)(const struct config_data *data, uint32_t addr,
+			 uint32_t val, int width, int set_bits, int clear_bits);
+	int (*nop)(const struct config_data *data);
+	int csf_space;
+	char *csf;
+};
+
+#define MAX_RECORDS_DCD_V2 1024
+struct imx_dcd_v2_write_rec {
+	uint32_t addr;
+	uint32_t val;
+} __attribute__((packed));
+
+struct imx_dcd_v2_write {
+	uint8_t tag;
+	uint16_t length;
+	uint8_t param;
+	struct imx_dcd_v2_write_rec data[MAX_RECORDS_DCD_V2];
+} __attribute__((packed));
+
+struct imx_dcd_v2_check {
+	uint8_t tag;
+	uint16_t length;
+	uint8_t param;
+	uint32_t addr;
+	uint32_t mask;
+	uint32_t count;
+} __attribute__((packed));
+
+enum imx_dcd_v2_check_cond {
+	until_all_bits_clear = 0, /* until ((*address & mask) == 0) { ...} */
+	until_any_bit_clear = 1, /* until ((*address & mask) != mask) { ...} */
+	until_all_bits_set = 2, /* until ((*address & mask) == mask) { ...} */
+	until_any_bit_set = 3, /* until ((*address & mask) != 0) { ...} */
+} __attribute__((packed));
+
+#endif
diff --git a/scripts/imx/imx.h b/scripts/imx/imx.h
index 92a3fd316..20fb1e876 100644
--- a/scripts/imx/imx.h
+++ b/scripts/imx/imx.h
@@ -1,116 +1,4 @@
 
-#define HEADER_LEN 0x1000	/* length of the blank area + IVT + DCD */
-
-/*
- * ============================================================================
- * i.MX flash header v1 handling. Found on i.MX35 and i.MX51
- * ============================================================================
- */
-#define DCD_BARKER       0xb17219e9
-
-struct imx_flash_header {
-	uint32_t app_code_jump_vector;
-	uint32_t app_code_barker;
-	uint32_t app_code_csf;
-	uint32_t dcd_ptr_ptr;
-	uint32_t super_root_key;
-	uint32_t dcd;
-	uint32_t app_dest;
-	uint32_t dcd_barker;
-	uint32_t dcd_block_len;
-} __attribute__((packed));
-
-struct imx_boot_data {
-	uint32_t start;
-	uint32_t size;
-	uint32_t plugin;
-} __attribute__((packed));
-
-struct imx_dcd_rec_v1 {
-	uint32_t type;
-	uint32_t addr;
-	uint32_t val;
-} __attribute__((packed));
-
-#define TAG_IVT_HEADER	0xd1
-#define IVT_VERSION	0x40
-#define TAG_DCD_HEADER	0xd2
-#define DCD_VERSION	0x40
-#define TAG_UNLOCK	0xb2
-#define TAG_NOP		0xc0
-#define TAG_WRITE	0xcc
-#define TAG_CHECK	0xcf
-#define PARAMETER_FLAG_MASK	(1 << 3)
-#define PARAMETER_FLAG_SET	(1 << 4)
-
-struct imx_ivt_header {
-	uint8_t tag;
-	uint16_t length;
-	uint8_t version;
-} __attribute__((packed));
-
-struct imx_flash_header_v2 {
-	struct imx_ivt_header header;
-
-	uint32_t entry;
-	uint32_t reserved1;
-	uint32_t dcd_ptr;
-	uint32_t boot_data_ptr;
-	uint32_t self;
-	uint32_t csf;
-	uint32_t reserved2;
-
-	struct imx_boot_data boot_data;
-	struct imx_ivt_header dcd_header;
-} __attribute__((packed));
-
-struct config_data {
-	uint32_t image_load_addr;
-	uint32_t image_dcd_offset;
-	uint32_t image_size;
-	uint32_t load_size;
-	char *outfile;
-	char *srkfile;
-	int header_version;
-	off_t header_gap;
-	uint32_t first_opcode;
-	int cpu_type;
-	int (*check)(const struct config_data *data, uint32_t cmd,
-		     uint32_t addr, uint32_t mask);
-	int (*write_mem)(const struct config_data *data, uint32_t addr,
-			 uint32_t val, int width, int set_bits, int clear_bits);
-	int (*nop)(const struct config_data *data);
-	int csf_space;
-	char *csf;
-};
-
-#define MAX_RECORDS_DCD_V2 1024
-struct imx_dcd_v2_write_rec {
-	uint32_t addr;
-	uint32_t val;
-} __attribute__((packed));
-
-struct imx_dcd_v2_write {
-	uint8_t tag;
-	uint16_t length;
-	uint8_t param;
-	struct imx_dcd_v2_write_rec data[MAX_RECORDS_DCD_V2];
-} __attribute__((packed));
-
-struct imx_dcd_v2_check {
-	uint8_t tag;
-	uint16_t length;
-	uint8_t param;
-	uint32_t addr;
-	uint32_t mask;
-	uint32_t count;
-} __attribute__((packed));
-
-enum imx_dcd_v2_check_cond {
-	until_all_bits_clear = 0, /* until ((*address & mask) == 0) { ...} */
-	until_any_bit_clear = 1, /* until ((*address & mask) != mask) { ...} */
-	until_all_bits_set = 2, /* until ((*address & mask) == mask) { ...} */
-	until_any_bit_set = 3, /* until ((*address & mask) != 0) { ...} */
-} __attribute__((packed));
+#include <mach/imx-header.h>
 
 int parse_config(struct config_data *data, const char *filename);
-- 
2.17.1


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[PATCH v4 07/10] filtype: Add code to detect i.MX image v1

[Andrey Smirnov]

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 common/filetype.c  | 8 ++++++++
 include/filetype.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/common/filetype.c b/common/filetype.c
index c5f2384a6..cebf4d311 100644
--- a/common/filetype.c
+++ b/common/filetype.c
@@ -29,6 +29,9 @@
 #include <image-sparse.h>
 #include <elf.h>
 
+#include <../mach-imx/include/mach/imx-header.h>
+
+
 struct filetype_str {
 	const char *name;	/* human readable filetype */
 	const char *shortname;	/* short string without spaces for shell scripts */
@@ -71,6 +74,7 @@ static const struct filetype_str filetype_str[] = {
 	[filetype_android_sparse] = { "Android sparse image", "sparse" },
 	[filetype_arm64_linux_image] = { "ARM aarch64 Linux image", "aarch64-linux" },
 	[filetype_elf] = { "ELF", "elf" },
+	[filetype_imx_image_v1] = { "i.MX image (v1)", "imx-image-v1" },
 };
 
 const char *file_type_to_string(enum filetype f)
@@ -250,6 +254,7 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
 	const u64 *buf64 = _buf;
 	const u8 *buf8 = _buf;
 	const u16 *buf16 = _buf;
+	const struct imx_flash_header *imx_flash_header = _buf;
 	enum filetype type;
 
 	if (bufsize < 9)
@@ -361,6 +366,9 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize)
 	if (strncmp(buf8, ELFMAG, 4) == 0)
 		return filetype_elf;
 
+	if (imx_flash_header->dcd_barker == DCD_BARKER)
+		return filetype_imx_image_v1;
+
 	return filetype_unknown;
 }
 
diff --git a/include/filetype.h b/include/filetype.h
index 237ed3fbe..e2df5fabf 100644
--- a/include/filetype.h
+++ b/include/filetype.h
@@ -43,6 +43,7 @@ enum filetype {
 	filetype_android_sparse,
 	filetype_arm64_linux_image,
 	filetype_elf,
+	filetype_imx_image_v1,
 	filetype_max,
 };
 
-- 
2.17.1


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[PATCH v4 08/10] ARM: i.MX: bbu: Allow plain i.MX v1 images as a special case

[Andrey Smirnov]

If we are passed a plain i.MX v1 image without the usual 1K preamble -
assume a special case and don't try to apply bbu_force() logic.

This is useful in cases where a board specific quirk to make BBU work
is needed.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/imx-bbu-internal.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c
index 7735273b4..8c44d601d 100644
--- a/arch/arm/mach-imx/imx-bbu-internal.c
+++ b/arch/arm/mach-imx/imx-bbu-internal.c
@@ -133,9 +133,19 @@ err_close:
 
 static int imx_bbu_check_prereq(const char *devicefile, struct bbu_data *data)
 {
+	enum filetype type;
 	int ret;
 
-	if (file_detect_type(data->image, data->len) != filetype_arm_barebox) {
+	type = file_detect_type(data->image, data->len);
+
+	switch (type) {
+	case filetype_imx_image_v1:
+		pr_debug("Detected %s. Assuming special case\n",
+			 file_type_to_string(type));
+		break;
+	case filetype_arm_barebox:
+		break;
+	default:
 		if (!bbu_force(data, "Not an ARM barebox image"))
 			return -EINVAL;
 	}
-- 
2.17.1


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[PATCH v4 09/10] ARM: i.MX: bbu: Make struct imx_internal_bbu_handler public

[Andrey Smirnov]

Make struct imx_internal_bbu_handler public, so it would be possible
to access some of its parameters in board specific code.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/mach-imx/imx-bbu-internal.c | 30 +++++++++++-----------------
 arch/arm/mach-imx/include/mach/bbu.h | 13 ++++++++++++
 2 files changed, 25 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c
index 8c44d601d..1dde65a0c 100644
--- a/arch/arm/mach-imx/imx-bbu-internal.c
+++ b/arch/arm/mach-imx/imx-bbu-internal.c
@@ -38,13 +38,6 @@
 #define IMX_INTERNAL_FLAG_KEEP_DOSPART	(1 << 1)
 #define IMX_INTERNAL_FLAG_ERASE		(1 << 2)
 
-struct imx_internal_bbu_handler {
-	struct bbu_handler handler;
-	unsigned long flash_header_offset;
-	size_t device_size;
-	unsigned long flags;
-};
-
 /*
  * Actually write an image to the target device, eventually keeping a
  * DOS partition table on the device
@@ -168,8 +161,6 @@ static int imx_bbu_check_prereq(const char *devicefile, struct bbu_data *data)
  */
 int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *data)
 {
-	struct imx_internal_bbu_handler *imx_handler =
-		container_of(handler, struct imx_internal_bbu_handler, handler);
 	int ret;
 
 	ret = imx_bbu_check_prereq(data->devicefile, data);
@@ -178,7 +169,9 @@ int imx_bbu_internal_v1_update(struct bbu_handler *handler, struct bbu_data *dat
 
 	pr_info("updating to %s\n", data->devicefile);
 
-	ret = imx_bbu_write_device(imx_handler, data->devicefile, data, data->image, data->len);
+	ret = imx_bbu_write_device(to_imx_internal_bbu_hander(handler),
+				   data->devicefile, data, data->image,
+				   data->len);
 
 	return ret;
 }
@@ -365,11 +358,12 @@ out:
  */
 static int imx_bbu_internal_v2_update(struct bbu_handler *handler, struct bbu_data *data)
 {
-	struct imx_internal_bbu_handler *imx_handler =
-		container_of(handler, struct imx_internal_bbu_handler, handler);
+	struct imx_internal_bbu_handler *imx_handler;
 	int ret;
 	const uint32_t *barker;
 
+	imx_handler = to_imx_internal_bbu_hander(handler);
+
 	ret = imx_bbu_check_prereq(data->devicefile, data);
 	if (ret)
 		return ret;
@@ -393,14 +387,15 @@ static int imx_bbu_internal_v2_update(struct bbu_handler *handler, struct bbu_da
 static int imx_bbu_internal_v2_mmcboot_update(struct bbu_handler *handler,
 					      struct bbu_data *data)
 {
-	struct imx_internal_bbu_handler *imx_handler =
-		container_of(handler, struct imx_internal_bbu_handler, handler);
+	struct imx_internal_bbu_handler *imx_handler;
 	int ret;
 	const uint32_t *barker;
 	char *bootpartvar;
 	const char *bootpart;
 	char *devicefile;
 
+	imx_handler = to_imx_internal_bbu_hander(handler);
+
 	barker = data->image + imx_handler->flash_header_offset;
 
 	if (*barker != IVT_BARKER) {
@@ -445,16 +440,15 @@ free_bootpartvar:
 
 static int imx_bbu_external_update(struct bbu_handler *handler, struct bbu_data *data)
 {
-	struct imx_internal_bbu_handler *imx_handler =
-		container_of(handler, struct imx_internal_bbu_handler, handler);
 	int ret;
 
 	ret = imx_bbu_check_prereq(data->devicefile, data);
 	if (ret)
 		return ret;
 
-	return imx_bbu_write_device(imx_handler, data->devicefile, data,
-				    data->image, data->len);
+	return imx_bbu_write_device(to_imx_internal_bbu_hander(handler),
+				    data->devicefile, data, data->image,
+				    data->len);
 }
 
 static struct imx_internal_bbu_handler *__init_handler(const char *name, char *devicefile,
diff --git a/arch/arm/mach-imx/include/mach/bbu.h b/arch/arm/mach-imx/include/mach/bbu.h
index 04be8cea5..5c3349d98 100644
--- a/arch/arm/mach-imx/include/mach/bbu.h
+++ b/arch/arm/mach-imx/include/mach/bbu.h
@@ -4,6 +4,19 @@
 #include <bbu.h>
 #include <errno.h>
 
+struct imx_internal_bbu_handler {
+	struct bbu_handler handler;
+	unsigned long flash_header_offset;
+	size_t device_size;
+	unsigned long flags;
+};
+
+static inline struct imx_internal_bbu_handler *
+to_imx_internal_bbu_hander(struct bbu_handler *handler)
+{
+	return container_of(handler, struct imx_internal_bbu_handler, handler);
+}
+
 struct imx_dcd_entry;
 struct imx_dcd_v2_entry;
 
-- 
2.17.1


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[PATCH v4 10/10] ARM: i.MX: Add support for ZII RDU1 board

[Andrey Smirnov]

ZII RDU1 is a i.MX51 based, Babbagde board derivative supported by
upstream kernel. This commit add support for it to Barebox.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 arch/arm/boards/Makefile                      |  1 +
 arch/arm/boards/zii-imx51-rdu1/Makefile       |  2 +
 arch/arm/boards/zii-imx51-rdu1/board.c        | 93 +++++++++++++++++++
 .../flash-header-imx51-zii-rdu1.imxcfg        | 60 ++++++++++++
 arch/arm/boards/zii-imx51-rdu1/lowlevel.c     | 46 +++++++++
 arch/arm/configs/imx_v7_defconfig             |  1 +
 arch/arm/dts/Makefile                         |  1 +
 arch/arm/dts/imx51-zii-rdu1.dts               | 52 +++++++++++
 arch/arm/mach-imx/Kconfig                     |  5 +
 images/Makefile.imx                           |  5 +
 10 files changed, 266 insertions(+)
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/Makefile
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/board.c
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
 create mode 100644 arch/arm/boards/zii-imx51-rdu1/lowlevel.c
 create mode 100644 arch/arm/dts/imx51-zii-rdu1.dts

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 60590dbdb..0c21002e9 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -151,5 +151,6 @@ obj-$(CONFIG_MACH_VSCOM_BALTOS)			+= vscom-baltos/
 obj-$(CONFIG_MACH_QEMU_VIRT64)			+= qemu-virt64/
 obj-$(CONFIG_MACH_WARP7)			+= element14-warp7/
 obj-$(CONFIG_MACH_VF610_TWR)			+= freescale-vf610-twr/
+obj-$(CONFIG_MACH_ZII_RDU1)			+= zii-imx51-rdu1/
 obj-$(CONFIG_MACH_ZII_RDU2)			+= zii-imx6q-rdu2/
 obj-$(CONFIG_MACH_ZII_VF610_DEV)		+= zii-vf610-dev/
diff --git a/arch/arm/boards/zii-imx51-rdu1/Makefile b/arch/arm/boards/zii-imx51-rdu1/Makefile
new file mode 100644
index 000000000..01c7a259e
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/Makefile
@@ -0,0 +1,2 @@
+obj-y += board.o
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c
new file mode 100644
index 000000000..b52584622
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/board.c
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright (C) 2017 Zodiac Inflight Innovation
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * based on previous iterations of this code
+ *
+ *     Copyright (C) 2015 Nikita Yushchenko, CogentEmbedded, Inc
+ *     Copyright (C) 2015 Andrey Gusakov, CogentEmbedded, Inc
+ *
+ * based on similar i.MX51 EVK (Babbage) board support code
+ *
+ *     Copyright (C) 2007 Sascha Hauer, Pengutronix
+ */
+
+#include <common.h>
+#include <init.h>
+#include <mach/bbu.h>
+#include <libfile.h>
+#include <mach/imx5.h>
+
+#define ZII_RDU1_DATAFLASH		"/dev/dataflash0"
+#define ZII_RDU1_DATAFLASH_BAREBOX	ZII_RDU1_DATAFLASH ".barebox"
+
+/**
+ * zii_rdu1_bbu_spi_update - RDU1 specific BBU handler
+ *
+ * @handler:	BBU handler pointer passed down by BBU framework
+ * @data:	BBU data pointer passed down by BBU framework
+ *
+ * RDU1 design chose to use first page of the onboard dataflash to
+ * store vendor board-specific paramters, which means it needs to be
+ * left intact. However this is problematic because regular ARM
+ * barebox images contain a 1K preamble and are expected to be placed
+ * starting at offset zero.
+ *
+ * To make BBU work we:
+ *
+ *    - Use a dedicated ".barebox" cdev to take care of 1K offset on the
+ *      dataflash side
+ *
+ *    - Use this thin wrapper in order to remove the first 1K of the
+ *      passed barebox image in order to make all of the pieces to
+ *      align.
+ */
+static int zii_rdu1_bbu_spi_update(struct bbu_handler *handler,
+				   struct bbu_data *data)
+{
+	const struct imx_internal_bbu_handler *imx_handler;
+
+	imx_handler = to_imx_internal_bbu_hander(handler);
+
+	if (file_detect_type(data->image, data->len) != filetype_arm_barebox) {
+		pr_err("Not an ARM barebox image\n");
+		return -EINVAL;
+	}
+
+	data->image += imx_handler->flash_header_offset;
+	data->len   -= imx_handler->flash_header_offset;
+
+	return imx_bbu_internal_v1_update(handler, data);
+}
+
+static int zii_rdu1_init(void)
+{
+	struct bbu_handler *handler;
+
+	if (!of_machine_is_compatible("zii,imx51-rdu1"))
+		return 0;
+
+	imx51_babbage_power_init();
+
+	barebox_set_hostname("rdu1");
+
+	imx51_bbu_internal_mmc_register_handler("mmc", "/dev/mmc0", 0);
+	imx51_bbu_internal_spi_i2c_register_handler("spi",
+						    ZII_RDU1_DATAFLASH_BAREBOX,
+						    BBU_HANDLER_FLAG_DEFAULT);
+	/*
+	 * Overload freshly registered SPI update handler to deal with
+	 * RDU1 quirk (see above for description)
+	 */
+	handler = bbu_find_handler_by_device(ZII_RDU1_DATAFLASH_BAREBOX);
+	if (WARN_ON(!handler))
+		return -EINVAL;
+
+	handler->handler = zii_rdu1_bbu_spi_update;
+
+	return 0;
+}
+coredevice_initcall(zii_rdu1_init);
diff --git a/arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg b/arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
new file mode 100644
index 000000000..76f4c6b59
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
@@ -0,0 +1,60 @@
+soc imx51
+loadaddr 0x90000000
+dcdofs 0x400
+
+wm 32 0x73fa88a0 0x00000200
+wm 32 0x73fa850c 0x000020c5
+wm 32 0x73fa8510 0x000020c5
+wm 32 0x73fa883c 0x00000002
+wm 32 0x73fa8848 0x00000002
+wm 32 0x73fa84b8 0x000000e7
+wm 32 0x73fa84bc 0x00000045
+wm 32 0x73fa84c0 0x00000045
+wm 32 0x73fa84c4 0x00000045
+wm 32 0x73fa84c8 0x00000045
+wm 32 0x73fa8820 0x00000000
+wm 32 0x73fa84a4 0x00000003
+wm 32 0x73fa84a8 0x00000003
+wm 32 0x73fa84ac 0x000000e3
+wm 32 0x73fa84b0 0x000000e3
+wm 32 0x73fa84b4 0x000000e3
+wm 32 0x73fa84cc 0x000000e3
+wm 32 0x73fa84d0 0x000000e2
+wm 32 0x73fa882c 0x00000004
+wm 32 0x73fa88a4 0x00000004
+wm 32 0x73fa88ac 0x00000004
+wm 32 0x73fa88b8 0x00000004
+wm 32 0x83fd9000 0x82a20000
+wm 32 0x83fd9008 0x82a20000
+wm 32 0x83fd9010 0x000ad0d0
+wm 32 0x83fd9004 0x3f3584ab
+wm 32 0x83fd900c 0x3f3584ab
+wm 32 0x83fd9014 0x04008008
+wm 32 0x83fd9014 0x0000801a
+wm 32 0x83fd9014 0x0000801b
+wm 32 0x83fd9014 0x00448019
+wm 32 0x83fd9014 0x07328018
+wm 32 0x83fd9014 0x04008008
+wm 32 0x83fd9014 0x00008010
+wm 32 0x83fd9014 0x00008010
+wm 32 0x83fd9014 0x06328018
+wm 32 0x83fd9014 0x03808019
+wm 32 0x83fd9014 0x00408019
+wm 32 0x83fd9014 0x00008000
+wm 32 0x83fd9014 0x0400800c
+wm 32 0x83fd9014 0x0000801e
+wm 32 0x83fd9014 0x0000801f
+wm 32 0x83fd9014 0x0000801d
+wm 32 0x83fd9014 0x0732801c
+wm 32 0x83fd9014 0x0400800c
+wm 32 0x83fd9014 0x00008014
+wm 32 0x83fd9014 0x00008014
+wm 32 0x83fd9014 0x0632801c
+wm 32 0x83fd9014 0x0380801d
+wm 32 0x83fd9014 0x0040801d
+wm 32 0x83fd9014 0x00008004
+wm 32 0x83fd9000 0xb2a20000
+wm 32 0x83fd9008 0xb2a20000
+wm 32 0x83fd9010 0x000ad6d0
+wm 32 0x83fd9034 0x90000000
+wm 32 0x83fd9014 0x00000000
diff --git a/arch/arm/boards/zii-imx51-rdu1/lowlevel.c b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
new file mode 100644
index 000000000..cca331a9c
--- /dev/null
+++ b/arch/arm/boards/zii-imx51-rdu1/lowlevel.c
@@ -0,0 +1,46 @@
+#include <debug_ll.h>
+#include <mach/clock-imx51_53.h>
+#include <mach/iomux-mx51.h>
+#include <common.h>
+#include <mach/esdctl.h>
+#include <mach/generic.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+
+static inline void setup_uart(void)
+{
+	void __iomem *iomuxbase = IOMEM(MX51_IOMUXC_BASE_ADDR);
+	void __iomem *ccmbase = IOMEM(MX51_CCM_BASE_ADDR);
+
+	/*
+	 * Restore CCM values that might be changed by the Mask ROM
+	 * code.
+	 *
+	 * Source: RealView debug scripts provided by Freescale
+	 */
+	writel(MX5_CCM_CBCDR_RESET_VALUE,  ccmbase + MX5_CCM_CBCDR);
+	writel(MX5_CCM_CSCMR1_RESET_VALUE, ccmbase + MX5_CCM_CSCMR1);
+	writel(MX5_CCM_CSCDR1_RESET_VALUE, ccmbase + MX5_CCM_CSCDR1);
+
+	imx_setup_pad(iomuxbase, MX51_PAD_UART1_TXD__UART1_TXD);
+
+	imx51_uart_setup_ll();
+
+	putc_ll('>');
+}
+
+extern char __dtb_imx51_zii_rdu1_start[];
+
+ENTRY_FUNCTION(start_imx51_zii_rdu1, r0, r1, r2)
+{
+	void *fdt;
+
+	imx5_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_imx51_zii_rdu1_start + get_runtime_offset();
+
+	imx51_barebox_entry(fdt);
+}
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index 8aef9d6ef..0fc3c9c50 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -35,6 +35,7 @@ CONFIG_MACH_CM_FX6=y
 CONFIG_MACH_ADVANTECH_ROM_742X=y
 CONFIG_MACH_WARP7=y
 CONFIG_MACH_VF610_TWR=y
+CONFIG_MACH_ZII_RDU1=y
 CONFIG_MACH_ZII_RDU2=y
 CONFIG_MACH_ZII_VF610_DEV=y
 CONFIG_MACH_PHYTEC_PHYCORE_IMX7=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 10fcfbf1f..7ec10bf20 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -103,6 +103,7 @@ pbl-dtb-$(CONFIG_MACH_VEXPRESS) += vexpress-v2p-ca15.dtb.o
 pbl-dtb-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o
 pbl-dtb-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o
 pbl-dtb-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o
+pbl-dtb-$(CONFIG_MACH_ZII_RDU1) += imx51-zii-rdu1.dtb.o
 pbl-dtb-$(CONFIG_MACH_ZII_RDU2) += imx6q-zii-rdu2.dtb.o imx6qp-zii-rdu2.dtb.o
 pbl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \
 	vf610-zii-dev-rev-b.dtb.o 	\
diff --git a/arch/arm/dts/imx51-zii-rdu1.dts b/arch/arm/dts/imx51-zii-rdu1.dts
new file mode 100644
index 000000000..7984e5b32
--- /dev/null
+++ b/arch/arm/dts/imx51-zii-rdu1.dts
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2018 CogentEmbedded, Inc.
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <arm/imx51-zii-rdu1.dts>
+
+/ {
+	compatible = "zii,imx51-rdu1", "fsl,imx51-babbage-power", "fsl,imx51";
+
+	chosen {
+		stdout-path = &uart1;
+
+		environment-spi {
+			compatible = "barebox,environment";
+			device-path = &spinor, "partname:barebox-environment";
+		};
+	};
+};
+
+&ecspi1 {
+	spinor: flash@1 {
+		partition@0 {
+			/*
+			 * Do not change the size of this
+			 * partition. RDU1's BBU code relies on
+			 * "barebox" partition starting at 1024 byte
+			 * mark to function properly
+			 */
+			label = "config";
+			reg = <0x0 0x400>;
+		};
+
+		partition@400 {
+			label = "barebox";
+			reg = <0x400 0xdfc00>;
+		};
+
+		partition@e0000 {
+			label = "barebox-environment";
+			reg = <0xe0000 0x20000>;
+		};
+	};
+};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index f0b10eeef..73b7ea1b6 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -423,6 +423,11 @@ config MACH_VF610_TWR
 	bool "Freescale VF610 Tower Board"
 	select ARCH_VF610
 
+config MACH_ZII_RDU1
+	bool "ZII i.MX51 RDU1"
+	select ARCH_IMX51
+	select MACH_FREESCALE_MX51_PDK_POWER
+
 config MACH_ZII_RDU2
 	bool "ZII i.MX6Q(+) RDU2"
 	select ARCH_IMX6
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 0550686a1..aefc52af4 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -76,6 +76,11 @@ CFG_start_imx51_babbage_xload.pblx.imximg = $(board)/freescale-mx51-babbage/flas
 FILE_barebox-freescale-imx51-babbage-xload.img = start_imx51_babbage_xload.pblx.imximg
 imx-xload-$(CONFIG_MACH_FREESCALE_MX51_PDK) += barebox-freescale-imx51-babbage-xload.img
 
+pblx-$(CONFIG_MACH_ZII_RDU1) += start_imx51_zii_rdu1
+CFG_start_imx51_zii_rdu1.pblx.imximg = $(board)/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
+FILE_barebox-zii-imx51-rdu1.img = start_imx51_zii_rdu1.pblx.imximg
+imx-barebox-$(CONFIG_MACH_ZII_RDU1) += barebox-zii-imx51-rdu1.img
+
 ifdef CONFIG_ARCH_IMX_XLOAD
 image-y += $(imx-xload-y)
 else
-- 
2.17.1


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Re: [PATCH v4 10/10] ARM: i.MX: Add support for ZII RDU1 board

[Sascha Hauer]

Hi Andrey,

On Wed, Jun 27, 2018 at 09:54:36PM -0700, Andrey Smirnov wrote:
> +#include <common.h>
> +#include <init.h>
> +#include <mach/bbu.h>
> +#include <libfile.h>
> +#include <mach/imx5.h>
> +
> +#define ZII_RDU1_DATAFLASH		"/dev/dataflash0"
> +#define ZII_RDU1_DATAFLASH_BAREBOX	ZII_RDU1_DATAFLASH ".barebox"
> +
> +/**
> + * zii_rdu1_bbu_spi_update - RDU1 specific BBU handler
> + *
> + * @handler:	BBU handler pointer passed down by BBU framework
> + * @data:	BBU data pointer passed down by BBU framework
> + *
> + * RDU1 design chose to use first page of the onboard dataflash to
> + * store vendor board-specific paramters, which means it needs to be
> + * left intact. However this is problematic because regular ARM
> + * barebox images contain a 1K preamble and are expected to be placed
> + * starting at offset zero.

Actually I think that this case is not that unusual. We already keep a
partition table in that area in case of MMC devices. This code will need
adjustments anyway when with i.MX8 we finally have enough space in the
beginning of the device to support GPTs. How about the patch I just sent
out which simply generalizes and exports the existing KEEP_DOSPART flag?

Sorry for not looking earlier at this issue.

I have merged the patch together with the RDU1 support into next. Please
let me know if ou are happy with that and if it works of course.

Sascha

-- 
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Re: [PATCH v4 10/10] ARM: i.MX: Add support for ZII RDU1 board

[Andrey Smirnov]

On Thu, Jun 28, 2018 at 11:57 PM Sascha Hauer <s.hauer@pengutronix.de> wrote:
>
> Hi Andrey,
>
> On Wed, Jun 27, 2018 at 09:54:36PM -0700, Andrey Smirnov wrote:
> > +#include <common.h>
> > +#include <init.h>
> > +#include <mach/bbu.h>
> > +#include <libfile.h>
> > +#include <mach/imx5.h>
> > +
> > +#define ZII_RDU1_DATAFLASH           "/dev/dataflash0"
> > +#define ZII_RDU1_DATAFLASH_BAREBOX   ZII_RDU1_DATAFLASH ".barebox"
> > +
> > +/**
> > + * zii_rdu1_bbu_spi_update - RDU1 specific BBU handler
> > + *
> > + * @handler: BBU handler pointer passed down by BBU framework
> > + * @data:    BBU data pointer passed down by BBU framework
> > + *
> > + * RDU1 design chose to use first page of the onboard dataflash to
> > + * store vendor board-specific paramters, which means it needs to be
> > + * left intact. However this is problematic because regular ARM
> > + * barebox images contain a 1K preamble and are expected to be placed
> > + * starting at offset zero.
>
> Actually I think that this case is not that unusual. We already keep a
> partition table in that area in case of MMC devices. This code will need
> adjustments anyway when with i.MX8 we finally have enough space in the
> beginning of the device to support GPTs. How about the patch I just sent
> out which simply generalizes and exports the existing KEEP_DOSPART flag?
>
> Sorry for not looking earlier at this issue.
>
> I have merged the patch together with the RDU1 support into next. Please
> let me know if ou are happy with that and if it works of course.
>

I'll give it a try and report back shortly.

Thanks,
Andrey Smirnov

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