[PATCH] ARM: imx6qp: fix NoC QoS passthrough for new cpu type functions.

[PATCH] ARM: imx6qp: fix NoC QoS passthrough for new cpu type functions.

[Philipp Zabel]

On i.MX6QP/DP cpu_mx6_is_mx6q/d do not return true anymore.
Use the new cpu_mx6_is_mx6qp/dp to reenable NoC regulator bypass.

Fixes: d4c05d29d484 ("ARM: i.MX6: Add cpu type for 'plus' variants")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
---
 arch/arm/mach-imx/imx6.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index eaf9f2e4130e..3d95c9e3749c 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -140,8 +140,7 @@ static void imx6_setup_ipu_qos(void)
 	 * On i.MX6 QP/DP the NoC regulator for the IPU ports needs to be in
 	 * bypass mode for the above settings to take effect.
 	 */
-	if ((cpu_mx6_is_mx6q() || cpu_mx6_is_mx6d()) &&
-	    imx_silicon_revision() >= IMX_CHIP_REV_2_0) {
+	if (cpu_mx6_is_mx6qp() || cpu_mx6_is_mx6dp()) {
 		writel(0x2, fast2 + 0xb048c);
 		writel(0x2, fast2 + 0xb050c);
 	}
-- 
2.17.1


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Re: [PATCH] ARM: imx6qp: fix NoC QoS passthrough for new cpu type functions.

[Sascha Hauer]

On Thu, Jun 28, 2018 at 06:29:05PM +0200, Philipp Zabel wrote:
> On i.MX6QP/DP cpu_mx6_is_mx6q/d do not return true anymore.
> Use the new cpu_mx6_is_mx6qp/dp to reenable NoC regulator bypass.
> 
> Fixes: d4c05d29d484 ("ARM: i.MX6: Add cpu type for 'plus' variants")
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> ---
>  arch/arm/mach-imx/imx6.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 

Applied, thanks


Sascha

> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> index eaf9f2e4130e..3d95c9e3749c 100644
> --- a/arch/arm/mach-imx/imx6.c
> +++ b/arch/arm/mach-imx/imx6.c
> @@ -140,8 +140,7 @@ static void imx6_setup_ipu_qos(void)
>  	 * On i.MX6 QP/DP the NoC regulator for the IPU ports needs to be in
>  	 * bypass mode for the above settings to take effect.
>  	 */
> -	if ((cpu_mx6_is_mx6q() || cpu_mx6_is_mx6d()) &&
> -	    imx_silicon_revision() >= IMX_CHIP_REV_2_0) {
> +	if (cpu_mx6_is_mx6qp() || cpu_mx6_is_mx6dp()) {
>  		writel(0x2, fast2 + 0xb048c);
>  		writel(0x2, fast2 + 0xb050c);
>  	}
> -- 
> 2.17.1
> 
> 
> _______________________________________________
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
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