From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mail-pl1-x643.google.com ([2607:f8b0:4864:20::643]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gXLAF-0005YA-IM for barebox@lists.infradead.org; Thu, 13 Dec 2018 07:12:10 +0000 Received: by mail-pl1-x643.google.com with SMTP id k8so602403pls.11 for ; Wed, 12 Dec 2018 23:11:57 -0800 (PST) From: Andrey Smirnov Date: Wed, 12 Dec 2018 23:10:50 -0800 Message-Id: <20181213071144.31691-5-andrew.smirnov@gmail.com> In-Reply-To: <20181213071144.31691-1-andrew.smirnov@gmail.com> References: <20181213071144.31691-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH 04/58] PCI: designware: Fix PORT_LOGIC_LINK_WIDTH_MASK To: barebox@lists.infradead.org Cc: Andrey Smirnov Port of a Linux commit ed8b472df44af6dc4cb18e828dc9bb2d57f14b9e The value under PORT_LOGIC_LINK_WIDTH_MASK is 0x1, 0x2, 0x4, 0x8. In IP v4.2, bits [16:8] are defined for NUM_OF_LANES. But in IP v4.4, bits[12:8] are defined for NUM_OF_LANES, bits [16:13] are for other usages (bit 16 is AUTO_LANE_FLIP_CTRL_EN, bits [15:13] are PRE_DET_LANE). As there is no conflict about NUM_OF_LANES between v4.2 and v4.4, change the mask value to avoid future problems. Signed-off-by: Zhou Wang Signed-off-by: Bjorn Helgaas Acked-by: Jingoo Han Signed-off-by: Andrey Smirnov --- drivers/pci/pcie-designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pcie-designware.c b/drivers/pci/pcie-designware.c index 1ef544c7b..547d402a7 100644 --- a/drivers/pci/pcie-designware.c +++ b/drivers/pci/pcie-designware.c @@ -39,7 +39,7 @@ #define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C #define PORT_LOGIC_SPEED_CHANGE (0x1 << 17) -#define PORT_LOGIC_LINK_WIDTH_MASK (0x1ff << 8) +#define PORT_LOGIC_LINK_WIDTH_MASK (0x1f << 8) #define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8) #define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8) #define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8) -- 2.19.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox