From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h0lqL-0003EL-TX for barebox@lists.infradead.org; Mon, 04 Mar 2019 11:33:15 +0000 From: Sascha Hauer Date: Mon, 4 Mar 2019 12:33:11 +0100 Message-Id: <20190304113311.1434-1-s.hauer@pengutronix.de> MIME-Version: 1.0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "barebox" Errors-To: barebox-bounces+u.kleine-koenig=pengutronix.de@lists.infradead.org Subject: [PATCH] ARM: Fix cpu_info for armv8 To: Barebox List We have get_cr() to get the control register for the different exception levels. Use it rather than the variant hardcoded for EL1. Signed-off-by: Sascha Hauer --- arch/arm/cpu/cpuinfo.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/cpuinfo.c b/arch/arm/cpu/cpuinfo.c index 175475b038..1ba3b4379c 100644 --- a/arch/arm/cpu/cpuinfo.c +++ b/arch/arm/cpu/cpuinfo.c @@ -19,6 +19,7 @@ #include #include #include +#include #define CPU_ARCH_UNKNOWN 0 #define CPU_ARCH_ARMv3 1 @@ -76,11 +77,7 @@ static int do_cpuinfo(int argc, char *argv[]) : : "memory"); - __asm__ __volatile__( - "mrs %0, sctlr_el1\n" - : "=r" (cr) - : - : "memory"); + cr = get_cr(); #else __asm__ __volatile__( "mrc p15, 0, %0, c0, c0, 0 @ read control reg\n" -- 2.20.1 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox