From: Ahmad Fatoum <a.fatoum@pengutronix.de>
To: barebox@lists.infradead.org
Cc: pza@pengutronix.de, lst@pengutronix.de, sha@pengutronix.de
Subject: [PATCH 4/6] clk: imx6: define an enum for ldb mux inputs
Date: Mon, 1 Apr 2019 22:12:08 +0200 [thread overview]
Message-ID: <20190401201210.17975-5-a.fatoum@pengutronix.de> (raw)
In-Reply-To: <20190401201210.17975-1-a.fatoum@pengutronix.de>
For better readability should this code be reviewed
in future, replace the hardcoded input numbers
with an enum.
This is just a cosmetic change and was verified
to not affect clk-imx6.o.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
drivers/clk/imx/clk-imx6.c | 41 +++++++++++++++++++++++---------------
1 file changed, 25 insertions(+), 16 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c
index d12b494d578c..f527d1d5e565 100644
--- a/drivers/clk/imx/clk-imx6.c
+++ b/drivers/clk/imx/clk-imx6.c
@@ -213,12 +213,20 @@ static const char *ipu_sels[] = {
"pll3_pfd1_540m",
};
+enum ldb_di_sel { /* for use in init_ldb_clks */
+ LDB_DI_SEL_PLL5_VIDEO_DIV = 0,
+ LDB_DI_SEL_PLL2_PFD0_352M = 1,
+ LDB_DI_SEL_PLL2_PFD2_396M = 2,
+ LDB_DI_SEL_MMDC_CH1_AXI = 3,
+ LDB_DI_SEL_PLL3_USB_OTG = 4,
+};
+
static const char *ldb_di_sels[] = {
- "pll5_video_div",
- "pll2_pfd0_352m",
- "pll2_pfd2_396m",
- "mmdc_ch1_axi_podf",
- "pll3_usb_otg",
+ [LDB_DI_SEL_PLL5_VIDEO_DIV] = "pll5_video_div",
+ [LDB_DI_SEL_PLL2_PFD0_352M] = "pll2_pfd0_352m",
+ [LDB_DI_SEL_PLL2_PFD2_396M] = "pll2_pfd2_396m",
+ [LDB_DI_SEL_MMDC_CH1_AXI] = "mmdc_ch1_axi_podf",
+ [LDB_DI_SEL_PLL3_USB_OTG] = "pll3_usb_otg",
};
static const char *ipu_di_pre_sels[] = {
@@ -311,23 +319,23 @@ static int ldb_di_sel_by_clock_id(int clock_id)
case IMX6QDL_CLK_PLL5_VIDEO_DIV:
if (!cpu_has_working_video_pll_post_div())
return -ENOENT;
- return 0;
+ return LDB_DI_SEL_PLL5_VIDEO_DIV;
case IMX6QDL_CLK_PLL2_PFD0_352M:
- return 1;
+ return LDB_DI_SEL_PLL2_PFD0_352M;
case IMX6QDL_CLK_PLL2_PFD2_396M:
- return 2;
+ return LDB_DI_SEL_PLL2_PFD2_396M;
case IMX6QDL_CLK_MMDC_CH1_AXI:
- return 3;
+ return LDB_DI_SEL_MMDC_CH1_AXI;
case IMX6QDL_CLK_PLL3_USB_OTG:
- return 4;
+ return LDB_DI_SEL_PLL3_USB_OTG;
default:
return -ENOENT;
}
}
static void of_assigned_ldb_sels(struct device_node *node,
- unsigned int *ldb_di0_sel,
- unsigned int *ldb_di1_sel)
+ enum ldb_di_sel *ldb_di0_sel,
+ enum ldb_di_sel *ldb_di1_sel)
{
struct of_phandle_args clkspec;
int index, rc, num_parents;
@@ -466,7 +474,7 @@ static void mmdc_ch1_reenable(void __iomem *ccm_base)
static void init_ldb_clks(struct device_node *np, void __iomem *ccm_base)
{
unsigned int reg;
- unsigned int sel[2][4];
+ enum ldb_di_sel sel[2][4];
int i;
reg = readl(ccm_base + CCM_CS2CDR);
@@ -481,14 +489,14 @@ static void init_ldb_clks(struct device_node *np, void __iomem *ccm_base)
* these configurations had their ldb_diN_sel clocks reparented.
*/
if (!(cpu_is_mx6s() && imx_silicon_revision() == IMX_CHIP_REV_1_0)) {
- sel[0][3] = sel[1][3] = 0;
+ sel[0][3] = sel[1][3] = LDB_DI_SEL_PLL5_VIDEO_DIV;
}
of_assigned_ldb_sels(np, &sel[0][3], &sel[1][3]);
for (i = 0; i < 2; i++) {
/* Warn if a glitch might have been introduced already */
- if (sel[i][0] != 3) {
+ if (sel[i][0] != LDB_DI_SEL_MMDC_CH1_AXI) {
pr_warn("ccm: ldb_di%d_sel already changed from reset value: %d\n",
i, sel[i][0]);
}
@@ -497,7 +505,8 @@ static void init_ldb_clks(struct device_node *np, void __iomem *ccm_base)
continue;
/* Only switch to or from pll2_pfd2_396m if it is disabled */
- if ((sel[i][0] == 2 || sel[i][3] == 2) &&
+ if ((sel[i][0] == LDB_DI_SEL_PLL2_PFD2_396M ||
+ sel[i][3] == LDB_DI_SEL_PLL2_PFD2_396M) &&
(clk_get_parent(clks[IMX6QDL_CLK_PERIPH_PRE]) ==
clks[IMX6QDL_CLK_PLL2_PFD2_396M])) {
pr_err("ccm: ldb_di%d_sel: couldn't disable pll2_pfd2_396m\n",
--
2.20.1
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next prev parent reply other threads:[~2019-04-01 20:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-01 20:12 [PATCH 0/6] clk: imx6: work around LDB hang caused by ERR009219 Ahmad Fatoum
2019-04-01 20:12 ` [PATCH 1/6] clk: imx6: provide helper to check if video PLL post dividers work Ahmad Fatoum
2019-04-01 20:12 ` [PATCH 2/6] clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf Ahmad Fatoum
2019-04-01 20:12 ` [PATCH 3/6] clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK Ahmad Fatoum
2019-04-01 20:12 ` Ahmad Fatoum [this message]
2019-04-01 20:12 ` [PATCH 5/6] clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only Ahmad Fatoum
2019-04-01 20:15 ` [PATCH] clk: imx6: remove quirky clk_set_parent(LDB_diN_sel, pll5_video_div) Ahmad Fatoum
2019-04-01 20:16 ` Ahmad Fatoum
2019-04-03 9:52 ` [PATCH 0/6] clk: imx6: work around LDB hang caused by ERR009219 Ahmad Fatoum
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