[PATCH] ARM: imx: disable IPU QoS setup for i.MX6 UL/ULL

[PATCH] ARM: imx: disable IPU QoS setup for i.MX6 UL/ULL

[Rouven Czerwinski]

Neither of the two devices has an IPU, disable the setup for both SoCs.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
---
 arch/arm/mach-imx/imx6.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
index 01b4274ed3..6c08f22b7a 100644
--- a/arch/arm/mach-imx/imx6.c
+++ b/arch/arm/mach-imx/imx6.c
@@ -117,7 +117,8 @@ static void imx6_setup_ipu_qos(void)
 	uint32_t val;
 
 	if (!cpu_mx6_is_mx6q() && !cpu_mx6_is_mx6d() &&
-	    !cpu_mx6_is_mx6dl() && cpu_mx6_is_mx6s())
+	    !cpu_mx6_is_mx6dl() && (cpu_mx6_is_mx6s() || cpu_mx6_is_mx6ul() ||
+				    cpu_is_mx6ull()))
 		return;
 
 	val = readl(iomux + IOMUXC_GPR4);
-- 
2.21.0


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Re: [PATCH] ARM: imx: disable IPU QoS setup for i.MX6 UL/ULL

[Ahmad Fatoum]

Hello Rouven,

On 13/4/19 10:49, Rouven Czerwinski wrote:
> Neither of the two devices has an IPU, disable the setup for both SoCs.
> 
> Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
> ---
>  arch/arm/mach-imx/imx6.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c
> index 01b4274ed3..6c08f22b7a 100644
> --- a/arch/arm/mach-imx/imx6.c
> +++ b/arch/arm/mach-imx/imx6.c
> @@ -117,7 +117,8 @@ static void imx6_setup_ipu_qos(void)
>  	uint32_t val;
>  
>  	if (!cpu_mx6_is_mx6q() && !cpu_mx6_is_mx6d() &&
> -	    !cpu_mx6_is_mx6dl() && cpu_mx6_is_mx6s())
> +	    !cpu_mx6_is_mx6dl() && (cpu_mx6_is_mx6s() || cpu_mx6_is_mx6ul() ||
> +				    cpu_is_mx6ull()))

That looks wrong to me. The patch that introduced it was 4e6e8f73e9
("ARM: imx6: don't execute IPU QoS setup on MX6 SX/SL"), but instead
it bails at the Solo, not the SX and SL.

It seems to me, the original intent was
  	if (!cpu_mx6_is_mx6q() && !cpu_mx6_is_mx6d() &&
 	    !cpu_mx6_is_mx6dl() && !cpu_mx6_is_mx6s())

which would be correct and solve your issue with the UL(L) as well.
Applying such a change however would break backwards-compatibility,
but it was agreed[1] that fixing these quriky conditionals at the
cost of backwards-compatibility is acceptable.


Generally, you should always explicitly list the _affected_ SoC variants in
such conditionals, not the one which _aren't currently_ affected.
Otherwise you risk inconsistencies when code is updated to support newer
SoC variants.

[1]: Message-Id:<bbe97cb3-2e21-2eb2-a727-5b1014d3fd73@pengutronix.de>


Cheers
Ahmad
 


>  		return;
>  
>  	val = readl(iomux + IOMUXC_GPR4);
> 

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