From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 04/14] ARM: Layerscape: pblimage: Drop pbl end command
Date: Fri, 10 May 2019 08:21:25 +0200 [thread overview]
Message-ID: <20190510062135.11534-5-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20190510062135.11534-1-s.hauer@pengutronix.de>
The PBL image tool includes two commands into the image. These are executed
after the initial image has been uploaded but before the final CRC
check. These commands are "flush" and "wait". According to the reference
manual a "flush" command can be used to read back the the value just
written to CCSR register space in order to let the previous write
complete. This seems unnecessary as the last write was never to the CCSR
register space. The "wait" command also seems unnecessary as the time
parameter is 0. As all this end_cmd stuff goes back to the PowerPC times
and everything still seems to work on Arm let's just remove it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
scripts/pblimage.c | 19 -------------------
1 file changed, 19 deletions(-)
diff --git a/scripts/pblimage.c b/scripts/pblimage.c
index 6e83c523e5..56256260c8 100644
--- a/scripts/pblimage.c
+++ b/scripts/pblimage.c
@@ -53,7 +53,6 @@ static int in_fd;
static uint32_t pbl_cmd_initaddr;
static uint32_t pbi_crc_cmd1;
static uint32_t pbi_crc_cmd2;
-static uint32_t pbl_end_cmd[4];
enum arch {
ARCH_ARM,
@@ -210,16 +209,6 @@ static void pbl_parser(char *name)
static void add_end_cmd(void)
{
uint32_t crc32_pbl;
- int i;
- unsigned char *p = (unsigned char *)&pbl_end_cmd;
-
- for (i = 0; i < 4; i++)
- pbl_end_cmd[i] = htobe32(pbl_end_cmd[i]);
-
- for (i = 0; i < 16; i++) {
- *pmem_buf++ = *p++;
- pbl_size++;
- }
/* Add PBI CRC command. */
*pmem_buf++ = 0x08;
@@ -297,18 +286,10 @@ static int pblimage_check_params(void)
pbl_cmd_initaddr = loadaddr & PBL_ADDR_24BIT_MASK;
pbl_cmd_initaddr |= PBL_ACS_CONT_CMD;
pbl_cmd_initaddr += image_size;
- pbl_end_cmd[0] = 0x09610000;
- pbl_end_cmd[1] = 0x00000000;
- pbl_end_cmd[2] = 0x096100c0;
- pbl_end_cmd[3] = 0x00000000;
} else {
pbi_crc_cmd1 = 0x13;
pbi_crc_cmd2 = 0x80;
pbl_cmd_initaddr = 0x82000000;
- pbl_end_cmd[0] = 0x091380c0;
- pbl_end_cmd[1] = 0x00000000;
- pbl_end_cmd[2] = 0x091380c0;
- pbl_end_cmd[3] = 0x00000000;
}
next_pbl_cmd = pbl_cmd_initaddr;
--
2.20.1
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next prev parent reply other threads:[~2019-05-10 6:21 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-10 6:21 [PATCH 00/14] More Layerscape patches Sascha Hauer
2019-05-10 6:21 ` [PATCH 01/14] bbu: In bbu_register_std_file_update detect device before accessing it Sascha Hauer
2019-05-10 6:21 ` [PATCH 02/14] esdhc-xload: invalidate icache before jumping to image Sascha Hauer
2019-05-10 6:21 ` [PATCH 03/14] ARM: Layerscape: ls1046a: Add bootsource detection support Sascha Hauer
2019-05-10 6:21 ` Sascha Hauer [this message]
2019-05-10 6:21 ` [PATCH 05/14] ARM: Layerscape: Add QSPI boot support Sascha Hauer
2019-05-10 6:21 ` [PATCH 06/14] ARM: Layerscape: ls1046a: Add automatic bootsource detection xload function Sascha Hauer
2019-05-10 6:21 ` [PATCH 07/14] ARM: Layerscape: ls1046a: Add bbu handlers Sascha Hauer
2019-05-10 6:21 ` [PATCH 08/14] ARM: Layerscape: TQMLS1046a: configure qspi divider Sascha Hauer
2019-05-10 6:21 ` [PATCH 09/14] ARM: Layerscape: TQMLS1046a: Sync qspi RCW from TQ U-Boot Sascha Hauer
2019-05-10 6:21 ` [PATCH 10/14] ARM: Layerscape: TQMLS1046a: print life signs when debugging Sascha Hauer
2019-05-10 6:21 ` [PATCH 11/14] ARM: Layerscape: TQMLS1046a: unify pbi files Sascha Hauer
2019-05-10 6:21 ` [PATCH 12/14] ARM: Layerscape: TQMLS1046a: Support booting from QSPI Sascha Hauer
2019-05-10 6:21 ` [PATCH 13/14] ARM: Layerscape: TQMLS1046a: Add environment and update handlers Sascha Hauer
2019-05-10 6:21 ` [PATCH 14/14] ARM: Layerscape: Add device tree compatible to image metadata Sascha Hauer
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