macro about loongson's CPU & SoC

macro about loongson's CPU & SoC

[Du Huanpeng]

Hello, I find there are some macros about loongson's CPU and SoC,

$ vim barebox/arch/mips/Kconfig

174 config CPU_LOONGSON1B
175         bool "Loongson 1B"
176         depends on SYS_HAS_CPU_LOONGSON1B
177         select CPU_LOONGSON1
178         help
179           The Loongson 1B is a 32-bit SoC, which implements the MIPS32
180           release 2 instruction set.

Here I want to list some Chips from this page:
  http://www.loongson.cn/product/

NAME              CPU       Core(s)

The loongson 3, for series/server & desktop
3A3000/3B3000     GS464E    64bit x4
3A2000/3B2000     GS464E    64bit x4
3B1500            GS464     64bit x8
3A1000            GS464     64bit x4

The loongson 2, for series/low power
2K1000            GS264     64bit x2
2F                GS464     64bit x1
2H                GS464     64bit x1

The loongson 1, for series/embeded
1C101             GS132R    32bit ?
1D                GS132     32bit ?
1C                GS232     32bit x1
1B                GS232     32bit x1  <-- loongson 1b
1A                GS232     32bit x1

the CPU name of LOONGSON1B is socalled GS232, shall we

    change CPU_LOONGSON1 to CPU_GS232?

here is a introduce for GS232 in Chinese:
- - - -
龙芯 232 核是一款实现 MIPS32 兼容且支持 EJTAG 调试的双发射处理器，通过采用转移
预测、寄存器重命名、乱序发射、路预测的指令 CACHE、非阻塞的数据 CACHE、写合并收集
等技术来提高流水线的效率。
- - - -
base on this description, is it compact with MIPS32.

for loongson's other cores, shall we define some macro:


	CONFIG_CPU_GS232
	CONFIG_CPU_GS264
	CONFIG_CPU_GS464

Regards,
duhuanpeng
















_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: macro about loongson's CPU & SoC

[Antony Pavlov]

On Tue, 26 Nov 2019 19:57:50 +0800
Du Huanpeng <duhuanpeng@loongson.cn> wrote:

> Hello, I find there are some macros about loongson's CPU and SoC,
> 
> $ vim barebox/arch/mips/Kconfig
> 
> 174 config CPU_LOONGSON1B
> 175         bool "Loongson 1B"
> 176         depends on SYS_HAS_CPU_LOONGSON1B
> 177         select CPU_LOONGSON1
> 178         help
> 179           The Loongson 1B is a 32-bit SoC, which implements the MIPS32
> 180           release 2 instruction set.
> 
> Here I want to list some Chips from this page:
>   http://www.loongson.cn/product/
> 
> NAME              CPU       Core(s)
> 
> The loongson 3, for series/server & desktop
> 3A3000/3B3000     GS464E    64bit x4
> 3A2000/3B2000     GS464E    64bit x4
> 3B1500            GS464     64bit x8
> 3A1000            GS464     64bit x4
> 
> The loongson 2, for series/low power
> 2K1000            GS264     64bit x2
> 2F                GS464     64bit x1
> 2H                GS464     64bit x1
> 
> The loongson 1, for series/embeded
> 1C101             GS132R    32bit ?
> 1D                GS132     32bit ?
> 1C                GS232     32bit x1
> 1B                GS232     32bit x1  <-- loongson 1b
> 1A                GS232     32bit x1
> 
> the CPU name of LOONGSON1B is socalled GS232, shall we
> 
>     change CPU_LOONGSON1 to CPU_GS232?
> 
> here is a introduce for GS232 in Chinese:
> - - - -
> 龙芯 232 核是一款实现 MIPS32 兼容且支持 EJTAG 调试的双发射处理器，通过采用转移
> 预测、寄存器重命名、乱序发射、路预测的指令 CACHE、非阻塞的数据 CACHE、写合并收集
> 等技术来提高流水线的效率。
> - - - -
> base on this description, is it compact with MIPS32.
> 
> for loongson's other cores, shall we define some macro:
> 
> 
> 	CONFIG_CPU_GS232
> 	CONFIG_CPU_GS264
> 	CONFIG_CPU_GS464

The name CPU_LOONGSON1B is used in the linux kernel.
Please keep barebox macro name in sync with linux kernel.

-- 
Best regards,
  Antony Pavlov

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: macro about loongson's CPU & SoC

[Du Huanpeng]

> The name CPU_LOONGSON1B is used in the linux kernel.
> Please keep barebox macro name in sync with linux kernel.
shall we use the rules in a "balanced" way? :)

the name CPU_LOONGSON1B is used in the kernel, it is true.
if you dive into the source tree, you will find more~

in bootloader, do we need so many kinds of CPU, are they
realy different? two or three ISA set(CPU) is enough for
loongson's chip(see the table in my last mail) to run barebox.

Regards,
duhuanpeng


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: macro about loongson's CPU & SoC

[Sascha Hauer]

On Tue, Nov 26, 2019 at 09:03:58PM +0800, Du Huanpeng wrote:
> > The name CPU_LOONGSON1B is used in the linux kernel.
> > Please keep barebox macro name in sync with linux kernel.
> shall we use the rules in a "balanced" way? :)
> 
> the name CPU_LOONGSON1B is used in the kernel, it is true.
> if you dive into the source tree, you will find more~
> 
> in bootloader, do we need so many kinds of CPU, are they
> realy different? two or three ISA set(CPU) is enough for
> loongson's chip(see the table in my last mail) to run barebox.

It's probably least confusing to stick with the kernel here.
If you want to map these symbols to two or three ISA sets you actually
need then this is fine.

Sascha

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox

Re: macro about loongson's CPU & SoC

[Du Huanpeng]

Hi, the loongson macros in the linux kernel are being clean up.
https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commit/?id=caed1d1b20cbf7ecf7e8be629fd593c96c8ff2d2


_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox