From: Sascha Hauer <s.hauer@pengutronix.de>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 0/3] ARM64 early cache fixes
Date: Fri, 20 Dec 2019 16:14:40 +0100 [thread overview]
Message-ID: <20191220151440.d5tpdnyoqfwl3iwy@pengutronix.de> (raw)
In-Reply-To: <20191219091310.27421-1-l.stach@pengutronix.de>
On Thu, Dec 19, 2019 at 10:13:07AM +0100, Lucas Stach wrote:
> This is a resend of the 2 ARM64 early cache fixes by Ahmad. They were
> not applied at the time, as there was a report of them breaking Barebox
> on i.MX8M. I finally had time to look into that, the first patch by
> me cleans the stage, so the cache fixes no longer break anything.
>
> At least the icache invalidation patch fixes an issue I hit on one
> system, were minimal (harmless) changes to the Barebox code would
> break execution.
>
> Regards,
> Lucas
>
> Ahmad Fatoum (2):
> ARM: cache_64: invalidate dcache in arm_early_mmu_cache_invalidate
> ARM: cache_64: invalidate icache in arm_early_mmu_cache_flush
>
> Lucas Stach (1):
> ARM64: entry: save/restore potentially clobbered registers
>
> arch/arm/cpu/cache_64.c | 2 ++
> arch/arm/cpu/entry_ll_64.S | 12 +++++++-----
> 2 files changed, 9 insertions(+), 5 deletions(-)
Applied, thanks
Sascha
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prev parent reply other threads:[~2019-12-20 15:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-19 9:13 Lucas Stach
2019-12-19 9:13 ` [PATCH 1/3] ARM64: entry: save/restore potentially clobbered registers Lucas Stach
2019-12-20 15:34 ` Ahmad Fatoum
2019-12-20 15:42 ` Lucas Stach
2019-12-20 16:14 ` Ahmad Fatoum
2019-12-19 9:13 ` [PATCH 2/3] ARM: cache_64: invalidate dcache in arm_early_mmu_cache_invalidate Lucas Stach
2019-12-19 9:13 ` [PATCH 3/3] ARM: cache_64: invalidate icache in arm_early_mmu_cache_flush Lucas Stach
2019-12-20 15:14 ` Sascha Hauer [this message]
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