From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH 26/42] ARM: i.MX: Add SoC namespace to imx7/8m CCM defines
Date: Mon, 17 Feb 2020 13:46:07 +0100 [thread overview]
Message-ID: <20200217124623.14520-27-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20200217124623.14520-1-s.hauer@pengutronix.de>
The CCM defines used on i.MX7 and i.MX8M do not have any SoC namespace.
Add it to make clear where they are supposed to be used. Since it looks
confusing to call i.MX7 specific defines on i.MX8M and vice versa,
duplicate them for both SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../boards/freescale-mx7-sabresd/lowlevel.c | 12 +++----
arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 12 +++----
arch/arm/boards/phytec-som-imx8mq/lowlevel.c | 12 +++----
arch/arm/boards/zii-imx7d-dev/lowlevel.c | 12 +++----
arch/arm/boards/zii-imx8mq-dev/lowlevel.c | 12 +++----
.../arm/mach-imx/include/mach/imx7-ccm-regs.h | 33 ++++++++++++++-----
.../arm/mach-imx/include/mach/imx8-ccm-regs.h | 25 +++++++++++---
7 files changed, 74 insertions(+), 44 deletions(-)
diff --git a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
index edd965e4ec..995bf6cca9 100644
--- a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
+++ b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
@@ -17,12 +17,12 @@ static inline void setup_uart(void)
{
void __iomem *ccm = IOMEM(MX7_CCM_BASE_ADDR);
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
- writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__OSC_24M,
- ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+ writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART1));
+ writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART1_CLK_ROOT__OSC_24M,
+ ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART1_CLK_ROOT));
+ writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART1));
imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX);
diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
index a501f03722..0f4b27a9af 100644
--- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
+++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
@@ -27,12 +27,12 @@ static void setup_uart(void)
{
void __iomem *ccm = IOMEM(MX8MQ_CCM_BASE_ADDR);
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
- writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__25M_REF_CLK,
- ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+ writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX8M_CCM_CCGRn_CLR(IMX8M_CCM_CCGR_UART1));
+ writel(IMX8M_CCM_TARGET_ROOTn_ENABLE | IMX8M_UART1_CLK_ROOT__25M_REF_CLK,
+ ccm + IMX8M_CCM_TARGET_ROOTn(IMX8M_UART1_CLK_ROOT));
+ writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_UART1));
imx8mq_setup_pad(IMX8MQ_PAD_UART1_TXD__UART1_TX | UART_PAD_CTRL);
diff --git a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
index f14366a27b..0abe0a6bc2 100644
--- a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
@@ -30,12 +30,12 @@ static void setup_uart(void)
{
void __iomem *ccm = IOMEM(MX8MQ_CCM_BASE_ADDR);
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
- writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__25M_REF_CLK,
- ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+ writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX8M_CCM_CCGRn_CLR(IMX8M_CCM_CCGR_UART1));
+ writel(IMX8M_CCM_TARGET_ROOTn_ENABLE | IMX8M_UART1_CLK_ROOT__25M_REF_CLK,
+ ccm + IMX8M_CCM_TARGET_ROOTn(IMX8M_UART1_CLK_ROOT));
+ writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_UART1));
imx8mq_setup_pad(IMX8MQ_PAD_UART1_TXD__UART1_TX | UART_PAD_CTRL);
diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c
index 83d01446b9..83fb646fd6 100644
--- a/arch/arm/boards/zii-imx7d-dev/lowlevel.c
+++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c
@@ -25,12 +25,12 @@ static inline void setup_uart(void)
{
void __iomem *ccm = IOMEM(MX7_CCM_BASE_ADDR);
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_CLR(CCM_CCGR_UART2));
- writel(CCM_TARGET_ROOTn_ENABLE | UART2_CLK_ROOT__OSC_24M,
- ccm + CCM_TARGET_ROOTn(UART2_CLK_ROOT));
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_SET(CCM_CCGR_UART2));
+ writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART2));
+ writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART2_CLK_ROOT__OSC_24M,
+ ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART2_CLK_ROOT));
+ writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART2));
imx7_setup_pad(MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX);
diff --git a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
index 482d70cb01..0bb141fbf2 100644
--- a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
+++ b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
@@ -29,12 +29,12 @@ static void setup_uart(void)
{
void __iomem *ccm = IOMEM(MX8MQ_CCM_BASE_ADDR);
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
- writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__25M_REF_CLK,
- ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
- writel(CCM_CCGR_SETTINGn_NEEDED(0),
- ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+ writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX8M_CCM_CCGRn_CLR(IMX8M_CCM_CCGR_UART1));
+ writel(IMX8M_CCM_TARGET_ROOTn_ENABLE | IMX8M_UART1_CLK_ROOT__25M_REF_CLK,
+ ccm + IMX8M_CCM_TARGET_ROOTn(IMX8M_UART1_CLK_ROOT));
+ writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+ ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_UART1));
imx8mq_setup_pad(IMX8MQ_PAD_UART1_TXD__UART1_TX | UART_PAD_CTRL);
diff --git a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
index 43b9425df2..b78adf9f1c 100644
--- a/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx7-ccm-regs.h
@@ -1,21 +1,36 @@
#ifndef __MACH_IMX7_CCM_REGS_H__
#define __MACH_IMX7_CCM_REGS_H__
-#include "ccm.h"
+#define IMX7_CCM_CCGR_UART1 148
+#define IMX7_CCM_CCGR_UART2 149
-#define CCM_CCGR_UART1 148
-#define CCM_CCGR_UART2 149
-
-#define CLOCK_ROOT_INDEX(x) (((x) - 0x8000) / 128)
+#define IMX7_CLOCK_ROOT_INDEX(x) (((x) - 0x8000) / 128)
/*
* Taken from "Table 5-11. Clock Root Table" from i.MX7 Dual Processor
* Reference Manual
*/
-#define UART1_CLK_ROOT CLOCK_ROOT_INDEX(0xaf80)
-#define UART1_CLK_ROOT__OSC_24M CCM_TARGET_ROOTn_MUX(0b000)
+#define IMX7_UART1_CLK_ROOT IMX7_CLOCK_ROOT_INDEX(0xaf80)
+#define IMX7_UART1_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
+
+#define IMX7_UART2_CLK_ROOT IMX7_CLOCK_ROOT_INDEX(0xb000)
+#define IMX7_UART2_CLK_ROOT__OSC_24M IMX7_CCM_TARGET_ROOTn_MUX(0b000)
+
+/* 0 <= n <= 190 */
+#define IMX7_CCM_CCGRn_SET(n) (0x4004 + 16 * (n))
+#define IMX7_CCM_CCGRn_CLR(n) (0x4008 + 16 * (n))
+
+/* 0 <= n <= 120 */
+#define IMX7_CCM_TARGET_ROOTn(n) (0x8000 + 128 * (n))
+
+#define IMX7_CCM_TARGET_ROOTn_MUX(x) ((x) << 24)
+#define IMX7_CCM_TARGET_ROOTn_ENABLE BIT(28)
+
-#define UART2_CLK_ROOT CLOCK_ROOT_INDEX(0xb000)
-#define UART2_CLK_ROOT__OSC_24M CCM_TARGET_ROOTn_MUX(0b000)
+#define IMX7_CCM_CCGR_SETTINGn(n, s) ((s) << ((n) * 4))
+#define IMX7_CCM_CCGR_SETTINGn_NOT_NEEDED(n) IMX7_CCM_CCGR_SETTINGn(n, 0b00)
+#define IMX7_CCM_CCGR_SETTINGn_NEEDED_RUN(n) IMX7_CCM_CCGR_SETTINGn(n, 0b01)
+#define IMX7_CCM_CCGR_SETTINGn_NEEDED_RUN_WAIT(n) IMX7_CCM_CCGR_SETTINGn(n, 0b10)
+#define IMX7_CCM_CCGR_SETTINGn_NEEDED(n) IMX7_CCM_CCGR_SETTINGn(n, 0b11)
#endif
diff --git a/arch/arm/mach-imx/include/mach/imx8-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx8-ccm-regs.h
index 93b584ebe2..59d25d797f 100644
--- a/arch/arm/mach-imx/include/mach/imx8-ccm-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx8-ccm-regs.h
@@ -1,15 +1,30 @@
#ifndef __MACH_IMX8_CCM_REGS_H__
#define __MACH_IMX8_CCM_REGS_H__
-#include "ccm.h"
-
-#define CCM_CCGR_UART1 73
+#define IMX8M_CCM_CCGR_UART1 73
/*
* Taken from "Table 5-1. Clock Root Table" from i.MX8M Quad
* Applications Processor Reference Manual
*/
-#define UART1_CLK_ROOT 94
-#define UART1_CLK_ROOT__25M_REF_CLK CCM_TARGET_ROOTn_MUX(0b000)
+#define IMX8M_UART1_CLK_ROOT 94
+#define IMX8M_UART1_CLK_ROOT__25M_REF_CLK IMX8M_CCM_TARGET_ROOTn_MUX(0b000)
+
+/* 0 <= n <= 190 */
+#define IMX8M_CCM_CCGRn_SET(n) (0x4004 + 16 * (n))
+#define IMX8M_CCM_CCGRn_CLR(n) (0x4008 + 16 * (n))
+
+/* 0 <= n <= 120 */
+#define IMX8M_CCM_TARGET_ROOTn(n) (0x8000 + 128 * (n))
+
+#define IMX8M_CCM_TARGET_ROOTn_MUX(x) ((x) << 24)
+#define IMX8M_CCM_TARGET_ROOTn_ENABLE BIT(28)
+
+
+#define IMX8M_CCM_CCGR_SETTINGn(n, s) ((s) << ((n) * 4))
+#define IMX8M_CCM_CCGR_SETTINGn_NOT_NEEDED(n) IMX8M_CCM_CCGR_SETTINGn(n, 0b00)
+#define IMX8M_CCM_CCGR_SETTINGn_NEEDED_RUN(n) IMX8M_CCM_CCGR_SETTINGn(n, 0b01)
+#define IMX8M_CCM_CCGR_SETTINGn_NEEDED_RUN_WAIT(n) IMX8M_CCM_CCGR_SETTINGn(n, 0b10)
+#define IMX8M_CCM_CCGR_SETTINGn_NEEDED(n) IMX8M_CCM_CCGR_SETTINGn(n, 0b11)
#endif
--
2.25.0
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
next prev parent reply other threads:[~2020-02-17 12:47 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-17 12:45 [PATCH 00/42] Add i.MX8M support Sascha Hauer
2020-02-17 12:45 ` [PATCH 01/42] ARM: i.MX8: Move iomux header to make space for i.MX8MM Sascha Hauer
2020-02-17 12:45 ` [PATCH 02/42] ARM: i.MX8M: Add base addresses common to i.MX8M Sascha Hauer
2020-02-17 12:45 ` [PATCH 03/42] ARM: i.MX8M: add and use imx8mq_setup_pad() Sascha Hauer
2020-02-17 12:45 ` [PATCH 04/42] ARM: i.MX: Drop iomux argument from mx7_setup_pad() Sascha Hauer
2020-02-17 12:45 ` [PATCH 05/42] ARM: i.MX8M: Add iomux header for i.MX8MM Sascha Hauer
2020-02-17 12:45 ` [PATCH 06/42] ARM: i.MX8M: Add imx8mm-regs.h Sascha Hauer
2020-02-17 12:45 ` [PATCH 07/42] ARM: i.MX8M: Add ARCH_IMX8M symbol Sascha Hauer
2020-02-17 12:45 ` [PATCH 08/42] ARM: i.MX: esdctl: rename functions to imx8m_* Sascha Hauer
2020-02-17 12:45 ` [PATCH 09/42] ARM: i.MX8M: Use imx8mq.c for other i.MX8M as well Sascha Hauer
2020-02-17 12:45 ` [PATCH 10/42] ARM: i.MX8M: rename imx8_* bootsource functions to imx8mq_* Sascha Hauer
2020-02-17 12:45 ` [PATCH 11/42] ARM: i.MX8M: Detect serial downloader mode correctly Sascha Hauer
2020-02-17 12:45 ` [PATCH 12/42] HAB: i.MX8M: rename imx8_* functions to imx8m_* Sascha Hauer
2020-02-17 12:45 ` [PATCH 13/42] ARM: i.MX8M: rename i.MX8M specific function Sascha Hauer
2020-02-17 12:45 ` [PATCH 14/42] ARM: i.MX8M: rename functions to be i.MX8M specific Sascha Hauer
2020-02-17 12:45 ` [PATCH 15/42] mci: imx-esdhc-pbl: Add instance 2 for i.MX8MM Sascha Hauer
2020-02-17 12:45 ` [PATCH 16/42] USB: gadget: fsl_udc: move register definitions to header file Sascha Hauer
2020-02-17 12:45 ` [PATCH 17/42] usb: gadget: fsl_udc: Add PBL image loading support Sascha Hauer
2020-02-17 12:45 ` [PATCH 18/42] usb: gadget: fsl_udc: Fix warnings on 64bit compilation Sascha Hauer
2020-02-17 12:46 ` [PATCH 19/42] usb: imx: Add i.MX8mm support Sascha Hauer
2020-02-17 12:46 ` [PATCH 20/42] serial: imx: Add imx8mm compatible Sascha Hauer
2020-02-17 12:46 ` [PATCH 21/42] mci: imx-esdhc: Add i.MX8mm support Sascha Hauer
2020-02-17 12:46 ` [PATCH 22/42] I2C: i.MX: Add early i2c support for i.MX8M Sascha Hauer
2020-02-17 12:46 ` [PATCH 23/42] clk: imx: Add pll14xx support Sascha Hauer
2020-02-17 12:46 ` [PATCH 24/42] clk: imx: Add imx8m_clk_composite_critical Sascha Hauer
2020-02-17 12:46 ` [PATCH 25/42] clk: imx: Add imx8mm clk driver Sascha Hauer
2020-02-17 12:46 ` Sascha Hauer [this message]
2020-02-17 12:46 ` [PATCH 27/42] Add some CCM defines for i.MX8M Sascha Hauer
2020-02-17 12:46 ` [PATCH 28/42] ARM: i.MX8M: rename imx8-ccm-regs.h to imx8m-ccm-regs.h Sascha Hauer
2020-02-17 12:46 ` [PATCH 29/42] ARM: i.MX8M: Add some lowlevel clock functions Sascha Hauer
2020-02-17 12:46 ` [PATCH 30/42] ARM: i.MX7: Add and use function for early UART clock setup Sascha Hauer
2020-02-17 12:46 ` [PATCH 31/42] ARM: i.MX8M: " Sascha Hauer
2020-02-17 12:46 ` [PATCH 32/42] iomux: Add i.MX8MM support Sascha Hauer
2020-02-17 12:46 ` [PATCH 33/42] mfd: Add Rohm bd71837 header file Sascha Hauer
2020-02-17 12:46 ` [PATCH 34/42] scripts: imx-usb-loader: Add 2nd stage loading support Sascha Hauer
2020-02-17 12:46 ` [PATCH 35/42] scripts: imx-usb-loader: Add i.MX8MM support Sascha Hauer
2020-02-17 12:46 ` [PATCH 36/42] ARM: i.MX8MQ boards: Add missing includes Sascha Hauer
2020-02-17 12:46 ` [PATCH 37/42] ARM: i.MX8M: Add DDR controller support Sascha Hauer
2020-02-17 12:46 ` [PATCH 38/42] ARM: i.MX8M: Add TF-A loading support for i.MX8MM Sascha Hauer
2020-02-17 12:46 ` [PATCH 39/42] ARM: i.MX8M: Add i.MX8MM support Sascha Hauer
2020-02-17 12:46 ` [PATCH 40/42] scripts: imx-image: " Sascha Hauer
2020-02-17 12:46 ` [PATCH 41/42] ARM: i.MX: Add i.MX8MM EVK board support Sascha Hauer
2020-02-17 12:46 ` [PATCH 42/42] ARM: i.MX: update imx_v8_defconfig for i.MX8MM Sascha Hauer
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200217124623.14520-27-s.hauer@pengutronix.de \
--to=s.hauer@pengutronix.de \
--cc=barebox@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox