[PATCH 0/6] ARM: stm32mp: fix Ethernet after dts/ update

[PATCH 0/6] ARM: stm32mp: fix Ethernet after dts/ update

[Ahmad Fatoum]

The upstream device tree no longer lists "syscfg-clk" as clock because
the syscon node had a clocks property, which the syscon driver is
supposed to attach to the regmap.

Teach the barebox syscon driver how to do so and do the necessary
things, so that network on the STM32MP works again.

Cheers,
Ahmad Fatoum (6):
  ARM: dts: stm32mp: align barebox dtsi name with upstream
  regmap: make internal.h a self-contained header
  regmap: add support for regmap_init_mmio_clk
  mfd: syscon: use regmap-mmio as backend
  mfd: syscon: clock peripheral if specified in device tree
  net: designware: eqos: stm32: drop no longer needed syscfg-clk

 .../dts/{stm32mp157c.dtsi => stm32mp151.dtsi} |   0
 arch/arm/dts/stm32mp157a-dk1.dtsi             |   2 +-
 drivers/base/regmap/Makefile                  |   3 +-
 drivers/base/regmap/internal.h                |   9 +-
 drivers/base/regmap/regmap-mmio.c             | 271 ++++++++++++++++++
 drivers/mfd/syscon.c                          |  47 ++-
 drivers/net/designware_stm32.c                |   3 +-
 include/regmap.h                              |  50 ++++
 8 files changed, 353 insertions(+), 32 deletions(-)
 rename arch/arm/dts/{stm32mp157c.dtsi => stm32mp151.dtsi} (100%)
 create mode 100644 drivers/base/regmap/regmap-mmio.c

-- 
2.25.0


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[PATCH 1/6] ARM: dts: stm32mp: align barebox dtsi name with upstream

[Ahmad Fatoum]

Upstream has split stm32mp157c.dtsi into three files:

- stm32mp157.dtsi: GPU, DSI and stm32mp153.dtsi
- stm32mp153.dtsi: 2x CAN, 2nd Cortex-A7 and stm32mp151.dtsi
- stm32mp151.dtsi: everything else

Have our barebox specific fixup file follow the new naming scheme.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 arch/arm/dts/{stm32mp157c.dtsi => stm32mp151.dtsi} | 0
 arch/arm/dts/stm32mp157a-dk1.dtsi                  | 2 +-
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/dts/{stm32mp157c.dtsi => stm32mp151.dtsi} (100%)

diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp151.dtsi
similarity index 100%
rename from arch/arm/dts/stm32mp157c.dtsi
rename to arch/arm/dts/stm32mp151.dtsi
diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi b/arch/arm/dts/stm32mp157a-dk1.dtsi
index 6be208f32ef2..baaf60b18fa8 100644
--- a/arch/arm/dts/stm32mp157a-dk1.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1.dtsi
@@ -4,7 +4,7 @@
  * Author: Alexandre Torgue <alexandre.torgue@st.com>.
  */
 
-#include "stm32mp157c.dtsi"
+#include "stm32mp151.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 
 / {
-- 
2.25.0


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[PATCH 2/6] regmap: make internal.h a self-contained header

[Ahmad Fatoum]

Follow up commit will add a new user for "internal.h".
Prepare the header for this.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/base/regmap/internal.h | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h
index 52df5290a18d..5b19459828fe 100644
--- a/drivers/base/regmap/internal.h
+++ b/drivers/base/regmap/internal.h
@@ -1,5 +1,10 @@
+#ifndef REGMAP_INTERNAL_H_
+#define REGMAP_INTERNAL_H_
 
 #include <linux/list.h>
+#include <driver.h>
+
+struct regmap_bus;
 
 struct regmap {
 	struct device_d *dev;
@@ -15,4 +20,6 @@ struct regmap {
 	unsigned int max_register;
 
 	struct cdev cdev;
-};
\ No newline at end of file
+};
+
+#endif
-- 
2.25.0


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[PATCH 3/6] regmap: add support for regmap_init_mmio_clk

[Ahmad Fatoum]

regmap-mmio is used in Linux for clocked memory mapped I/O regions.
Port it over, so we can more easily port drivers using it.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/base/regmap/Makefile      |   3 +-
 drivers/base/regmap/regmap-mmio.c | 271 ++++++++++++++++++++++++++++++
 include/regmap.h                  |  50 ++++++
 3 files changed, 323 insertions(+), 1 deletion(-)
 create mode 100644 drivers/base/regmap/regmap-mmio.c

diff --git a/drivers/base/regmap/Makefile b/drivers/base/regmap/Makefile
index 4dc3d8c510ae..ab2387037d37 100644
--- a/drivers/base/regmap/Makefile
+++ b/drivers/base/regmap/Makefile
@@ -1 +1,2 @@
-obj-y	+= regmap.o
\ No newline at end of file
+obj-y	+= regmap.o
+obj-y	+= regmap-mmio.o
diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c
new file mode 100644
index 000000000000..f8d2cda84353
--- /dev/null
+++ b/drivers/base/regmap/regmap-mmio.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Register map access API - MMIO support
+//
+// Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <io.h>
+#include <regmap.h>
+
+#include "internal.h"
+
+struct regmap_mmio_context {
+	void __iomem *regs;
+	unsigned val_bytes;
+
+	struct clk *clk;
+
+	void (*reg_write)(struct regmap_mmio_context *ctx,
+			  unsigned int reg, unsigned int val);
+	unsigned int (*reg_read)(struct regmap_mmio_context *ctx,
+			         unsigned int reg);
+};
+
+static int regmap_mmio_regbits_check(size_t reg_bits)
+{
+	switch (reg_bits) {
+	case 8:
+	case 16:
+	case 32:
+#ifdef CONFIG_64BIT
+	case 64:
+#endif
+		return 0;
+	default:
+		return -EINVAL;
+	}
+}
+
+static int regmap_mmio_get_min_stride(size_t val_bits)
+{
+	int min_stride;
+
+	switch (val_bits) {
+	case 8:
+		/* The core treats 0 as 1 */
+		min_stride = 0;
+		return 0;
+	case 16:
+		min_stride = 2;
+		break;
+	case 32:
+		min_stride = 4;
+		break;
+#ifdef CONFIG_64BIT
+	case 64:
+		min_stride = 8;
+		break;
+#endif
+	default:
+		return -EINVAL;
+	}
+
+	return min_stride;
+}
+
+static void regmap_mmio_write8(struct regmap_mmio_context *ctx,
+				unsigned int reg,
+				unsigned int val)
+{
+	writeb(val, ctx->regs + reg);
+}
+
+static void regmap_mmio_write16le(struct regmap_mmio_context *ctx,
+				  unsigned int reg,
+				  unsigned int val)
+{
+	writew(val, ctx->regs + reg);
+}
+
+static void regmap_mmio_write32le(struct regmap_mmio_context *ctx,
+				  unsigned int reg,
+				  unsigned int val)
+{
+	writel(val, ctx->regs + reg);
+}
+
+#ifdef CONFIG_64BIT
+static void regmap_mmio_write64le(struct regmap_mmio_context *ctx,
+				  unsigned int reg,
+				  unsigned int val)
+{
+	writeq(val, ctx->regs + reg);
+}
+#endif
+
+static int regmap_mmio_write(void *context, unsigned int reg, unsigned int val)
+{
+	struct regmap_mmio_context *ctx = context;
+	int ret;
+
+	ret = clk_enable(ctx->clk);
+	if (ret < 0)
+		return ret;
+
+	ctx->reg_write(ctx, reg, val);
+
+	clk_disable(ctx->clk);
+
+	return 0;
+}
+
+static unsigned int regmap_mmio_read8(struct regmap_mmio_context *ctx,
+				      unsigned int reg)
+{
+	return readb(ctx->regs + reg);
+}
+
+static unsigned int regmap_mmio_read16le(struct regmap_mmio_context *ctx,
+				         unsigned int reg)
+{
+	return readw(ctx->regs + reg);
+}
+
+static unsigned int regmap_mmio_read32le(struct regmap_mmio_context *ctx,
+				         unsigned int reg)
+{
+	return readl(ctx->regs + reg);
+}
+
+#ifdef CONFIG_64BIT
+static unsigned int regmap_mmio_read64le(struct regmap_mmio_context *ctx,
+				         unsigned int reg)
+{
+	return readq(ctx->regs + reg);
+}
+#endif
+
+static int regmap_mmio_read(void *context, unsigned int reg, unsigned int *val)
+{
+	struct regmap_mmio_context *ctx = context;
+	int ret;
+
+	ret = clk_enable(ctx->clk);
+	if (ret < 0)
+		return ret;
+
+	*val = ctx->reg_read(ctx, reg);
+
+	clk_disable(ctx->clk);
+
+	return 0;
+}
+
+static const struct regmap_bus regmap_mmio = {
+	.reg_write = regmap_mmio_write,
+	.reg_read = regmap_mmio_read,
+};
+
+static struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,
+					const struct regmap_config *config)
+{
+	struct regmap_mmio_context *ctx;
+	int min_stride;
+	int ret;
+
+	ret = regmap_mmio_regbits_check(config->reg_bits);
+	if (ret)
+		return ERR_PTR(ret);
+
+	if (config->pad_bits)
+		return ERR_PTR(-EINVAL);
+
+	min_stride = regmap_mmio_get_min_stride(config->val_bits);
+	if (min_stride < 0)
+		return ERR_PTR(min_stride);
+
+	if (config->reg_stride < min_stride)
+		return ERR_PTR(-EINVAL);
+
+	ctx = xzalloc(sizeof(*ctx));
+
+	ctx->regs = regs;
+	ctx->val_bytes = config->val_bits / 8;
+
+	switch (config->val_bits) {
+	case 8:
+		ctx->reg_read = regmap_mmio_read8;
+		ctx->reg_write = regmap_mmio_write8;
+		break;
+	case 16:
+		ctx->reg_read = regmap_mmio_read16le;
+		ctx->reg_write = regmap_mmio_write16le;
+		break;
+	case 32:
+		ctx->reg_read = regmap_mmio_read32le;
+		ctx->reg_write = regmap_mmio_write32le;
+		break;
+	default:
+		ret = -EINVAL;
+		goto err_free;
+	}
+
+	return ctx;
+
+err_free:
+	kfree(ctx);
+
+	return ERR_PTR(ret);
+}
+
+struct regmap *regmap_init_mmio_clk(struct device_d *dev,
+				    const char *clk_id,
+				    void __iomem *regs,
+				    const struct regmap_config *config)
+{
+	struct regmap_mmio_context *ctx;
+
+	ctx = regmap_mmio_gen_context(regs, config);
+	if (IS_ERR(ctx))
+		return ERR_CAST(ctx);
+
+	if (clk_id) {
+		ctx->clk = clk_get(dev, clk_id);
+		if (IS_ERR(ctx->clk)) {
+			kfree(ctx);
+			return ERR_CAST(ctx->clk);
+		}
+	}
+
+	return regmap_init(dev, &regmap_mmio, ctx, config);
+}
+
+struct regmap *of_regmap_init_mmio_clk(struct device_node *np,
+				       const char *clk_id,
+				       void __iomem *regs,
+				       const struct regmap_config *config)
+{
+	struct regmap_mmio_context *ctx;
+
+	ctx = regmap_mmio_gen_context(regs, config);
+	if (IS_ERR(ctx))
+		return ERR_CAST(ctx);
+
+	if (clk_id) {
+		ctx->clk = of_clk_get_by_name(np, clk_id);
+		if (IS_ERR(ctx->clk)) {
+			kfree(ctx);
+			return ERR_CAST(ctx->clk);
+		}
+	}
+
+	return regmap_init(NULL, &regmap_mmio, ctx, config);
+}
+
+int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk)
+{
+	struct regmap_mmio_context *ctx = map->bus_context;
+
+	ctx->clk = clk;
+
+	return 0;
+}
+
+void regmap_mmio_detach_clk(struct regmap *map)
+{
+	struct regmap_mmio_context *ctx = map->bus_context;
+
+	ctx->clk = NULL;
+}
diff --git a/include/regmap.h b/include/regmap.h
index 049ac0210e43..48ec5b077e3d 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -44,6 +44,56 @@ struct regmap *regmap_init(struct device_d *dev,
 			     const struct regmap_bus *bus,
 			     void *bus_context,
 			     const struct regmap_config *config);
+
+struct clk;
+
+/**
+ * of_regmap_init_mmio_clk() - Initialise register map with register clock
+ *
+ * @np: Device node that will be interacted with
+ * @clk_id: register clock consumer ID
+ * @regs: Pointer to memory-mapped IO region
+ * @config: Configuration for register map
+ *
+ * The return value will be an ERR_PTR() on error or a valid pointer to
+ * a struct regmap.
+ */
+struct regmap *of_regmap_init_mmio_clk(struct device_node *np, const char *clk_id,
+				       void __iomem *regs,
+				       const struct regmap_config *config);
+
+/**
+ * regmap_init_mmio_clk() - Initialise register map with register clock
+ *
+ * @dev: Device that will be interacted with
+ * @clk_id: register clock consumer ID
+ * @regs: Pointer to memory-mapped IO region
+ * @config: Configuration for register map
+ *
+ * The return value will be an ERR_PTR() on error or a valid pointer to
+ * a struct regmap.
+ */
+struct regmap *regmap_init_mmio_clk(struct device_d *dev, const char *clk_id,
+				    void __iomem *regs,
+				    const struct regmap_config *config);
+
+/**
+ * regmap_init_mmio() - Initialise register map
+ *
+ * @dev: Device that will be interacted with
+ * @regs: Pointer to memory-mapped IO region
+ * @config: Configuration for register map
+ *
+ * The return value will be an ERR_PTR() on error or a valid pointer to
+ * a struct regmap.
+ */
+#define regmap_init_mmio(dev, regs, config)		\
+	regmap_init_mmio_clk(dev, NULL, regs, config)
+
+
+int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk);
+void regmap_mmio_detach_clk(struct regmap *map);
+
 void regmap_exit(struct regmap *map);
 
 struct regmap *dev_get_regmap(struct device_d *dev, const char *name);
-- 
2.25.0


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[PATCH 4/6] mfd: syscon: use regmap-mmio as backend

[Ahmad Fatoum]

Linux supports a clocks property in syscon nodes to indicate that access
should only occur with the clock active. The new regmap-mmio supports
this, thus port syscon over, so it can make use of it in a later commit.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/mfd/syscon.c | 27 ++-------------------------
 1 file changed, 2 insertions(+), 25 deletions(-)

diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
index 809941937857..adc263c6e6da 100644
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -31,27 +31,6 @@ struct syscon {
 	struct regmap *regmap;
 };
 
-static int syscon_reg_write(void *context, unsigned int reg,
-			    unsigned int val)
-{
-	struct syscon *syscon = context;
-	writel(val, syscon->base + reg);
-	return 0;
-}
-
-static int syscon_reg_read(void *context, unsigned int reg,
-			   unsigned int *val)
-{
-	struct syscon *syscon = context;
-	*val = readl(syscon->base + reg);
-	return 0;
-}
-
-static const struct regmap_bus syscon_regmap_bus = {
-	.reg_write = syscon_reg_write,
-	.reg_read  = syscon_reg_read,
-};
-
 static const struct regmap_config syscon_regmap_config = {
 	.reg_bits = 32,
 	.val_bits = 32,
@@ -79,10 +58,8 @@ static struct syscon *of_syscon_register(struct device_node *np)
 
 	list_add_tail(&syscon->list, &syscon_list);
 
-	syscon->regmap = regmap_init(NULL,
-				     &syscon_regmap_bus,
-				     syscon,
-				     &syscon_regmap_config);
+	syscon->regmap = of_regmap_init_mmio_clk(np, NULL, syscon->base,
+					     &syscon_regmap_config);
 	return syscon;
 
 err_map:
-- 
2.25.0


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[PATCH 5/6] mfd: syscon: clock peripheral if specified in device tree

[Ahmad Fatoum]

Linux supports a clocks property in syscon nodes to indicate that access
should only occur with the clock active.

Attach the clock to the regmap if found.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/mfd/syscon.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
index adc263c6e6da..f1e6559d71fa 100644
--- a/drivers/mfd/syscon.c
+++ b/drivers/mfd/syscon.c
@@ -19,6 +19,7 @@
 #include <xfuncs.h>
 #include <of_address.h>
 #include <linux/err.h>
+#include <linux/clk.h>
 
 #include <mfd/syscon.h>
 
@@ -37,7 +38,7 @@ static const struct regmap_config syscon_regmap_config = {
 	.reg_stride = 4,
 };
 
-static struct syscon *of_syscon_register(struct device_node *np)
+static struct syscon *of_syscon_register(struct device_node *np, bool check_clk)
 {
 	int ret;
 	struct syscon *syscon;
@@ -60,6 +61,21 @@ static struct syscon *of_syscon_register(struct device_node *np)
 
 	syscon->regmap = of_regmap_init_mmio_clk(np, NULL, syscon->base,
 					     &syscon_regmap_config);
+
+	if (check_clk) {
+		struct clk *clk = of_clk_get(np, 0);
+		if (IS_ERR(clk)) {
+			ret = PTR_ERR(clk);
+			/* clock is optional */
+			if (ret != -ENOENT)
+				goto err_map;
+		} else {
+			ret = regmap_mmio_attach_clk(syscon->regmap, clk);
+			if (ret)
+				goto err_map;
+		}
+	}
+
 	return syscon;
 
 err_map:
@@ -78,7 +94,7 @@ static struct syscon *node_to_syscon(struct device_node *np)
 		}
 
 	if (!syscon)
-		syscon = of_syscon_register(np);
+		syscon = of_syscon_register(np, true);
 
 	if (IS_ERR(syscon))
 		return ERR_CAST(syscon);
-- 
2.25.0


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[PATCH 6/6] net: designware: eqos: stm32: drop no longer needed syscfg-clk

[Ahmad Fatoum]

The upstream device tree no longer lists "syscfg-clk" and the syscon node
contains a clocks property that the barebox syscon driver now
automatically clocks before access.

Thus drop the requirement that "syscfg-clk" is specified.

Fixes: 4aaceef58 ("dts: update to v5.6-rc1")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
 drivers/net/designware_stm32.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/designware_stm32.c b/drivers/net/designware_stm32.c
index 4c682a5daca3..1e0cdfa6952f 100644
--- a/drivers/net/designware_stm32.c
+++ b/drivers/net/designware_stm32.c
@@ -57,12 +57,11 @@ static inline struct eqos_stm32 *to_stm32(struct eqos *eqos)
 	return eqos->priv;
 }
 
-enum { CLK_STMMACETH, CLK_MAX_RX, CLK_MAX_TX, CLK_SYSCFG,  };
+enum { CLK_STMMACETH, CLK_MAX_RX, CLK_MAX_TX, };
 static const struct clk_bulk_data stm32_clks[] = {
 	[CLK_STMMACETH] = { .id = "stmmaceth" },
 	[CLK_MAX_RX]    = { .id = "mac-clk-rx" },
 	[CLK_MAX_TX]    = { .id = "mac-clk-tx" },
-	[CLK_SYSCFG]    = { .id = "syscfg-clk" },
 };
 
 static unsigned long eqos_get_csr_clk_rate_stm32(struct eqos *eqos)
-- 
2.25.0


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Re: [PATCH 0/6] ARM: stm32mp: fix Ethernet after dts/ update

[Sascha Hauer]

On Tue, Feb 18, 2020 at 03:22:59PM +0100, Ahmad Fatoum wrote:
> The upstream device tree no longer lists "syscfg-clk" as clock because
> the syscon node had a clocks property, which the syscon driver is
> supposed to attach to the regmap.
> 
> Teach the barebox syscon driver how to do so and do the necessary
> things, so that network on the STM32MP works again.
> 
> Cheers,
> Ahmad Fatoum (6):
>   ARM: dts: stm32mp: align barebox dtsi name with upstream
>   regmap: make internal.h a self-contained header
>   regmap: add support for regmap_init_mmio_clk
>   mfd: syscon: use regmap-mmio as backend
>   mfd: syscon: clock peripheral if specified in device tree
>   net: designware: eqos: stm32: drop no longer needed syscfg-clk

Applied, thanks

Sascha

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