From: Sascha Hauer <s.hauer@pengutronix.de>
To: Barebox List <barebox@lists.infradead.org>
Subject: [PATCH] arm: rk3288-phycore-som: Fix memory node
Date: Wed, 1 Apr 2020 09:25:06 +0200 [thread overview]
Message-ID: <20200401072506.2226-1-s.hauer@pengutronix.de> (raw)
Upstream arm/rk3288.dtsi specifies #address-cells = <2> and #size-cells
= <2> for the root node, so we have to use 64bit addresses and sizes in
the memory node as well.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/dts/rk3288-phycore-som.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3288-phycore-som.dts b/arch/arm/dts/rk3288-phycore-som.dts
index dd74bcfb11..65c53895c4 100644
--- a/arch/arm/dts/rk3288-phycore-som.dts
+++ b/arch/arm/dts/rk3288-phycore-som.dts
@@ -21,7 +21,7 @@
compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
memory {
- reg = <0 0x40000000>;
+ reg = <0x0 0x0 0x0 0x40000000>;
};
vcc33: fixedregulator@0 {
--
2.26.0.rc2
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