From: Sascha Hauer <s.hauer@pengutronix.de>
To: Ahmad Fatoum <ahmad@a3f.at>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCH 1/3] ARM: i.MX: boot: correctly handle SRC_SBMR1 override via SRC_GPR9
Date: Mon, 27 Apr 2020 10:07:27 +0200 [thread overview]
Message-ID: <20200427080727.GO5877@pengutronix.de> (raw)
In-Reply-To: <20200427071351.467859-1-ahmad@a3f.at>
On Mon, Apr 27, 2020 at 09:13:49AM +0200, Ahmad Fatoum wrote:
> `mw 0x20d8040 0x08000030; mw 0x20d8044 0x10000000; reset` issued on an
> i.MX6Q forces boot from the ecspi1. This is because the BootROM reads
> the boot mode out of SRC_GPR9 instead of SRC_SBMR1 whenever SRC_GPR10
> has its 28th bit set.
Is this documented somewhere? The reference Manual marks SRC_GPR9 and
SRC_GPR10 as
| This register is used by the ROM code and should not be used
| by application software.
And why do you depend on this behaviour?
Sascha
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next prev parent reply other threads:[~2020-04-27 8:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-27 7:13 Ahmad Fatoum
2020-04-27 7:13 ` [PATCH 2/3] ARM: i.MX: boot: interpret reserved boot as forced serial Ahmad Fatoum
2020-04-27 7:13 ` [PATCH 3/3] ARM: i.MX6: boot: handle i.MX6UL differences Ahmad Fatoum
2020-04-27 8:07 ` Sascha Hauer [this message]
2020-04-27 8:28 ` [PATCH 1/3] ARM: i.MX: boot: correctly handle SRC_SBMR1 override via SRC_GPR9 Ahmad Fatoum
2020-05-08 6:41 ` Ahmad Fatoum
2020-05-08 12:07 ` Sascha Hauer
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