[PATCH v2 1/4] ARM: imx8mm: select FIRMWARE_IMX_LPDDR4_PMU_TRAIN from IMX8MM_EVK

[PATCH v2 1/4] ARM: imx8mm: select FIRMWARE_IMX_LPDDR4_PMU_TRAIN from IMX8MM_EVK

[Lucas Stach]

Without this select the necessary DDR PHY firmware files will be missing
when only building for the i.MX8MM-EVK board.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/mach-imx/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 7e4265900479..007845c6d13d 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -525,6 +525,7 @@ config MACH_NXP_IMX6ULL_EVK
 config MACH_NXP_IMX8MM_EVK
 	bool "NXP i.MX8MM EVK Board"
 	select ARCH_IMX8MM
+	select FIRMWARE_IMX_LPDDR4_PMU_TRAIN
 	select FIRMWARE_IMX8MM_ATF
 	select ARM_SMCCC
 	select MCI_IMX_ESDHC_PBL
-- 
2.20.1


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[PATCH v2 2/4] ARM: imx8m: make debug UART selection available on i.MX8MM/MP

[Lucas Stach]

i.MX8MM/MN/MP has UARTs in the same place in the MMIO address space as
the i.MX8MQ, so make the lowlevel debug a bit more generic across the
i.MX8M family.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
v2:
- rebase on top of i.MX8MP support
- remove unused and redundant UART base address defines in SoC specific
  headers, the shared define in the familiy header is fine
---
 arch/arm/mach-imx/include/mach/debug_ll.h    |  9 +++------
 arch/arm/mach-imx/include/mach/imx8mm-regs.h |  4 ----
 arch/arm/mach-imx/include/mach/imx8mp-regs.h |  4 ----
 arch/arm/mach-imx/include/mach/imx8mq-regs.h |  4 ----
 common/Kconfig                               | 18 +++++-------------
 5 files changed, 8 insertions(+), 31 deletions(-)

diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h b/arch/arm/mach-imx/include/mach/debug_ll.h
index f2114d50e91e..1593dd018e13 100644
--- a/arch/arm/mach-imx/include/mach/debug_ll.h
+++ b/arch/arm/mach-imx/include/mach/debug_ll.h
@@ -15,8 +15,7 @@
 #include <mach/imx53-regs.h>
 #include <mach/imx6-regs.h>
 #include <mach/imx7-regs.h>
-#include <mach/imx8mp-regs.h>
-#include <mach/imx8mq-regs.h>
+#include <mach/imx8m-regs.h>
 #include <mach/vf610-regs.h>
 
 #include <serial/imx-uart.h>
@@ -49,10 +48,8 @@
 #define IMX_DEBUG_SOC MX6
 #elif defined CONFIG_DEBUG_IMX7D_UART
 #define IMX_DEBUG_SOC MX7
-#elif defined CONFIG_DEBUG_IMX8MP_UART
-#define IMX_DEBUG_SOC MX8MP
-#elif defined CONFIG_DEBUG_IMX8MQ_UART
-#define IMX_DEBUG_SOC MX8MQ
+#elif defined CONFIG_DEBUG_IMX8M_UART
+#define IMX_DEBUG_SOC MX8M
 #elif defined CONFIG_DEBUG_VF610_UART
 #define IMX_DEBUG_SOC VF610
 #else
diff --git a/arch/arm/mach-imx/include/mach/imx8mm-regs.h b/arch/arm/mach-imx/include/mach/imx8mm-regs.h
index 1325c78dbc00..e10ca42d2dd0 100644
--- a/arch/arm/mach-imx/include/mach/imx8mm-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx8mm-regs.h
@@ -23,14 +23,10 @@
 #define MX8MM_SYSCNT_RD_BASE_ADDR	0x306a0000
 #define MX8MM_SYSCNT_CMP_BASE_ADDR	0x306b0000
 #define MX8MM_SYSCNT_CTRL_BASE_ADDR	0x306c0000
-#define MX8MM_UART1_BASE_ADDR		0x30860000
-#define MX8MM_UART3_BASE_ADDR		0x30880000
-#define MX8MM_UART2_BASE_ADDR		0x30890000
 #define MX8MM_I2C1_BASE_ADDR		0x30a20000
 #define MX8MM_I2C2_BASE_ADDR		0x30a30000
 #define MX8MM_I2C3_BASE_ADDR		0x30a40000
 #define MX8MM_I2C4_BASE_ADDR		0x30a50000
-#define MX8MM_UART4_BASE_ADDR		0x30a60000
 #define MX8MM_USDHC1_BASE_ADDR		0x30b40000
 #define MX8MM_USDHC2_BASE_ADDR		0x30b50000
 #define MX8MM_USDHC3_BASE_ADDR		0x30b60000
diff --git a/arch/arm/mach-imx/include/mach/imx8mp-regs.h b/arch/arm/mach-imx/include/mach/imx8mp-regs.h
index 29e8a4570656..ad53abbc9d11 100644
--- a/arch/arm/mach-imx/include/mach/imx8mp-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx8mp-regs.h
@@ -23,14 +23,10 @@
 #define MX8MP_SYSCNT_RD_BASE_ADDR	0x306a0000
 #define MX8MP_SYSCNT_CMP_BASE_ADDR	0x306b0000
 #define MX8MP_SYSCNT_CTRL_BASE_ADDR	0x306c0000
-#define MX8MP_UART1_BASE_ADDR		0x30860000
-#define MX8MP_UART3_BASE_ADDR		0x30880000
-#define MX8MP_UART2_BASE_ADDR		0x30890000
 #define MX8MP_I2C1_BASE_ADDR		0x30a20000
 #define MX8MP_I2C2_BASE_ADDR		0x30a30000
 #define MX8MP_I2C3_BASE_ADDR		0x30a40000
 #define MX8MP_I2C4_BASE_ADDR		0x30a50000
-#define MX8MP_UART4_BASE_ADDR		0x30a60000
 #define MX8MP_USDHC1_BASE_ADDR		0x30b40000
 #define MX8MP_USDHC2_BASE_ADDR		0x30b50000
 #define MX8MP_USDHC3_BASE_ADDR		0x30b60000
diff --git a/arch/arm/mach-imx/include/mach/imx8mq-regs.h b/arch/arm/mach-imx/include/mach/imx8mq-regs.h
index 2f6488af33c5..50d02ba6a288 100644
--- a/arch/arm/mach-imx/include/mach/imx8mq-regs.h
+++ b/arch/arm/mach-imx/include/mach/imx8mq-regs.h
@@ -59,9 +59,6 @@
 #define MX8MQ_ECSPI1_BASE_ADDR		0x30820000
 #define MX8MQ_ECSPI2_BASE_ADDR		0x30830000
 #define MX8MQ_ECSPI3_BASE_ADDR		0x30840000
-#define MX8MQ_UART1_BASE_ADDR		0x30860000
-#define MX8MQ_UART3_BASE_ADDR		0x30880000
-#define MX8MQ_UART2_BASE_ADDR		0x30890000
 #define MX8MQ_SPDIF2_BASE_ADDR		0x308A0000
 #define MX8MQ_SAI2_BASE_ADDR		0x308B0000
 #define MX8MQ_SAI3_BASE_ADDR		0x308C0000
@@ -74,7 +71,6 @@
 #define MX8MQ_I2C2_BASE_ADDR		0x30A30000
 #define MX8MQ_I2C3_BASE_ADDR		0x30A40000
 #define MX8MQ_I2C4_BASE_ADDR		0x30A50000
-#define MX8MQ_UART4_BASE_ADDR		0x30A60000
 #define MX8MQ_MIPI_CSI_BASE_ADDR	0x30A70000
 #define MX8MQ_MIPI_CSI_PHY1_BASE_ADDR	0x30A80000
 #define MX8MQ_CSI1_BASE_ADDR		0x30A90000
diff --git a/common/Kconfig b/common/Kconfig
index 658437f01c5e..b350f5c355fa 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -1197,19 +1197,12 @@ config DEBUG_IMX7D_UART
 	  Say Y here if you want barebox low-level debugging support
 	  on i.MX7D.
 
-config DEBUG_IMX8MP_UART
-	bool "i.MX8MP Debug UART"
-	depends on ARCH_IMX8MP
+config DEBUG_IMX8M_UART
+	bool "i.MX8M Debug UART"
+	depends on ARCH_IMX8M
 	help
 	  Say Y here if you want barebox low-level debugging support
-	  on i.MX8MP.
-
-config DEBUG_IMX8MQ_UART
-	bool "i.MX8MQ Debug UART"
-	depends on ARCH_IMX8MQ
-	help
-	  Say Y here if you want barebox low-level debugging support
-	  on i.MX8MQ.
+	  on i.MX8M*.
 
 config DEBUG_VF610_UART
 	bool "VF610 Debug UART"
@@ -1301,8 +1294,7 @@ config DEBUG_IMX_UART_PORT
 						DEBUG_IMX6Q_UART || \
 						DEBUG_IMX6SL_UART || \
 						DEBUG_IMX7D_UART || \
-						DEBUG_IMX8MP_UART || \
-						DEBUG_IMX8MQ_UART || \
+						DEBUG_IMX8M_UART || \
 						DEBUG_VF610_UART
 	default 1
 	depends on ARCH_IMX
-- 
2.20.1


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[PATCH v2 3/4] ARM: nxp-imx8mm-evk: always set up UART

[Lucas Stach]

When the TF-A is configured to have some output on the UART it does not
set up the UART on its own, but just expects a pre-existing configuration.
If Barebox did not set up the UART in the !DEBUG_LL case, TF-A will just
hang without any user accessible debug output, which is a very non-obvious
failure, so better be safe and always set up the UART in case TF-A wants
to use it.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/boards/nxp-imx8mm-evk/lowlevel.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c
index cd1f7d168bc6..082aefb8c1c5 100644
--- a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c
+++ b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c
@@ -32,9 +32,12 @@ static void setup_uart(void)
 
 	imx8mm_setup_pad(IMX8MM_PAD_UART2_TXD_UART2_TX | UART_PAD_CTRL);
 
-	imx8m_uart_setup_ll();
+	imx8mq_uart_setup((void *)MX8M_UART2_BASE_ADDR);
 
-	putc_ll('>');
+	if (IS_ENABLED(CONFIG_DEBUG_LL)) {
+		imx8m_uart_setup_ll();
+		putc_ll('>');
+	}
 }
 
 static void pmic_reg_write(void *i2c, int reg, uint8_t val)
@@ -157,8 +160,7 @@ static void start_atf(void)
  */
 static __noreturn noinline void nxp_imx8mm_evk_start(void)
 {
-	if (IS_ENABLED(CONFIG_DEBUG_LL))
-		setup_uart();
+	setup_uart();
 
 	start_atf();
 
-- 
2.20.1


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[PATCH v2 4/4] nvmem: ocotp: add support for i.MX8MM

[Lucas Stach]

For whatever reason the i.MX8MM OCOTP got a separate compatible and
is not marked as compatible to imx8mq, while the parameters used in the
driver seem to be the same.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/nvmem/Kconfig | 2 +-
 drivers/nvmem/ocotp.c | 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 968342b281ad..55fc6f382d16 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -18,7 +18,7 @@ config NVMEM_SNVS_LPGPR
 
 config IMX_OCOTP
 	tristate "i.MX6 On Chip OTP controller"
-	depends on ARCH_IMX6 || ARCH_VF610 || ARCH_IMX8MQ
+	depends on ARCH_IMX6 || ARCH_VF610 || ARCH_IMX8M
 	depends on OFDEVICE
 	help
 	  This adds support for the i.MX6 On-Chip OTP controller. Currently the
diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c
index 62f510785be1..4ad5f25139e5 100644
--- a/drivers/nvmem/ocotp.c
+++ b/drivers/nvmem/ocotp.c
@@ -766,6 +766,9 @@ static __maybe_unused struct of_device_id imx_ocotp_dt_ids[] = {
 	}, {
 		.compatible = "fsl,imx8mq-ocotp",
 		.data = &imx8mq_ocotp_data,
+	}, {
+		.compatible = "fsl,imx8mm-ocotp",
+		.data = &imx8mq_ocotp_data,
 	}, {
 		.compatible = "fsl,vf610-ocotp",
 		.data = &vf610_ocotp_data,
-- 
2.20.1


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Re: [PATCH v2 1/4] ARM: imx8mm: select FIRMWARE_IMX_LPDDR4_PMU_TRAIN from IMX8MM_EVK

[Sascha Hauer]

On Tue, Aug 11, 2020 at 11:43:27AM +0200, Lucas Stach wrote:
> Without this select the necessary DDR PHY firmware files will be missing
> when only building for the i.MX8MM-EVK board.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
>  arch/arm/mach-imx/Kconfig | 1 +
>  1 file changed, 1 insertion(+)

Applied, thanks

Sascha

> 
> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index 7e4265900479..007845c6d13d 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -525,6 +525,7 @@ config MACH_NXP_IMX6ULL_EVK
>  config MACH_NXP_IMX8MM_EVK
>  	bool "NXP i.MX8MM EVK Board"
>  	select ARCH_IMX8MM
> +	select FIRMWARE_IMX_LPDDR4_PMU_TRAIN
>  	select FIRMWARE_IMX8MM_ATF
>  	select ARM_SMCCC
>  	select MCI_IMX_ESDHC_PBL
> -- 
> 2.20.1
> 
> 
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> 

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