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From: Ahmad Fatoum <>
Cc: Ahmad Fatoum <>
Subject: [PATCH master 2/5] Documentation: boards: stm32mp: search engine optimization
Date: Tue, 20 Oct 2020 05:29:34 +0200	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

The vendor calls it STM32MP1. Have this name appear in the documentation
as well to be easier found during web search.

Signed-off-by: Ahmad Fatoum <>
 Documentation/boards/stm32mp.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/boards/stm32mp.rst b/Documentation/boards/stm32mp.rst
index a06578602d9d..87fff7d1259b 100644
--- a/Documentation/boards/stm32mp.rst
+++ b/Documentation/boards/stm32mp.rst
@@ -5,7 +5,7 @@ The STM32MP is a line of 32-bit ARM SoCs. They reuse peripherals of the
 STM32 line of microcontrollers and can have a STM32 MCU embedded as co-processor
 as well.
-The boot process of the STM32MP SoC is a two step process.
+The boot process of the STM32MP1 SoC is a two step process.
 The first stage boot loader (FSBL) is loaded by the ROM code into the built-in
 SYSRAM and executed. The FSBL sets up the SDRAM, install a secure monitor and
 then the second stage boot loader (SSBL) is loaded into DRAM.

barebox mailing list

  reply	other threads:[~2020-10-20  3:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-20  3:29 [PATCH master 1/5] Documentation: smhfs: fix some typos Ahmad Fatoum
2020-10-20  3:29 ` Ahmad Fatoum [this message]
2020-10-20  3:29 ` [PATCH master 3/5] Documentation: glossary: add some extra info Ahmad Fatoum
2020-10-20  3:29 ` [PATCH master 4/5] Documentation: x86: note EFI support Ahmad Fatoum
2020-10-20  3:29 ` [PATCH master 5/5] Documentation: aarch64-qemu-virt: note physical target support Ahmad Fatoum
2020-10-21  9:51 ` [PATCH master 1/5] Documentation: smhfs: fix some typos Sascha Hauer

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